JPS61245737A - Data transmitter - Google Patents

Abstract

PURPOSE:To attain the ease of system change by allowing a terminal device to set the optimum transmission reliability and a transmission speed depending on the kind and application of a load connected to each terminal device. CONSTITUTION:A reception signal discriminating section 21 discriminating whether or not each bit data of a transmission data Dn sent from a master set 1 is received surely and an acknowledgment signal return section 22 returning an acknowledgment signal ACK are provided to a terminal device 2 and an acknowledgment signal discriminating section 10 and a signal transmission section 11 are provided to the master set so as to send sequentially each bit of the transmission data Dn while the acknowledgment of reception is executed and a signal discriminating time in a reception signal discrimination section 21 is set freely by a discriminating time setting means 23, which is provided to the terminal device 2. Since the transmission speed of the transmission data sent from the master set is set properly by the discrimination time setting means 23 of the terminal device and the optimum transmission reliability and transmission speed are set easily by the terminal device depending on the kind and application of a load, the system is changed easily.

Description

[Detailed description of the invention]

[Technical Field J] The present invention connects a base unit and a plurality of terminals via a pair of signal lines, accesses each terminal from the base unit, transmits control data via the signal line, and transmits control data to the accessed terminal. The present invention relates to a data transmission device configured to send a reception confirmation signal indicating that the transmission data has been received from a device to a base device via a signal line.

[Background Art 1] Conventionally, as shown in FIG.
transmission data consisting of address data for accessing each terminal 2 and control data for controlling the load connected to the terminal 2 is transmitted from the parent 1jll via the signal line 3 to the accessed terminal 2. A reception confirmation signal indicating that the above transmission data has been received from the parent ei is sent via the signal line 3 to the parent ei.
In this type of data transmission device, transmission data Dn of predetermined bits consisting of address data AD and control data is transmitted as shown in FIG. Dso... each has address data n1 ring...
When the accessed terminal 2 receives the reception confirmation signal ACK from the terminal 2, the parent 8!1 sends the reception confirmation signal ACK back to the parent 8!1. By receiving ACK, it is recognized that the data transmission to the accessed terminal device 2 has been performed normally, the data transmission is completed, and the next terminal device 2 is accessed and the same data transmission is performed. It has become. By the way, in such a conventional example, the transmission data DnSD plow (hereinafter referred to as Dn) transmitted from the base unit 1 was sent out at a constant transmission speed. . Therefore, the time for transmitting one bit of data is uniquely determined regardless of the type of load connected to the terminal device 2 or its purpose, which may be inconvenient. In other words, in data transmission, if the pulse width of one bit is widened, the transmission reliability increases, but on the other hand, the transmission speed becomes slower. Required standards for transmission reliability and transmission speed differ depending on the type of load and application.For example, high transmission reliability is required for data transmission to the terminal 2 connected to crime prevention and disaster prevention equipment. , the transmission speed is not a very big issue, on the other hand,
Data transmission to the terminal device 2 to which the lighting device is connected is as follows:
The reliability of turning on and off lighting equipment may be lower than that of controlling crime prevention and disaster prevention equipment, so transmission reliability is not required as much. A high transmission speed is required because it is necessary to achieve a level of responsiveness that does not make the delay time between lighting and direct mounting feel unnatural. Therefore, in cases where transmission reliability and transmission speed are fixed as in the conventional example, it is necessary to set acceptable compromise transmission reliability and transmission speed for all terminal devices 2. However, in this case, the optimum transmission reliability and transmission speed could not be obtained for any of the terminals 2, and there was a problem that satisfactory control characteristics could not be achieved. In addition, the type and purpose of the load connected to each terminal 2 is registered in the base unit 1, and the transmission data creation section of the base 8!1 calculates the optimal transmission reliability and transmission speed for each load. It may be possible to deal with this in software by calculating the transmission data Dn of each pulse width that can be obtained, but if the terminal device 2 is added, or if the terminal device 2
There was a problem in that it was troublesome to change the program when changing the load connected to the control system, and it was not easy to change the control system. [Object of the Invention] The present invention has been made in view of the above points, and its purpose is to improve the type of load connected to each terminal,
The purpose of the present invention is to provide a data transmission device in which the optimum transmission reliability and transmission speed can be easily set on the terminal side according to the application, and it is easy to add terminals and change the load, making it easy to change the system. . [Disclosure of the Invention] (Example) Figures 1 to 3 show an example of the present invention,
In a data transmission device having the same basic configuration as the conventional example in which transmission data Dn and reception confirmation signal ACK are transmitted and received between the i-device and the terminal device 2 via the signal line 3,
A signal receiving unit 20 that receives the transmission data Dn transmitted from the parent 8!1, a reception signal determination unit 21 that determines whether each bit data of the received transmission data Dn has been reliably received, and a reception signal determination unit 20 that receives the transmission data Dn transmitted from the parent 8!1. The terminal device 2 is provided with a confirmation signal return unit 22 that returns a reception confirmation signal ACK when a reception confirmation output is obtained from the terminal unit 21, and a confirmation signal discrimination unit that receives and discriminates the reception confirmation signal ACK from the terminal device 2. 10 and a signal transmission unit 10 that continues to transmit the same bit data until a transmission confirmation signal is obtained by receiving the reception confirmation signal ACK from the confirmation signal determination unit 10, and transmits the next bit data when the transmission confirmation signal is obtained. By providing the unit 11 in the base unit, each bit of the transmission data Dn is sequentially transmitted while confirming the reception of each bit, and the determination time setting unit 23 that can freely set the signal determination time in the received signal determination unit 21 is provided in the terminal. This is installed in the container 2. In the embodiment, the confirmation signal determining unit 10 of the parent 8!1 is the receiving unit 10.
a and a reception data analysis section 10b, the signal transmission section 11 is formed of a transmission data creation section 11a and a driver part 11b, and a display operation section 12 has an operation section for inputting control data. In addition to a switch, an operating state display section for displaying a control state is provided, and a received data analysis section 1ob and a transmission data creation section 11 are provided.
A synchronizing clock signal generated by the clock generator 13 is input to the display controller 12 and the display controller 12 . On the other hand, the confirmation signal return unit 22 of the terminal device 2 is an input/output interface.
7 ace 22a1 reply data creation section 22b, signal reply section 22c. It is formed by a drive transistor Q0 and a current limiting resistor R, and a clock signal generated by a clock generation section 24 is input to the signal return section 22c and signal reception section 2o of the confirmation signal return section 22. . The operation of the embodiment will be specifically explained below. Now, the transmission signal Vs transmitted from m8!1 to each terminal 2 is w! As shown in Figure 14, it is a voltage mode signal that transmits 10V when the bit value of the bit data of the transmission data Dn is "1" and 5V when the bit value is "0", and is transmitted from each terminal device 2. The return signal vb sent back to the parent PIi1 is a relatively large current (steady current This is a current mode signal that is generated using a current larger than the Further, the determination of the received signal and the return of the reception confirmation signal ACK are performed by the clock signal Pc generated by the clock generation section 24.
It is designed to be carried out based on the Here, the determination time setting means 23 sets a prescribed number of times for determining the length of the received signal of the transmission signal Vs transmitted via the signal #13 based on the clock signal Pc, If this specified number of times is set to 4'', for example, and the signal level of the received signal is the same while four clock signals Pc are obtained, the received signal determining section 21 determines that the received signal is valid. The bit values "1" and "θ" of the bit data transmitted in the received signal are determined and sequentially sent to the data processing section (provided in the received signal determination section 21).This data processing section Then, it is determined whether the address data AD of the received transmission data Dn matches the own unique address, and if they match, load control is performed based on the bit data of the control data transmitted subsequently. The data is created and output to a load control circuit (not shown) via the input/output interface 7 ace 22a.At the same time, a confirmation signal is sent to the reply data creation unit 22b via the input/output interface 22a. is sent, and a reception confirmation signal ACK generated by the reply data creation section 22b is sent to the signal line 3 as a return signal vb consisting of a current mode signal via the signal reply section 22c and the transistor Q0. At the parent*i which sends the transmission signal Vs consisting of a voltage mode signal that sequentially transmits each bit data of Dn, the reception confirmation signal ACK is sent to the confirmation signal determination unit 1.
0 reception unit 10a, and received data analysis unit 10b.
It is determined whether the received signal is the reception confirmation signal ACK, and if it is confirmed that the reception confirmation signal ACK returned from the terminal device 2 has been received, the transmission confirmation signal is sent to the transmission data creation unit 11m. send. When the transmission confirmation signal is input, the transmission data creation unit 11a stops transmission of the bit value of the bit data currently being transmitted, and
The next bit data of the transmission data Dn is sent to the signal line 3 via the driver part 11'b. In this case, the transmission data creation unit 11a continues to transmit the same bit data until the transmission confirmation signal is input, and transmits the next bit data when the transmission confirmation signal is input, so that each bit data The transmission time is the determination time set by the determination time setting means 23 of each terminal device 2 (that is, the period of the clock signal x the specified number of times). Therefore, the transmission speed of the transmission data transmitted from the parent FR 1 (
The pulse width) can be set appropriately using the judgment time setting means 23 of the terminal device 2, and the optimum transmission reliability and transmission speed can be easily set on the terminal device 2 side according to the type of load and the application. It becomes easy to add more terminals 2 and change the load, making it easier to change the system. The time chart shown in FIG. 4 is based on bit data B +
-B 2 - B s . . . , a noise N is introduced during the transmission of bit data B, and the signal level changes. Here, the signal output from the signal receiving section 20 is the transmission signal V
This is a pulse signal obtained by sampling the received signal of s using the clock signal Pc, and the counter provided in the received signal determination section 21 counts this pulse signal while the signal level is the same, and when the signal level changes. When the count value of this counter reaches 4'', the received signal determination unit 21 outputs a confirmation signal sending signal, and the confirmation signal return unit 22 outputs a reception confirmation signal ACK. It is designed to be sent back to parent #j11. Therefore, bit data B l that is normally transmitted
-B z reception confirmation signal ACK is sent when the count value of the counter reaches lI411, and base unit 1 transmits the next bit data B,, B, by receiving this reception confirmation signal ACK. Therefore, the bit data B + -B z is transmitted at a predetermined transmission speed according to the determination time set by the determination time setting means 23. On the other hand, when receiving bit data B3 with noise N included during transmission, the counter of the received signal determination unit 21 is reset at the time when noise N is included, and the count value becomes 1''l.
Therefore, the judgment operation of the received signal is started again from that point on, and the count value of the counter becomes ``4''.
'', the reception confirmation signal ACK will be sent back. Therefore, the base unit 1 that continues to transmit the bit data B3 until this reception confirmation signal ACK is received.
The transmission time (pulse width) of bit data B is longer than the predetermined transmission time. Incidentally, FIGS. 5 and 6 are 70-charts showing the above operation. Effects of the Invention As described above, the present invention connects one base device and a plurality of terminal devices each having a unique address to a pair of signal lines,
Transmission data consisting of address data for accessing each terminal device from the base device and control data for controlling the load connected to the upstream terminal device is transmitted via a signal line, and the above transmission data is received from the accessed terminal device. In a data transmission device that sends a reception confirmation signal indicating the status back to the base unit via a signal line, a received signal determination method determines whether each bit of data transmitted from the base unit has been reliably received. The terminal device is provided with a confirmation signal return section that returns a reception confirmation signal when a reception confirmation output is obtained from the reception signal determination section, and a confirmation signal return section that returns the reception confirmation signal when the reception confirmation signal is received from the terminal device. Judgment time setting means for making it possible to set a signal judgment time for sequentially transmitting each bit data of the transmission data while confirming reception by providing a signal transmitting section in the base unit, and to set the signal judgment time to be sent to the received signal judging section. is installed in the terminal, and the transmission speed of data transmitted from the base unit can be set as appropriate using the terminal's judgment time setting means, ensuring optimal transmission reliability depending on the type of load and application. Also, since the transmission speed can be easily set on the terminal side, it is easy to add more terminals and change the load, making it easier to change the system.

[Brief explanation of drawings]

FIG. 1 is a diagram showing a configuration example of a data transmission device according to the present invention, FIGS. 2 and 3 are block circuit diagrams of main parts of an embodiment of the present invention, and FIG. 4 is a time chart showing the operation of the same. 5 and 6 are flowcharts showing the same operation as above,
FIG. 7 is a time chart showing the operation of the conventional example. 1 is a base unit, 2 is a terminal device, 3 is a signal line, 10 is a confirmation signal determination section, 11 is a signal transmission section, 21 is a received signal determination section, 22
is a confirmation signal return section, and 23 is a judgment time setting means. Agent Patent Attorney Ishi 1) Chief Figure 7 6

Claims (1)

[Claims] (1) One base unit and multiple terminals with unique addresses are connected via a pair of signal lines, and each terminal is accessed from the base unit with address data and loads connected to the terminals. transmission data consisting of control data for controlling is transmitted via a signal line, and a reception confirmation signal indicating that the above transmission data has been received from the accessed terminal is sent back to the base unit via the signal line. The transmission device includes a reception signal determination unit that determines whether each bit of transmission data transmitted from the base unit has been reliably received, and a reception confirmation signal that outputs a reception confirmation signal when a reception confirmation output is obtained from the reception signal determination unit. Each bit data of the transmitted data can be received by providing a confirmation signal return section on the terminal device and a signal transmitting section that transmits the next bit data when receiving the reception confirmation signal from the terminal device. 1. A data transmission device, characterized in that a terminal device is provided with a determination time setting means for sequentially transmitting data while confirming the received signal, and for making it possible to freely set a signal determination time in the received signal determination section.