JPS61242099A - Manufacture of high-density multilayer interconnection board - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a method for manufacturing a high-density multilayer wiring board, and more particularly, to a method for manufacturing a high-density multilayer wiring board on which semiconductor elements, magnetic bubble elements, etc. can be mounted.

[Technical background of the invention]

Printed boards are required to have finer lines and higher density patterns as the density of integrated elements increases. Various pattern forming methods have been proposed to achieve extremely high pattern density. For example, one of them is a method of manufacturing a multilayer wiring board, in which circuit formation and insulating layer formation are repeated layer by layer on a substrate.

This method uses a heat-resistant photopolymer as an insulating layer and forms minute holes for via holes by optical processing.
It has the advantage that it is possible to increase the density of the pattern.

However, in order to flatten the unevenness of the lower wiring or in relation to the characteristic impedance, it is necessary to increase the thickness of the photopolymer layer and lima layer used as the insulating layer.

For this reason, when photoprocessing is performed, the shape of the via hole formed in the photopolymer layer becomes a forest-like shape due to the wraparound of light, or if the hole is extremely small, it cannot be resolved.

A method for manufacturing high-density multilayer wiring boards by forming via holes using plasma etching has also been proposed (1958 Institute of Electronics and Communication Engineers Semiconductor Materials Division National Conference, Proceedings, Lecture No. 27, Title: Thick Resin Insulation Formation of multilayer wiring board using film).

In the above method, as shown in FIG. 1, an insulating layer 3 of 10 to 30 μm is formed of a heat-resistant resin such as polyimide resin on a printed board (FIG. 1a) on which a first layer conductor 2 is formed on a substrate 1.
A metal layer 4 with a thickness of 1 to 2 μm is deposited on top of the metal layer 4 to prevent the exposure light from penetrating.
), and a photoresist 5 is further formed thereon to a thickness of 1 to 1.5 .mu.m to form a three-layer structure (FIG. 1C).

Next, T! is applied to the photoresist 5 through the photomask 6! light 7
L (FIG. 1d), and a resist pattern 8 is formed by development (FIG. 1e). Next, the resist film 8 is transferred onto the metal layer 4 by the parallel plate type RIB method to form a metal layer pattern 9 (FIG. 1f). The parallel plate type RIB method produces anisotropy in etching and enables etching to match the dimensions of the etchant, so it is advantageous for forming fine patterns.

Next, using the metal pattern 9 as a mask, parallel plate type RIB
The pattern is transferred onto the insulating layer 3 by a method to form an insulating layer pattern 10 (FIG. 1g). Finally, the metal layer 4 is removed (FIG. 1h).

Using the parallel plate RIB method with a three-layer structure has the advantage of making it possible to form minute via holes, but the process is complicated because the metal layer must be vapor-deposited and the metal layer must be removed. There were drawbacks.

[Summary of the invention]

The present invention has been made in view of the above points, and it is an object of the present invention to provide a method for manufacturing a high-density multilayer wiring board that can form fine via holes easily and satisfactorily.

Therefore, according to the method for manufacturing a high-density multilayer wiring board according to the present invention, (A) preparing a printed board on which a first layer circuit is formed; (B'') covering the entire surface of the printed board with an organic polymer material; (C) Step of forming a silicone photopolymer layer on the entire surface of the organic polymer material layer; (D) Forming holes for relay holes in the silicone photopolymer layer by exposing and developing the silicone photopolymer layer through a photomask. (E) using the silicone photopolymer layer as a mask to transfer via hole holes to the organic polymer material layer using oxygen plasma; (F) simultaneously forming upper conductor and via hole plating with plating metal. It is characterized by containing.

According to the method of manufacturing a high-density multilayer wiring board according to the present invention, an organic polymer material layer and a silicone photoresist layer are sequentially formed on a substrate on which a first layer conductor is formed, and via holes are patterned and oxygen plasma is applied. This includes the process of transferring an organic polymer material layer and forming a conductor by plating, making it possible to create multiple layers of high-density wiring by miniaturizing via holes, creating a high-density multilayer wiring board with excellent pattern accommodation capacity. becomes possible to manufacture. Another advantage is that it can be used as an insulating layer without removing the organic polymer layer and silicone photoresist.

[Detailed description of the invention]

The present invention will be described in detail below in accordance with the order of each step and the drawings.

FIG. 2 is a cross-sectional view of a substrate at each step for explaining an example of the method for manufacturing a high-density multilayer wiring board according to the present invention, in which 21 is an insulating substrate, 22 is a first layer conductor pattern,
23 is an organic polymer layer, 24 is a silicone photopolymer layer, 25 is a photomask, 26 is exposure light (for example, ultraviolet light), 27 is a via hole in the silicone photopolymer layer, 28 is an organic polymer layer, 29 is a plated conductor, 21
0 indicates a via hole.

(A) Step of preparing a printed board on which a first layer circuit is formed.

FIG. 2A is a sectional view of the insulating substrate 21 and the first conductive pattern 22 formed thereon.

As the above-mentioned insulating substrate 21, for example, a silicon substrate,
Ceramic substrates, polyimide resin, epoxy resin laminates, etc. can be used.

The first layer conductor pattern 22 thus formed on the insulating substrate 21 can be manufactured using a conventional pattern forming method for such a multilayer wiring board.

(B) A step of forming an organic polymer material layer on the entire surface of the printed board.

FIG. 2B is a cross-sectional view of the substrate in step B and step C, which will be described later.
The figure shows an organic polymer material layer 23 and a silicon-based photopolymer layer 24 formed on the insulating base 21 formed with 2.

The organic polymer material layer 2 formed on the printed board in this way
The material of No. 3 is not limited in the present invention.
For example, organic polymer materials conventionally used as insulating layers can be effectively used. Specifically, heat-resistant polymeric materials such as polyimide, or organic polymeric materials such as polyacrylic, polystyrene, and aliphatic polyester can be used. The method of forming the organic polymer material layer 23 is basically not limited, and is preferably formed to a thickness of 10 μm or more by, for example, casting or spinner coating. If it is thinner than 10 μm,
This is because it is difficult to become smooth and there is a risk of problems with insulation.

(C) A step of forming a silicone photopolymer layer on the entire surface of the organic polymer material layer.

As shown in Figure 2B, the aforementioned polymeric organic material! 1j2
As the silicon-based photopolymer layer 24 formed on 3, for example, one of the siloxane-based polymers having the following general formulas (1) to (II) and the following general formula (III)
A compound containing one or more selected from the group of compounds represented by can be used. Since such a silicone-based photopolymer is in a liquid state, it is formed by applying it to a thickness of preferably 0.2 μm or more, most preferably 0.2 to 1 μm, using a method such as a spin code. 0.2μm
If it is below, there is a possibility that the silicone photopolymer M24 will disappear due to etching before the polymer material layer 23 with a thickness of 10 μm or more is etched. Furthermore, if the silicone photopolymer layer 24 is too thick, there is a risk that the resolution will decrease.

(Left space below) General formula (1) General formula (ff) Indicates a type of group selected from the group consisting of, Lm+n is 0
Or a positive regulating force (1 and m cannot be O at the same time) General formula (I[[) Low, medium, R is a direct bond or -CH2-, -0-, -C
(D) A step of forming a hole for a revia hole in the silicone photopolymer layer by exposure and development through a photomask.

FIG. 2C is a sectional view showing the step of exposing the silicone photopolymer layer 24 to light through a photomask 25. As the photomask 25, it is possible to use, for example, a so-called negative type photomask in which the via hole holes are painted black.

Exposure is performed through such a photomask 25, and as the exposure light, for example, ultraviolet light, electron beams, X-rays, etc. can be used. When using such ultraviolet light 26, it is preferable to use an irradiation amount of 50 to 100 mJ/cd. If the irradiation amount is less than 50 mJ/cat, there is a risk that the pattern will become thinner.
If it exceeds 0011J/el+1, there is a risk that resolution will deteriorate.

The second drawing is a cross-sectional view when a via hole hole 27 is formed in the silicone photopolymer layer by development.

The patterning of the silicone photoresist is not fixed in the present invention. For example, as a developing solvent, a mixed solvent of xylene and cyclohexane (composition ratio:
Using xylene/cyclohexane = 7/3 to 9/1),
Develop for 20-30 seconds, then use cyclohexane for 15-30 seconds.
This can be done by rinsing for seconds. Other developing solvents that can be used include, for example, xylene, MEK (methyl ethyl ketone), and mixed solvents of one or more of these solvents and one or more of cyclohexane, ethylcyclohexane, and the like.

In the development process, the portions of the silicone photoresist (silicone photopolymer) that are crosslinked by irradiation with ultraviolet light remain without being eluted, and the uncrosslinked portions that are not irradiated with ultraviolet light are eluted.

Because silicone photoresists contain silicon,
Excellent oxygen plasma resistance and etching rate of 20~
40 people/minute, which is 1/25 to 1150 compared to the etching rate of 1000 people/minute for the organic polymer material layer 23. Therefore, the silicone photoresist plays the role of an etching mask for the oxygen plasma. Via hole holes 28 can be formed in the organic polymer material layer 23 without deforming the film.

(E'') Using the silicone photopolymer layer as a mask, a step of transferring the via hole hole to the organic polymer material layer using oxygen plasma.

FIG. 2E is a cross-sectional view of the via hole hole 28 transferred to the organic polymer material layer 23 by oxygen plasma.

Using the patterned silicone photoresist as an oxygen plasma etching mask, a via hole hole 28 in the organic polymer layer 23 is formed with a volume of, for example, 5 to 40 .mu.ml using a parallel plate type oxygen plasma apparatus. The etching conditions using oxygen plasma include oxygen (0
2), flow rate 30-100 SCCM, gas pressure 10
~100m Torr, RF power 50~500!
A. Preferably, the etching time is 15 to 35 minutes.

If the gas pressure is less than 1Qm Torr, there is a drawback that the etching rate ratio of the polymeric organic material layer/silicone photopolymer layer becomes too small, while if it exceeds 100 mTorr, side etching may occur. Also,
If the RF power is less than 50 W, the etching time becomes too long and is not economical, while if it exceeds 500 W, there is a risk of thermal damage.

(F) A process of simultaneously forming the upper layer conductor and via hole plating using plated metal.

FIG. 2F is a cross-sectional view in which a conductor pattern 29 and a via hole 210 are formed using plated metal. The conductor pattern 29 and the via hole 210 can be formed by a commonly used additive process.

The plating metal can effectively plate metals conventionally used in this type of technology. For example, it can be copper.

In this case, since the polyimide resin that is the conventional insulating layer is alkali-soluble, there was a problem that it would dissolve in an electroless copper plating bath and contaminate the plating solution, but in the case of the present invention, the silicone photopolymer layer is insoluble in alkali,
Since it serves as a protective film, stable plated copper can be obtained without contaminating the plating solution. Furthermore, since a silicon oxide layer is formed on the surface of the silicone photopolymer layer (photoresist) by oxygen plasma, it is expected to have good adhesion to the plated copper.

Examples of the present invention will be described below.

Example 1 Using a ceramic substrate as a starting material, a first layer conductor pattern (pattern width 30 μm, pad diameter 50 μm, thickness 5 μm
(story) was formed. Next, a liquid polyimide resin was used as an organic polymer material using a spin cord method to obtain a
A film of 10μ■ was applied uniformly at a rotation speed of 0 rpm, and
It was cured at 50°C for 30 minutes.

Next, a silicone photoresist (photopolymer) was applied thereon to a thickness of 0.3 .mu.I by a spin coating method.

The silicone photopolymer used here is methacryloyloxymethylated phenylpolysiloxane (compound of general formula (1)) with a methacryloylation rate of 20%, and 2,6-di(4°-azidobenzal)-4- as a sensitizer. 5 methylcyclohexanone (compound of general formula (III))
% by weight was added.

, X5R1 and R2 in general formulas (1), (II) and general formula (III) are shown together at the end of Example 2 together with those of Example 2.

Next, ultraviolet light was irradiated through a photomask via hole with a diameter of 30 μm. The irradiation conditions for ultraviolet light are a 3kW ultra-high pressure mercury lamp (manufactured by Oak, Phoenix 3000).
The test was carried out at 15 mJ/ctl. Next, it was developed and processed. The development processing conditions are: development solvent composition: xylene/
Cyclohexane=8/2, development time was 15 seconds, and rinsing with cyclohexane was 20 seconds.

As a result, holes for via holes in the silicone photoresist layer were formed. Next, holes for via holes were formed in the polyimide resin layer using oxygen plasma. The oxygen plasma conditions were a parallel plate dry etching device (DEM-451) manufactured by ULVAC, in an oxygen atmosphere, and a gas flow rate of 5.
05 CCM, gas pressure 30 mT.

rr,, RF power 200 W, interelectrode voltage 80
Etching was performed at 0 V for 20 minutes.

Furthermore, conductor pattern 20μ steel, pad diameter 3 is coated with electroless copper plating using a commonly used semi-additive method.
A via hole of 20 μm was formed.

Insulating layers and circuits were formed by the method described above, and a high-density multilayer wiring board was manufactured.

Example 2 As a photoresist, methacryloyloxymethylated polyphenylsilsesquioxane (compound of general formula (III)) with a methacryloylation rate of 43% was added as a sensitizer to 2.6%.
A high-density multilayer wiring board was manufactured in the same manner as in Example 1 except that 5% by weight of -di(4'-azidobenzal)-4-methylcyclohexanone was used.

The method for manufacturing a high-density multilayer wiring board according to the present invention enables the formation of minute via holes, and the organic polymer material layer and silicone photoresist can be used as they are as insulating layers, reducing the number of steps and making the process less complicated. can be solved.

(Leaving space below) ;Machi-shimasu Itari 1 General formula (I) Methacryloyloxymethylated phenylpolysiloxane H3 Methacryloyloxymethylated polyphenylsilsesquioxane Ha x! -cH! -0-C-c TomiCH2 General formula (III) 2.6-di(4'-azidobenzal)-4-methylcyclohexanone R1 = Same as Example 1 Rg = Hydrogen atom [Effect of the invention] As explained above As a method for manufacturing a high-density multilayer wiring board according to the present invention, an organic polymer material layer and a silicone photoresist layer are provided on a substrate on which a first layer conductor is formed, holes for via holes are patterned, and organic polymer material layers are formed using oxygen plasma. Since the process includes transferring the conductor to the material layer and forming the conductor by plating, it is possible to create multiple layers of high-density wiring by miniaturizing the via holes, creating a high-density multilayer wiring board with excellent pattern accommodation capacity. Can be provided. Furthermore, without removing the organic polymer material layer and silicone photoresist layer,
It also has the advantage of being able to be used as an insulating layer as is.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional view of each step to explain the manufacturing process of a conventional multilayer wiring board, and FIG. 2 is a cross-sectional view of each step to explain the manufacturing method of a high-density multilayer wiring board according to the present invention. . 21... Insulating substrate, 22... First layer conductor pattern,
23... Organic polymer material layer, 24... Silicone photopolymer layer, 25... Photomask, 26... Exposure light, 27... Via hole hole in silicone photopolymer layer, 28... - Hole for via hole in organic polymer material layer, 29... second layer conductor pattern, 210... via hole. Applicant's agent Tadashi Amemiya Figure 2

Claims (2)

[Claims] (1) (A) Step of preparing a printed board on which a first layer circuit is formed; (B) Step of forming an organic polymer material layer on the entire surface of the printed board; (C) On the organic polymer material layer. (D) forming a hole for a relay hole in the silicone photopolymer layer by exposing and developing the silicone photopolymer layer through a photomask; (E) applying oxygen plasma using the silicone photopolymer layer as a mask. A method for manufacturing a high-density multilayer wiring board, comprising: (F) simultaneously forming an upper layer conductor and via hole plating using plated metal. (2) The silicone photopolymer has the following general formula [
A patent claim comprising any of the siloxane polymers I] to [II] and one or more selected from the group of compounds represented by the following general formula [III] A method for manufacturing a high-density multilayer wiring board according to item 1. General formula [I] ▲ There are mathematical formulas, chemical formulas, tables, etc. ▼ General formula [II] ▲ There are mathematical formulas, chemical formulas, tables, etc. ▼ Indicates a type of group selected from the group consisting of, l, m, n are 0 or Indicates a positive integer, but l and m cannot be 0 at the same time) General formula [III] ▲There are mathematical formulas, chemical formulas, tables, etc.▼ (In the formula, R_1 is a direct bond or -CH_2-, -O-
, -CH=CH-, -N=N-, ▲There are mathematical formulas, chemical formulas, tables, etc.▼, -C-, -CH=CH-C-CH=CH
-, ▲There are mathematical formulas, chemical formulas, tables, etc.▼ or ▲Mathematical formulas,
There are chemical formulas, tables, etc. ▼ This is a group represented by , where R_2 is a hydrogen atom or a halogen atom)