JPS61242048A - Sealing plate with window frame-shaped brazing material for semiconductor package - Google Patents

Sealing plate with window frame-shaped brazing material for semiconductor package

Info

Publication number
JPS61242048A
JPS61242048A JP60084229A JP8422985A JPS61242048A JP S61242048 A JPS61242048 A JP S61242048A JP 60084229 A JP60084229 A JP 60084229A JP 8422985 A JP8422985 A JP 8422985A JP S61242048 A JPS61242048 A JP S61242048A
Authority
JP
Japan
Prior art keywords
alloy
sealing plate
window frame
brazing
main body
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60084229A
Other languages
Japanese (ja)
Inventor
Naoki Uchiyama
直樹 内山
Kiyoshi Takaku
高久 潔
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Metal Corp
Original Assignee
Mitsubishi Metal Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Metal Corp filed Critical Mitsubishi Metal Corp
Priority to JP60084229A priority Critical patent/JPS61242048A/en
Publication of JPS61242048A publication Critical patent/JPS61242048A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/02Containers; Seals
    • H01L23/10Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/02Containers; Seals
    • H01L23/04Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1515Shape
    • H01L2924/15153Shape the die mounting substrate comprising a recess for hosting the device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/15165Monolayer substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16195Flat cap [not enclosing an internal cavity]

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To prevent the deformation of the brazing materials and to eliminate the intrusion of a foreign substance such as dust by a method wherein he brazing materials are firmly, and at the same time, fully fusion-bonded on the clad material main body in a state retaining its original form. CONSTITUTION:An Fe-Ni alloy or an Fe-Ni-Co alloy is used as a core material 4A. Window frame-shaped Pb alloy or Au alloy brazing materials 4b are fusion- bonded on a clad plate material main body 4E, consisting of an Ni-clad plate material, of one surface of the core material 4A in a half-fused state through an Ni clad layer 4D. If so, such a trouble that the brazing materials 4b peel off and are deformed is eliminated, because the brazing materials 4b are firmly, and at the same time, fully being fusion-bonded on the main body 4E in a state retaining its original form. Accordingly, the intrusion of a foreign substance such as dust becomes nil.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は、ICは勿論のこと、大容量メモリー素子で
ある64KDRAMや256 KDRAMなどのメモリ
ー、さらに高い信頼性が要求される各種のLSや超LS
Iなどの半導体パッケージの組立てに際して、ケース本
体へのろう付けを、簡単な操作で確実に、かつ高い信頼
性をもって行なうことができる窓枠状ろう材付封着板に
関するものである。
[Detailed Description of the Invention] [Field of Industrial Application] This invention is applicable not only to ICs, but also to memories such as 64KDRAM and 256KDRAM, which are large-capacity memory devices, and various types of LS and LS that require high reliability. Super LS
The present invention relates to a window frame-shaped brazing material-attached sealing plate that can be brazed to a case body with simple operation, reliably, and with high reliability when assembling a semiconductor package such as I.

〔従来の技術〕[Conventional technology]

一般ニ、半導体パッケージの1つとして、第1図に概略
縦断面図で示されるICセラミック・パッケージが知ら
れている。
2. Description of the Related Art Generally, as one type of semiconductor package, an IC ceramic package, which is shown in a schematic vertical cross-sectional view in FIG. 1, is known.

このICセラミック・パッケージは、主として所定のキ
ャビティをもつ九セラミックケース1と、このキャビテ
ィの底部にろう付けされたシリコンチップなどの半導体
素子2と、AuあるいはA7の極細線からなるボンディ
ングワイヤ3と、セラミックケース1の上面にろう付け
された封着板4と、゛セラミックケース1の側部にろう
付けされたリード材5で構成されている。
This IC ceramic package mainly includes a ceramic case 1 having a predetermined cavity, a semiconductor element 2 such as a silicon chip soldered to the bottom of the cavity, and a bonding wire 3 made of ultrafine Au or A7 wire. It consists of a sealing plate 4 brazed to the top surface of the ceramic case 1 and a lead material 5 brazed to the side of the ceramic case 1.

このように半導体パッケージの組立てに際しては、セラ
ミックケースの上面に封着板がろう付けさnるが、この
封着板のセラミックケース上面へのろう付けは、第2図
に概略平面図で示されるように、例えばFe −4’4
 XNi合金あるいはFe−29XNi −7%Co合
金などの板材本体4aの片面(ろう付は面]に、窓枠状
のAu合金(例えばAu−20%Sn合金)などのろう
材4bをスポット溶接4cc図面では4ケ所】にて取付
けた封着板4を用い、この封着板をセラミックケースの
上面に乗せた状態で加熱炉中で加熱して前記ろう材を溶
融させることにより行なわれている。
In this way, when assembling a semiconductor package, a sealing plate is brazed to the top surface of the ceramic case, and the brazing of this sealing plate to the top surface of the ceramic case is shown in a schematic plan view in FIG. For example, Fe-4'4
Spot weld 4 cc of brazing material 4b such as a window frame-shaped Au alloy (for example, Au-20% Sn alloy) to one side (brazing is on one side) of the plate main body 4a such as XNi alloy or Fe-29XNi-7%Co alloy. This is accomplished by using a sealing plate 4 attached at four locations in the drawing, and heating the sealing plate on the top surface of the ceramic case in a heating furnace to melt the brazing filler metal.

〔発明φ解決しよりとする問題点〕[Problems to be solved by invention φ]

しかし、上記の従来封着板においては、上記のよりにろ
う材が板材本体にスポット溶接にて取付けられているた
めに、その取付けが不安定であシ、この結果ろう材が剥
離し7′2.す、変形し几りし易く、′ かつ板材本体
とろう材との間に異物の侵入も起シ易く、作業性および
信頼性の点で問題のあるものである。
However, in the above-mentioned conventional sealing plate, since the brazing metal is attached to the plate main body by spot welding, the attachment is unstable, and as a result, the brazing metal peels off. 2. However, it is easy to deform and shrink, and it is also easy for foreign matter to enter between the plate body and the brazing filler metal, which poses problems in terms of workability and reliability.

〔問題点を解決するための手段〕[Means for solving problems]

そこで、本発明者等は、上述のよりな観点から従来半導
体パッケージ用封着板のもつ問題点を解決子べく研究を
行なつ几結果、封着板を、第3図に概略縦断面図で示さ
れるよりに、Fe−Ni合金またはFe −Ni −C
o合金を心材4Aとし、この心材の片面にNi (4D
 )をクラッドしたものからなるクラッド板材本体4E
に、前記Niクラッド層4Dを介して窓枠状のPb合金
たはAu合金ろう材4bを半溶融融着し友もので構成す
ると、前記ろう材4bは、前記Niクラッド層によって
クラッド板材本体4Eに強固に原形を保って全面融着し
ているので、前記ろう材が剥離したり、変形したりする
ことがなく、異物の侵入も皆無となることから、半導体
パッケージの組立てに際しての封着板のセラミックケー
ス上面へのろう付は作業性が向上し、かつ高い信頼性を
有する半導体パッケージを得ることができるようになる
という知見を得たのである。
Therefore, the present inventors conducted research to solve the problems of conventional sealing plates for semiconductor packages from the above-mentioned viewpoint, and as a result, the sealing plate is shown in FIG. 3 in a schematic vertical cross-sectional view. As shown, Fe-Ni alloy or Fe-Ni-C
o alloy as core material 4A, and one side of this core material is Ni (4D
) clad plate main body 4E
When a window frame-shaped Pb alloy or Au alloy brazing material 4b is semi-fused and bonded via the Ni cladding layer 4D, the brazing material 4b is bonded to the clad plate main body 4E by the Ni cladding layer. Since the solder metal is fully fused while maintaining its original shape, the brazing filler metal will not peel or deform, and there will be no intrusion of foreign matter, making it ideal for use as a sealing plate when assembling semiconductor packages. They found that brazing to the top surface of a ceramic case improves workability and makes it possible to obtain a highly reliable semiconductor package.

したがって、この発明は、上記知見にもとづいてなされ
たものであって、Fe−Ni系合金またニFe−Ni−
Co系合金の心材の片面にNiをクラッドしたクラッド
板材本体に、前記Niクラッド層を介して窓枠状のPb
合金たはAu合金ろう材を半溶融融着してなる半導体パ
ッケージ用窓枠状ろう材付封着板に特徴を有するもので
ある。
Therefore, the present invention has been made based on the above findings, and is based on the above findings.
A window frame-shaped Pb layer is applied to the clad plate main body, which is made by cladding Ni on one side of a core material of a Co-based alloy, through the Ni cladding layer.
The present invention is characterized by a window frame-shaped brazing material-attached sealing plate for a semiconductor package, which is formed by semi-molten welding of an alloy or an Au alloy brazing material.

なお、この発明の封着板は、第4図に要部概略縦断面図
で示されるように、例えば上面に封着板とほぼ同じ平面
形状をもった複数の凹み6を有するステンレス鋼製保持
具7を用意し、この保持具7の前記凹み6に、まず窓枠
状のろう材4bを入れ、その上にクラッド板材本体4E
をNiクラッド層4Dを下にして置き、さらにその上に
押え板8を置いた状態で、 Arまたは窒素などの不活
性ガス雰囲気、あるいは水素または水素と窒素の混合ガ
スなどの還元性ガス雰囲気において、ろう材の固相線以
上にして融点+10℃以下の範囲内の所定温度に加熱し
て、前記ろう材を半溶融状態とすることにより、前記ろ
う材4bをNiクラッド層4Dを介してクラッド板材本
体4Eに、ろう材の原形!保持し次状態で全面融着する
ことにより製造することかできる。
The sealing plate of the present invention has, for example, a stainless steel holder having a plurality of recesses 6 on the top surface having approximately the same planar shape as the sealing plate, as shown in a schematic vertical cross-sectional view of the main part in FIG. Prepare a tool 7, first put a window frame-shaped brazing material 4b into the recess 6 of this holder 7, and then place the clad plate main body 4E on top of it.
is placed with the Ni cladding layer 4D facing down, and the presser plate 8 is placed on top of it, in an inert gas atmosphere such as Ar or nitrogen, or in a reducing gas atmosphere such as hydrogen or a mixed gas of hydrogen and nitrogen. By heating the brazing filler metal to a predetermined temperature within the range of above the solidus line of the brazing filler metal and below the melting point +10° C. to bring the brazing filler metal into a semi-molten state, the brazing filler metal 4b is clad with the Ni cladding layer 4D. The original shape of the brazing material is on the board body 4E! It can be manufactured by holding and fusing the entire surface in the next state.

〔実施例〕〔Example〕

つぎに、この発明の封着板を実施例により説明する。 Next, the sealing plate of the present invention will be explained with reference to examples.

ろう材として、外側平面寸法が12.7ml:I、内側
平面寸法が10.3gm0にして、幅寸法が2.4 y
x 。
As a brazing material, the outer plane dimension is 12.7ml:I, the inner plane dimension is 10.3gm0, and the width dimension is 2.4y.
x.

厚さが0.07mの寸法を有し、かつPb−10%Sn
の組成をもった窓枠状Pb合金う材と、同じ外側および
内側平面寸法を有するが、幅寸法が0.9 txにして
、厚さが0.03mの窓枠状Au合金(Au −20%
Sn合金]ろう材をそれぞれ用意し、第4図に示される
保持具7を用い、この凹み6内に、まず上記のろう材4
bを置き、ついで、その上に、平面+12.7m0X厚
さ:0.3mの寸法をもち、Fe −29%Ni −7
%Co合金の心材(厚さ: 0.28 m、m )4A
の片面にNi (厚さ:0.02mJ4Dをクラッドし
比ものからなるクラッド板材本体4Eを、Niクラッド
層4Dを下側にして重ね合わせ、これに押え板8を乗せ
次状態で、窒素雰囲気中、前記Pb合金う材については
、その固相線温度である270℃より高い290℃に加
熱し、また前記Au合金については、固相線である28
0℃に加熱して、前記ろう材4bをそれぞれ前記クラッ
ド板材本体4 E KNiクラッド層4Dを介して半i
融融着することによって本発明封着板をそれぞれ100
0個づつ製造した。
The thickness is 0.07m and Pb-10%Sn
A window frame-shaped Pb alloy filling material having the same composition as the window frame-shaped Au alloy (Au-20 %
[Sn alloy] Prepare each brazing filler metal, and using the holder 7 shown in FIG.
b, and then place a Fe-29%Ni-7 film on top of it, having dimensions of plane + 12.7 m0 x thickness: 0.3 m.
%Co alloy core material (thickness: 0.28 m, m) 4A
A clad plate main body 4E made of Ni (thickness: 0.02 mJ4D) is clad on one side of the plate, and the Ni cladding layer 4D is placed on the lower side. , the Pb alloy filling material is heated to 290°C, which is higher than its solidus temperature of 270°C, and the Au alloy is heated to 280°C, which is its solidus temperature.
Heating to 0° C., the brazing filler metal 4b is heated to 0.degree.
By fusion bonding, each of the sealing plates of the present invention was made into 100 pieces.
0 units were manufactured.

〔発明の効果〕〔Effect of the invention〕

この結果得られ几それぞれ1000個の本発明封着板に
ついて、ろう材のクラッド板材本体への融着状況を観察
したところ、全数が、ろう材の平面原形を保った状態で
、全面融着しており、きわめて強固な接着強度を有する
ものであつ几。
When we observed the state of fusion of the brazing filler metal to the clad plate main body for each of the 1,000 sealing plates of the present invention obtained as a result, we found that all of the 1000 sealing plates of the present invention were fused over the entire surface with the original planar shape of the brazing filler metal maintained. It has extremely strong adhesive strength.

また、この本発明封着板を半導体パッケージの組立てに
用い、組立て後、Heリークテストを行なったが、リー
クは皆無であシ、軟X線透過による検査でもボイドの発
生はほとんど見られなかった。
In addition, the sealing plate of the present invention was used to assemble a semiconductor package, and after assembly, a He leak test was conducted, and there was no leakage, and almost no voids were observed in soft X-ray transmission tests. .

上述のように、この発明の封着板によれば、ろう材がク
ラッド板材本体に強固に、かつ原形を保った状態で全面
融着しているので、これが剥離することがなく、したが
ってろう材に変形が起ったり、ま几両部材間にゴミなど
の異物が侵入し友りすることもないことから、丁ぐれた
作業性と信頼性を確保することができるのである。
As described above, according to the sealing plate of the present invention, the brazing material is firmly fused to the cladding material body over the entire surface while maintaining its original shape, so that it does not peel off, and therefore the brazing material This prevents deformation of the parts and prevents foreign matter such as dirt from entering between the two parts of the container, ensuring excellent workability and reliability.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はICセラミック・パッケージを示す概略縦断面
図、第2図は従来の封着板を示す概略平面図、第3図は
この発明の封着板を示す概略縦断面図、第4図はこの発
明の封着板の製造態様を示す要部概略縦断面図である。 1・・・セラミックケース、  2・・・半導体素子、
3・・・ボンディングワイヤ、4・・・封着板、5・・
・リード材、     4a・・・板材本体、4b・・
・ろう材、      4c・・・スポット溶接、4A
・・・心材、      4D・・・Niクラッド層、
4E・・・クラッド板材本体、6・・・凹み、7・・・
保持具、       8・・・押え板。
FIG. 1 is a schematic longitudinal cross-sectional view showing an IC ceramic package, FIG. 2 is a schematic plan view showing a conventional sealing plate, FIG. 3 is a schematic longitudinal cross-sectional view showing a sealing plate of the present invention, and FIG. FIG. 1 is a schematic vertical sectional view of main parts showing a manufacturing mode of the sealing plate of the present invention. 1... Ceramic case, 2... Semiconductor element,
3... Bonding wire, 4... Sealing plate, 5...
・Lead material, 4a...Plate material body, 4b...
・Brazing metal, 4c... spot welding, 4A
...heartwood, 4D...Ni cladding layer,
4E... clad plate main body, 6... dent, 7...
Holder, 8... presser plate.

Claims (1)

【特許請求の範囲】[Claims] Fe−Ni系合金またはFe−Ni−Co系合金の心材
の片面にNiをクラッドしたクラッド板材本体に、前記
Niクラッド層を介して窓枠状のPb合金またはAu合
金ろう材を半溶融融着してなる半導体パッケージ用窓枠
状ろう材付封着板。
A window frame-shaped Pb alloy or Au alloy brazing material is semi-molten welded to a clad plate body in which one side of a core material of a Fe-Ni alloy or a Fe-Ni-Co alloy is clad with Ni through the Ni cladding layer. Window frame shaped sealing plate with brazing material for semiconductor packages.
JP60084229A 1985-04-19 1985-04-19 Sealing plate with window frame-shaped brazing material for semiconductor package Pending JPS61242048A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60084229A JPS61242048A (en) 1985-04-19 1985-04-19 Sealing plate with window frame-shaped brazing material for semiconductor package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60084229A JPS61242048A (en) 1985-04-19 1985-04-19 Sealing plate with window frame-shaped brazing material for semiconductor package

Publications (1)

Publication Number Publication Date
JPS61242048A true JPS61242048A (en) 1986-10-28

Family

ID=13824642

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60084229A Pending JPS61242048A (en) 1985-04-19 1985-04-19 Sealing plate with window frame-shaped brazing material for semiconductor package

Country Status (1)

Country Link
JP (1) JPS61242048A (en)

Similar Documents

Publication Publication Date Title
JPS61154764A (en) Method of combining metal with structural member and combining material
JPH0582745B2 (en)
US5138114A (en) Hybrid/microwave enclosures and method of making same
EP0098176A2 (en) The packaging of semiconductor chips
JPS61242048A (en) Sealing plate with window frame-shaped brazing material for semiconductor package
JPS5910229A (en) Semiconductor device and fabrication thereof
JPH0228351A (en) Semiconductor device
JPS61242049A (en) Manufacture of sealing plate with window frame-shaped brazing material for semiconductor package
JPH0334862B2 (en)
JP2000068396A (en) Cover for hermetic seal
JPH0744024Y2 (en) Sealing plate with window frame brazing material for semiconductor ceramic package
JP2004055580A (en) Lid for sealing electronic component package
JPS5812478A (en) Manufacture of solid state image pickup device
JPS63188471A (en) Cap with solder frame
JPH0234945A (en) Brazing method
JPS5821424B2 (en) Method for manufacturing semiconductor material supporting substrate
JPH06216268A (en) Ic package
JPH03108361A (en) Semiconductor integrated circuit device
JPS63104355A (en) Seal ring of ic ceramic package and manufacture thereof
JPS635234Y2 (en)
JPH0639582A (en) Precise composite brazing filler metal
JPH03296237A (en) Rear surface joining method of semiconductor chip for thermal conduction and semiconductor device using it
JPH01243453A (en) Case body with solder material for semiconductor package
JP2001156232A (en) Manufacturing method of semiconductor device
JPH01184851A (en) Substrate element having bump