JPS61239498A - Method for writing of semiconductor non-volatile memory - Google Patents

Abstract

PURPOSE:To lower a maximum electric field applied to a thin oxide film, prevent a damage produced in a thin insulating film and increase the number of rewriting by making longer a rise time of an electric potential of a floating gate electrode to more than 300musec. CONSTITUTION:By using a fully slow rise pulse, before a control gate voltage reaches to a maximum control gate voltage VCGmax, an electron is injected into a floating gate electrode. Accordingly, even when a voltage of the control gate voltage reaches to the maximum value VCGmax, an electric potential of the floating gate electrode is not enhanced, so that a high electric field is not impressed to a floating gate oxide film 6, and therefore, a damage can be prevented. When the rise time of the writing control gate voltage pulse is above 300musec, a minimum drain writing voltage can be prevented from increasing.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a writing method for a semiconductor non-volatile memory,
In particular, the rise time of the write voltage pulse is 300 μsea.
The present invention relates to a writing method for a semiconductor nonvolatile memory that reduces deterioration of memory characteristics by doing the above.

[Summary of the invention]

This invention relates to a semiconductor nonvolatile memory writing method in which hot electrons of a channel current generated by an electric field applied between a source region and a drain region are injected into a floating gate electrode. The voltage pulse applied to the gate electrode was 300μ88.
By setting the number to 6 or more, the deterioration of rewriting characteristics is reduced.

[Conventional technology]

Generally, channel hot electrons are injected into a floating gate type semiconductor nonvolatile memory by applying a high voltage to the floating gate electrode. Since this write operation is desirably fast, the voltage rise time of the floating gate electrode is less than lOOμ8#O.

[Problem that the invention seeks to solve]

In a floating gate semiconductor memory, some of the channel hot electrons are captured by the gate-off R film during writing.
Ru. As a result, if rewriting is performed at t-edge, it becomes impossible to maintain a constant writing state.

[Problem f: Means for making a decision]

The present invention has been devised to solve the above problems, and its means are to increase the rising time of the potential of the floating gate electrode to 300 μsec or more.

[Effect]

During writing, rise time of floating gate electrode is 300μ
By making m166 or more, the injection region can be widened to reduce trapping of channel hot electrons into the gate insulating film, thereby improving rewriting characteristics.

〔Example〕

A cross-sectional view of a floating gate type semiconductor nonvolatile memory is shown in FIG. N medium-sized source region 2 and drain region 8t- are formed on the surface of P-type substrate 10, and source region 2 and drain region 8t- are formed.
A selection gate oxide film 4't-
A selection gate electrode 5 and a floating gate electrode 7 are formed in series through the floating gate oxide g6. A control gate electrode 9 is formed on floating gate electrode 7 with a control gate oxide film 8 interposed therebetween. The floating gate electrode 7 has strong capacitive coupling with the control gate electrode 9. That is, the potential of floating gate electrode 7 is controlled by the voltage of control gate electrode 9. The memory is a device that stores two states, one in which the channel region under the selection gate electrode is inverted, one in which the channel under the floating gate electrode 7 is inverted, and one in which it is not inverted. If there are a large number of electrons in the floating gate electrode 7, there will be no inversion. Conversely, when no electrons enter the floating gate electrode 7, the state is reversed. A method for injecting electrons into the floating gate electrode 7 will be explained.

When a power supply voltage of 5V' is applied to the drain region 8 with reference to the potential of the substrate and the source region 2, the channel under the selection gate electrode 5 is weakly inverted, and the channel under the floating gate electrode is image-inverted. Apply a voltage like this. For example, if the impurity concentration of the substrate is 1 x 10" cm, the oxide thickness is 200 A, and the floating gate oxide thickness is 120 A, the threshold voltage of approximately 2 Vt is applied to the select gate electrode 5. However, the floating gate electrode 7 is sufficiently positively charged and a high voltage of about 107'' Ik is applied to the control gate electrode 9 so that the channel under the floating gate electrode is inverted. Selective gate oxidation! The channel potential below 14 becomes equal to the potential of the source region, and the channel potential below floating gate oxide film 6 becomes equal to the potential of drain region 3. That is, the potential of the channel region where the selection gate oxide film and the floating gate oxide layer intersect suddenly changes from the potential of the source region to the potential of the drain region. This occurs, and a portion of it is injected into the floating gate electrode 7.

According to the above-described advanced semiconductor nonvolatile memory writing method, when electrons are injected into the floating gate electrode 7, a high electric field is applied to the floating gate oxide film 6, so that the hot electron injection region is concentrated in a narrow region of floating gate oxide film 6. The present invention is a method of writing in a state where the electric field applied to the floating gate oxide film 6 is weakened by slowing down the rise of the write voltage pulse.

A specific example is shown in FIG. FIG. 2 shows the waveform of the control gate voltage pulse during convolution. If the pulse is slow enough, the control gate voltage will reach the maximum control gate voltage V6.
Electrons are injected into the floating gate electrode before reaching mW.
Ru. Therefore, the voltage of the control gate voltage is maximum ['7c a
Since the potential of the floating gate electrode does not become very high even when the voltage reaches max.maz, a high electric field is not applied to the floating gate oxidation layer B6, and damage can therefore be prevented. The pulse waveform shown in FIG. 1 is made possible by providing a control gate voltage pulse waveform forming circuit inside the semiconductor nonvolatile integrated circuit.

FIG. 8 is a diagram showing the effects of the present invention. The horizontal axis is the rising time of the write control gate layer pressure pulse, and the vertical axis is the 10
' The lowest drain write voltage after rewriting is reached. If rewriting is repeated, damage will occur to the floating gate oxide film 6, so a large voltage will be required as the write drain voltage generated on high-energy electrons. If the rise time of the write control gate voltage pulse is short, a strong electric field is applied to the floating gate oxide film 6, so that the minimum drain write voltage is large. However, if the rise time of the write control gate voltage pulse is set to t-aooμ[1 or more, the minimum drain write voltage can be prevented from increasing 7JOt-.

The writing method shown in FIG. 2 can be applied not only to the semiconductor nonvolatile memory shown in FIG. 1 but also to the semiconductor nonvolatile memory shown in FIG. A H+51 source region 12 and an N medium-sized drain region 13 are formed on the surface of a P-type substrate 11, and a floating gate oxide f is formed on the channel region.
i 16 ft via the floating gate electrode 17;
A control gate electrode 19 is formed on the floating gate electrode via a control gate oxide film. In such a memory as well, 5V is applied to the drain region and approximately L2V is applied to the control gate electrode to inject part of the electrons of the channel current into the floating gate electrode. Even in such a memory, damage to the floating gate oxide film can be reduced and the rewriting characteristics can be improved by applying a pulse to the control gate electrode in a pulse waveform as shown in FIG.

The writing method of the present invention as described above can be applied to a semiconductor nonvolatile memory in which some electrons of the channel current are injected into the floating gate electrode through a thin insulating film to which a high electric field is applied.

〔Effect of the invention〕

The present invention aims to increase the rise time of a write control gate electric pulse to 300 μs #O or more in writing to a semiconductor non-volatile memory in which a part of electrons in a channel current is injected into a floating gate electrode by applying a thin insulating field. This reduces the maximum electric field applied to the thin oxide film and prevents damage to the thin insulating film, making it possible to increase the number of rewrites to 7FD.

[Brief explanation of drawings]

FIG. 1 is a cross-sectional view of a memory to which the semiconductor non-volatile memory write method of the present invention is applied, and FIG. 2 is a pulse waveform diagram of the write control voltage that is the semiconductor non-volatile memory write method of the present invention. be. FIG. 3 is a diagram showing write characteristics of a semiconductor nonvolatile memory, and FIG. 4 is a sectional view of another semiconductor nonvolatile memory to which the present invention can be applied. 1.11. ,? type semiconductor substrate 2, L2. ．． 1iT+ type source regions 8, 13, , M+ type drain regions 7.17. ,
Floating gate electrode 9, 19', , control gate electrode Applicant Seiko Electronics Co., Ltd. Figure 1

Claims (1)

[Claims] A source region and a drain region of a second conductivity type different from the first conductivity type provided at intervals on the surface portion of the semiconductor substrate of the first conductivity type, and floating gate insulation in the surface portion of the semiconductor substrate between the source and drain regions. It consists of a floating gate electrode provided through a film, and a control gate electrode provided through the floating gate electrode and a control gate insulating film, and a drain write voltage is applied to the drain region with respect to the source region. , a semiconductor in which a part of the channel current flowing from the source region is injected into the floating gate electrode by applying a control gate write voltage that strongly inverts the surface of the semiconductor substrate under the floating gate insulating film to the control gate electrode. A method for writing in a semiconductor non-volatile memory, characterized in that the control gate write voltage is a pulse with a rise time of 300 μsec or more.