JPS6123715U - DC amplifier with offset cancellation circuit - Google Patents
DC amplifier with offset cancellation circuitInfo
- Publication number
- JPS6123715U JPS6123715U JP10913684U JP10913684U JPS6123715U JP S6123715 U JPS6123715 U JP S6123715U JP 10913684 U JP10913684 U JP 10913684U JP 10913684 U JP10913684 U JP 10913684U JP S6123715 U JPS6123715 U JP S6123715U
- Authority
- JP
- Japan
- Prior art keywords
- amplifier
- operational amplifier
- switching element
- cancellation circuit
- offset cancellation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Indication And Recording Devices For Special Purposes And Tariff Metering Devices (AREA)
- Character Input (AREA)
- Amplifiers (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
図面は本考案を筆記文字認識装置に実施した場合の例を
示すもので、第1図は筆記具を一部断面して示す図、第
2図は内部電子回路の構成を示す゜ブロック図、第3図
は第2図における■アンプの詳細を示す回路図である。
1・・・・・・本体、2・・・・・・芯、3a, 3b
t 3c・・・・・・半導体歪みゲージ、4・・・・・
・表示部、11・・・・・・CPU, 1 3・・・
・・・DCアンプ、OP1・・・・・・オペアンプ、O
P2・・・・・・オペアンプ、TG−−−−.. }ラ
ンスファーゲット。The drawings show an example in which the present invention is applied to a written character recognition device. Fig. 1 is a partially sectional view of a writing instrument, Fig. 2 is a block diagram showing the configuration of the internal electronic circuit, and Fig. 3 is a block diagram showing the configuration of the internal electronic circuit. This figure is a circuit diagram showing details of the amplifier (1) in FIG. 2. 1...Main body, 2...Core, 3a, 3b
t 3c... Semiconductor strain gauge, 4...
・Display unit, 11...CPU, 1 3...
...DC amplifier, OP1...Operational amplifier, O
P2... operational amplifier, TG----. .. } Lance Farget.
Claims (1)
されて基準電圧を供給するコンデンサと、上記オペアン
プの出力端子と上記コンデンサとの間に接続されるスイ
ッチング素子と、上記オペアンプへの入力信号の有無を
検出する手段と、上記オペアンプに入力信号を{与えら
れていない時に上記スイッチング素子をオンしてアンプ
出力電圧により上記コンデンザを充電−し、入力信号が
与えられると上記スイッチング素子をオフする手段とを
具備したことを特徴とするオフセット消去回路を有する
DCアンプ。An operational amplifier, a capacitor connected to one input terminal of the operational amplifier to supply a reference voltage, a switching element connected between the output terminal of the operational amplifier and the capacitor, and a switching element that determines the presence or absence of an input signal to the operational amplifier. and means for turning on the switching element to charge the capacitor with the amplifier output voltage when no input signal is applied to the operational amplifier, and turning off the switching element when the input signal is applied. A DC amplifier having an offset erasing circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10913684U JPS6123715U (en) | 1984-07-19 | 1984-07-19 | DC amplifier with offset cancellation circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10913684U JPS6123715U (en) | 1984-07-19 | 1984-07-19 | DC amplifier with offset cancellation circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6123715U true JPS6123715U (en) | 1986-02-12 |
Family
ID=30668303
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10913684U Pending JPS6123715U (en) | 1984-07-19 | 1984-07-19 | DC amplifier with offset cancellation circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6123715U (en) |
-
1984
- 1984-07-19 JP JP10913684U patent/JPS6123715U/en active Pending
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