JPS61226866A - Automatic discriminating system for substrate - Google Patents

Abstract

PURPOSE:To easily cope with a case even when a substrate in to which a discriminating function is not completely considered is mixed by providing an identifier output function and a means for renewing an identifier information at every time a read command for reading the identifier is issued. CONSTITUTION:A CPU 1 is connected to substrates 2-0, 2-1 through receiving side connectors 3-0, 3-1 and substrate connectors 4-0, 4-1. In this substrate, there is provided an identifier section having an identifier (ID) output function of a predetermined bit width constituted of a FF or the like, an initial value setting function of ID and a function for renewing an output value of the ID every time a program reads the ID. The identifier section designates an addrss assigned to the identifier by the CPU 1 to issue an ID reading command, and then a pulse is impressed to a clock terminal of the FF5 and a control terminal of 3 state gates 6-0 to 6-3, the ID information corresponding to the condition of the FF5 is outputted to bit lines DB0-DB3 of a data bus. Thereafter, a state of the FF5 is reversed.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention outputs updated identifier information onto a data bus each time an identifier section of a board issues a read command specifying the identifier section. The present invention relates to an automatic board identification method that has become popular.

〔overview〕

Adding an identifier output function and a function to update the identifier information each time a read command to read the identifier is issued to the identifier section of the board allows the program to issue the read command multiple times to read the identifier. This is an automatic board identification method that identifies the type of board using an identifier information string.

[Prior art and problems]

Conventionally, a program has read and identified fixed ID (identifier) information on a board, but it has the following drawbacks.

(1) The maximum value that can be used to identify a board is determined by the bit width of the ID information, and even if identification exceeding that value is required, it cannot be handled. Therefore, it is necessary to have some margin in the bit width, which makes it expensive.

(2) If there are boards that do not have the function of outputting the ID information, it is not possible to identify them.

[Purpose of the invention]

The present invention is based on the above consideration, and can easily handle cases where the number of boards identified increases or boards for which no identification function is taken into consideration are mixed.
Another object of the present invention is to provide an inexpensive automatic board identification method.

[Means to achieve the purpose]

Therefore, the automatic board identification method of the present invention is applicable to a computer system having a central processing unit and a board removably connected to a bus connected to the central processing unit via a connector and having an identifier section. This is an automatic board identification method, and the identifier section sets the identifier information to an initial value when the central processing unit issues an initialization command specifying the board, when the power is turned on, or when the system is reset. and when the central processing unit issues an identifier read command specifying the board, outputs the stored identifier information onto the data bus, and then updates and stores the identifier information. That is.

[Embodiments of the invention]

FIG. 1 is a diagram showing an example of a computer system to which the present invention is applied. In FIG. 1, 1 is a central processing unit, 2-
Q and 2-1 indicate the board, 3-0 and 3-1 the receiver side connectors, and 4-0 and 4-1 the board connectors, respectively. Connectors 3-0 and 3-1 on the receiver side are connected to the bus, and the connectors of the board are inserted into these. The receiver is called the side connector 3-0 as the slot 0 connector, the receiver is the side connector 3-1 as the slot 1 connector, and the board 2-
An identifier portion to be described later is provided in 0 and 2-1. Devices such as printers and modems are connected below the board. Although there are only two boards in Figure 1,
In reality, many more boards are installed.

In the present invention, a D output function of a predetermined bit width consisting of F/F (flip-flop) etc. is provided in the board;
An identifier section is provided that has an ID initial value setting function and a function of updating the ID output value every time the program reads the ID. Examples of the identifier part are shown in Figs. 2 and 4. A simple design is one in which specific bits are sequentially inverted and other bits are held at the same value, or multiple bits are used as a counter. There are methods to be updated, etc., and as the number of identification items increases, it is only necessary to adopt a cheaper implementation method. FIG. 2 shows one embodiment of the configuration of the identifier section.

In FIG. 2, 5 represents a flip-flop, and 6-0 to 6-3 represent three-state gates.

For the identifier part.

is assigned a unique address. Note that the identifier portions of boards inserted into the same slot have the same address. When the central processing unit wants to set the state of the identifier part of the board to an initial value, it issues an ID initialize command (write command) by specifying the address assigned to the identifier part. Then, a clear signal is applied to the clear terminal of flip-flop 5. It is also possible to apply a clear signal unconditionally at power-on or system reset. When the central processing unit specifies the address assigned to the identifier section and issues an ID read command (read command), the clock terminal of the flip-flop 5 and the control terminal of the three-state gates 6-0 to 6-3 are A pulse is applied and the identifier information corresponding to the state of flip-flop 5 is output on bit lines DBO to DB3 of the data bus, after which the state of flip-flop 5 is inverted. FIG. 3 shows the relationship between the number of ID read commands issued and the ID information in the identifier section of FIG. 2. When the first ID read command is issued, the ID information of ro 100J is transferred to the data
The ID information of O10J is output on the data bus, and when the second ID successive command is issued, rl.The ID information of O10J is output onto the data bus, and when the third ID successive command is issued,
o 100J ID information is output on the data bus. The following is as shown.

FIG. 4 is a diagram showing another embodiment of the identifier section.

In FIG. 4, 7 represents a counter, and 8-0 to 8-3 represent three-state gates.

When the central processing unit wants to set the state of the identifier part of the board to an initial value, it issues an ID initialize command (write command) by specifying the address assigned to the identifier part. Then, a clear signal is applied to the clear terminal of the counter 7. When the central processing unit specifies the address assigned to the identifier section and issues an ID read command (read command), a pulse is generated at the clock terminal of the counter 7 and the control terminals of the three-state gates 8-0 to 8-3. is applied, and the identifier information corresponding to the state of the carantuff is output to the bit line DBO to DB3 of the data bus,
Thereafter, the count value of the counter 7 is incremented by +1. FIG. 5 shows the relationship between the number of ID successive commands issued and the ID information in the identifier section of FIG. 4. When the first ID successive command is issued, the ID information of ro 000J is - When the second ID read command is issued, the ID information of rloooJ is output onto the data bus, and when the third ID read command is issued, the ID information of ro010J is output to the data bus. Output on the data bus. The following is as shown in the figure.

A program in the central processing unit reads the ID information a predetermined number of times, stores it in memory, and identifies the type of board by searching a board identification table. 6th
The figure shows an example of the configuration of a board identification table held by the central processing unit, and IDT indicates the board identification table. For example, the ID information string for board #l is XIl+x, □
, . . . Ixttt. Further, only when there are boards that do not have an ID output function for identification, if the read ID information string is not defined on the board identification table IDT, it is a board that does not have the ID output function. It can also be identified.

Generally, if the bit width of one piece of ID information is N1 and the number of times a program reads is n, then it is (2'”)"-2N"
It is possible to identify up to one type of substrate.

FIG. 7 is a diagram for explaining the identification process.

When the central processing unit wants to know the type of board inserted into a slot, it specifies the address of the identifier section of the board, issues an ID read command a predetermined number of times, and stores the read ID information in memory. do. After reading, the read ID information string is compared with the contents of the board identification table IDT to recognize the type of board.

〔Effect of the invention〕

As is clear from the above description, the following effects can be obtained according to the present invention.

(a) Conventionally, to identify 2 Nun ways (N+n
) A bit-width identifier part is required, but since it is sufficient to have a width of X bits, it can be realized with cheaper hardware.

(b) By increasing the number of times the program is read (-n), the number of distinguishable boards increases, so even if the number of types of boards increases, it can be easily handled.

(C) Since the ID information read by the program of the central processing unit is regularly updated, by increasing the number of readings, it is possible to identify them even if there are boards with no ID output function at all. .

[Brief explanation of drawings]

FIG. 1 is a diagram showing an example of a computer system to which the present invention is applied, FIG. 2 is a diagram showing an example configuration of an identifier section, and FIG.
The figure shows the relationship between the number of ID successive commands and ID information in the identifier section of FIG. 2, FIG. 4 shows another embodiment of the identifier section, and FIG. 5 shows the identifier section of FIG. 4. I in
FIG. 6 is a diagram showing the relationship between the number of times a D-succession command is issued and ID information, FIG. 6 is a diagram showing an example of the configuration of a board identification table held by the central processing unit, and FIG. 7 is a diagram for explaining the identification process. 1... Central processing unit, 2-0 and 2-1... Board, 3
-0 and 3-1...The receiver is the connector on the side, 4-0 and 4-1
... Board connector, 5... Flip-flop,
6-0 or 6-3...3 state gate, 7...
- Counter, 8-Q or 8-3... 3-state gate, IDT... board identification table.悌1 figure 錇Z rooster 3rd figure capital 4 figure 6

Claims (1)

[Claims] An automatic board identification method in a computer system having a central processing unit and a board removably connected to a bus connected to the central processing unit via a connector and having an identifier part, the identifier part being , when the central processing unit issues an initialization command that specifies the board, or when the power is turned on or the system is reset, the identifier information is set to an initial value and stored, and the central processing unit specifies the board. An automatic board identification method characterized in that when an identifier read command is issued, stored identifier information is output onto a data bus, and thereafter the identifier information is updated and stored.