JPS61225937A - 信号抽出回路 - Google Patents

信号抽出回路

Info

Publication number
JPS61225937A
JPS61225937A JP60067056A JP6705685A JPS61225937A JP S61225937 A JPS61225937 A JP S61225937A JP 60067056 A JP60067056 A JP 60067056A JP 6705685 A JP6705685 A JP 6705685A JP S61225937 A JPS61225937 A JP S61225937A
Authority
JP
Japan
Prior art keywords
signal
data
mask
clock
logic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP60067056A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0562850B2 (cs
Inventor
Koichi Tanaka
幸一 田中
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP60067056A priority Critical patent/JPS61225937A/ja
Publication of JPS61225937A publication Critical patent/JPS61225937A/ja
Publication of JPH0562850B2 publication Critical patent/JPH0562850B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Dc Digital Transmission (AREA)
JP60067056A 1985-03-30 1985-03-30 信号抽出回路 Granted JPS61225937A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60067056A JPS61225937A (ja) 1985-03-30 1985-03-30 信号抽出回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60067056A JPS61225937A (ja) 1985-03-30 1985-03-30 信号抽出回路

Publications (2)

Publication Number Publication Date
JPS61225937A true JPS61225937A (ja) 1986-10-07
JPH0562850B2 JPH0562850B2 (cs) 1993-09-09

Family

ID=13333797

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60067056A Granted JPS61225937A (ja) 1985-03-30 1985-03-30 信号抽出回路

Country Status (1)

Country Link
JP (1) JPS61225937A (cs)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0492827U (cs) * 1990-12-27 1992-08-12
JP2008295035A (ja) * 2007-04-27 2008-12-04 Semiconductor Energy Lab Co Ltd クロック信号生成回路、及び半導体装置

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0492827U (cs) * 1990-12-27 1992-08-12
JP2008295035A (ja) * 2007-04-27 2008-12-04 Semiconductor Energy Lab Co Ltd クロック信号生成回路、及び半導体装置
US8416000B2 (en) 2007-04-27 2013-04-09 Semiconductor Energy Laboratory Co., Ltd. Clock signal generation circuit and semiconductor device

Also Published As

Publication number Publication date
JPH0562850B2 (cs) 1993-09-09

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