JPS61225065A - Printing system of wire dot matrix printer - Google Patents

Printing system of wire dot matrix printer

Info

Publication number
JPS61225065A
JPS61225065A JP6628485A JP6628485A JPS61225065A JP S61225065 A JPS61225065 A JP S61225065A JP 6628485 A JP6628485 A JP 6628485A JP 6628485 A JP6628485 A JP 6628485A JP S61225065 A JPS61225065 A JP S61225065A
Authority
JP
Japan
Prior art keywords
printing
number line
print data
pins
timing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6628485A
Other languages
Japanese (ja)
Inventor
Ikuo Someya
育男 染谷
Tetsuya Fujiwara
藤原 哲哉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NHK Spring Co Ltd
Original Assignee
NHK Spring Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NHK Spring Co Ltd filed Critical NHK Spring Co Ltd
Priority to JP6628485A priority Critical patent/JPS61225065A/en
Publication of JPS61225065A publication Critical patent/JPS61225065A/en
Pending legal-status Critical Current

Links

Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/22Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective application of impact or pressure on a printing material or impression-transfer material
    • B41J2/23Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective application of impact or pressure on a printing material or impression-transfer material using print wires
    • B41J2/30Control circuits for actuators

Landscapes

  • Dot-Matrix Printers And Others (AREA)

Abstract

PURPOSE:To reduce the frequency of interruption processing, by providing printing buffer memories in two stages. CONSTITUTION:A front stage buffer 3 is formed of a shift register capable of storing 48-bit data and, by the pulse synchronous to the timing of a printing timing control part 10, printing data for even number pins and odd number pins of stored printing data are alternately transmitted to odd number line and even number line post stage buffers 4, 5 in a 12-bit unit. Odd number line and even number line printing pins 8, 9 are alternately driven by odd number line and even number line drivers 6, 7. Because the transmission of printing data to the front stage buffer 3 is performed in 4 columns and a 48-bit unit, the interruption signal of the printing timing control part 10 may be generated every when the odd number line and even number line printing pins 8, 9 are driven 4 times in total. Because the frequency of the interruption signal comes to 1/4 of the driving timing of the printing pins and allowance is generated in the processing time of the printing timing control part 10, interruption processing from other I/O is enabled.

Description

【発明の詳細な説明】 〈産業上の利用分野〉 本発明はワイヤドツトマトリックスプリンタの印字方式
に関し、特に2列千鳥配列のプリンタワイヤを用いる場
合の印字方式に関する。
DETAILED DESCRIPTION OF THE INVENTION <Industrial Application Field> The present invention relates to a printing method for a wire dot matrix printer, and particularly to a printing method when using two rows of staggered printer wires.

〈従来の技術〉 漢字プリンタ、レタークオリディプリンタに於ては、2
列千烏配設のプリンタが多用されているが、機械的な印
字速度の向上に伴い電子的な印字データ処理を効率化す
ることにより全体としての印字速度を向上させることが
望まれている。
<Conventional technology> In kanji printers and letter quality printers, 2
Printers with rows and rows of printers are often used, and as the mechanical printing speed improves, it is desired to improve the overall printing speed by making electronic print data processing more efficient.

〈発明が解決しようとする問題点〉 DMA方式などのデータ転送用のハードウェアを用いれ
ば、印字データの転送処理が迅速化されるが、その反面
構成が繁雑となり、コストが高騰する。そこで、通常は
、印字タイミング制御部からの割込信号により印字デー
タを転送するようにしているが、機械的印字速度が向上
するにつれて印字データ転送のタイミングが複雑となり
、場合によっては印字タイミング制御部の時間的余裕が
不十分となり、印字速度が低下する不都合が生ずる。
<Problems to be Solved by the Invention> Using hardware for data transfer such as a DMA method speeds up the print data transfer process, but on the other hand, the configuration becomes complicated and the cost increases. Therefore, print data is normally transferred using an interrupt signal from the print timing control section, but as mechanical printing speed improves, the timing of print data transfer becomes complicated, and in some cases, the print timing control section This results in an inconvenience that the printing speed decreases due to insufficient time margin.

このような従来技術の欠点に鑑み、本発明の主・な目的
は、印字タイミング制御部からの割込信号により印字デ
ータの転送処理を行なう印字方式に於て、印字データの
転送及び印字タイミングの制御をタイミング良く行ない
、印字速度を向上し得ると共に、印字タイミングのばら
つきによる印字ずれをなくし得るような改良されたワイ
ヤドツトマトリックスプリンタの印字方式を提供するこ
とにある。
In view of these drawbacks of the prior art, the main object of the present invention is to improve the transfer of print data and the timing of printing in a printing method that transfers print data using an interrupt signal from a print timing control section. It is an object of the present invention to provide an improved printing method for a wire dot matrix printer that can perform control in a timely manner, improve printing speed, and eliminate printing deviations due to variations in printing timing.

く問題点を解決するための手段〉 このような目的は、本発明によれば、2列千鳥配列の印
字ピンを有するワイヤドツトマトリックスプリンタの印
字方式であって、タイミング制御部からの割込信号に同
期して印字データ制御部より転送される印字データを4
コラム記憶可能な前段バッファと、印字タイミングに従
って前記前段バッファから印字データが交互に転送され
るように各2コラムの印字データを記憶する二つの後段
バッファとを有し、前記各後段バッファからの印字デー
タに従って各ピンを駆動しでなることを特徴とする印字
方式を提供することにより達成される。
According to the present invention, an object of the present invention is to provide a printing method for a wire dot matrix printer having two rows of staggered printing pins. The print data transferred from the print data control unit in synchronization with
It has a front stage buffer capable of storing columns, and two rear stage buffers that store print data of two columns each so that the print data is transferred alternately from the front stage buffer according to printing timing, and printing from each of the rear stage buffers is provided. This is achieved by providing a printing method characterized by driving each pin according to data.

く作用〉 このように印字データ用バッファメモリを2段に設ける
ことにより、割込処理の頻度を減らすことができ、印字
タイミング制御部の処理時間に余裕ができる。
Effects> By providing the print data buffer memory in two stages as described above, the frequency of interrupt processing can be reduced, and the processing time of the print timing control section can be increased.

〈実施例〉 以下、本発明の好適実施例を添付の図面について詳しく
説明する。
<Embodiments> Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

第1図は本発明に基づく印字方式を実施するための構成
を1[1ツク図により示している。本実施例は2列千鳥
配列の24ピンの印字ヘッドを制御するための構成に関
するもので、1コラムの印字データは、偶数ピン、或い
は奇数ピンを駆動するための12ビツトのデータに対応
する。
FIG. 1 shows a configuration for implementing the printing method according to the present invention using a one-step diagram. This embodiment relates to a configuration for controlling a 24-pin print head in a two-column staggered arrangement, and one column of print data corresponds to 12-bit data for driving even-numbered pins or odd-numbered pins.

ホストCPUから送られてぎた印字データは、印字デー
タ制御部1により、1行ずつRAM2に記憶される。印
字データ制御部1は、印字タイミング制御部10からの
割込信号により、4コラム、即ち48ピツトの印字デー
タを前段バッファ3に転送する。このとぎ、印字データ
は、8ビツトづつ6回に分けて転送されることとなる。
The print data sent from the host CPU is stored line by line in the RAM 2 by the print data control unit 1. The print data control section 1 transfers print data of 4 columns, that is, 48 pits, to the pre-stage buffer 3 in response to an interrupt signal from the print timing control section 10. At this point, the print data will be transferred six times, each containing eight bits.

前段バッファ3は、48ビツトのデータを記憶し得るシ
フトレジスタからなっている。前段バッファ3に記憶さ
れた印字データは、印字タイミング制御部10からの印
字タイミングに同期したパルスに応じて、偶数ピン用印
字データ及び奇数ピン用印字データを各12ビット単位
で奇数列用後段バッファ4及び偶数列用後段バッファ5
に交互に転送する。これらの後段バッファ4.5に取込
まれた印字データは、それぞれ奇数列ドライバ6及び偶
数列ドライバ7を介して奇数列印字ピン8及び偶数列印
字ピン9を交互に駆動することとなる。
The pre-stage buffer 3 consists of a shift register capable of storing 48 bits of data. The print data stored in the front-stage buffer 3 is transferred to the rear-stage buffer for odd-numbered rows in units of 12 bits each for even-numbered pins and print data for odd-numbered pins in response to pulses synchronized with the print timing from the print timing control unit 10. 4 and post-stage buffer 5 for even columns
Transfer alternately. The print data taken into these rear-stage buffers 4.5 alternately drives odd-numbered column printing pins 8 and even-numbered column printing pins 9 via odd-numbered column drivers 6 and even-numbered column drivers 7, respectively.

第2図は、第1図に示した構成に於りる主要部分のタイ
ミングを示すタイミングチャートである。
FIG. 2 is a timing chart showing the timing of the main parts in the configuration shown in FIG.

奇数列印字ピン8の印字タイミングは、(イ)に示され
たパルスの立上がりに同期し、偶数列印字ピン9の印字
タイミングは、(ロ)に示されたように、奇数列印字ピ
ン8の印字タイミングに対して180”の位相差を有す
るようなパルスの同じく立上がり部分に同期している。
The printing timing of the odd-numbered column printing pin 8 is synchronized with the rising edge of the pulse shown in (a), and the printing timing of the even-numbered column printing pin 9 is synchronized with the rise of the pulse shown in (b). It is synchronized with the same rising portion of a pulse having a phase difference of 180'' with respect to the printing timing.

前段バッファ3から後段バッファ4.5への印字データ
の転送もこれらの印字タイミングに同期して行なわれる
The transfer of print data from the front stage buffer 3 to the rear stage buffer 4.5 is also performed in synchronization with these print timings.

印字データ制御部1から前段バッファ3への印字データ
の転送は4コラム、即ち48ビット単位で行なわれるた
め、印字タイミング制御部12からの割込信号は奇数列
印字ピン8及び偶数列印字ピン9が計4回駆動される度
毎に発生すれば良い。
Since the print data is transferred from the print data control section 1 to the pre-stage buffer 3 in units of 4 columns, that is, 48 bits, the interrupt signal from the print timing control section 12 is transmitted to the odd column printing pin 8 and the even column printing pin 9. It is sufficient that this occurs every time the is driven a total of four times.

従って印字タイミング制御部10からの割込信号の頻度
が印字ピンの駆動タイミングの1/4となるため、印字
タイミング制御部10の処理時間に余裕ができ、例えば
他の110からの割込処理などを可能にし、印字データ
の転送に要する時間のばらつぎに起因する印字ずれを解
消し、全体としての印字速度を向上させることができる
Therefore, the frequency of the interrupt signal from the print timing control section 10 is 1/4 of the drive timing of the print pin, so the processing time of the print timing control section 10 can be spared, for example, for interrupt processing from other 110, etc. This makes it possible to eliminate printing deviations caused by variations in the time required to transfer print data, and improve the overall printing speed.

〈発明の効果〉 このように本発明によれば、比較的単純な構成からなる
バッファメモリを用いるのみで印字タイミングの制御及
び印字データの転送が円滑に行なうことかでき、印字品
質の改善及び印字速度の向上を図れるため、その効果は
極めて大である。
<Effects of the Invention> As described above, according to the present invention, it is possible to smoothly control print timing and transfer print data by simply using a buffer memory having a relatively simple configuration, thereby improving print quality and printing. The effect is extremely large because the speed can be improved.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明に基づくワイヤドツトマトリックスプリ
ンタの印字方式の構成を示すブロック図である。 第2図は第1図の構成に於けるタイミングを示すタイミ
ングチV−トである。 1・・・印字データ制御部2・・・RAM3・・・前段
バッファ  4・・・奇数列用後段バッファ5・・・偶
数列用後段バッファ 6・・・奇数列ドライバ 7・・・偶数列ドライバ8・
・・奇数列印字ピン 9・・・偶数列印字ピン10・・
・印字タイミング制御部 特許 出 願 人 日本発条株式会社 代     理     人   弁理士  大  島
  陽  −第1 図
FIG. 1 is a block diagram showing the configuration of a printing system of a wire dot matrix printer based on the present invention. FIG. 2 is a timing chart showing the timing in the configuration of FIG. 1. 1...Print data control unit 2...RAM3...Pre-stage buffer 4...Post-stage buffer for odd-numbered columns 5...Post-stage buffer for even-numbered columns 6...Odd-numbered column driver 7...Even-numbered column driver 8・
・・Odd number row printing pin 9 ・Even number row printing pin 10 ・・
・Print timing control unit patent Applicant: NHK Spring Co., Ltd. Agent: Patent attorney: Yo Oshima - Figure 1

Claims (1)

【特許請求の範囲】[Claims] 2列千鳥配列の印字ピンを有するワイヤドットマトリッ
クスプリンタの印字方式であって、タイミング制御部か
らの割込信号に同期して印字データ制御部より転送され
る印字データを4コラム記憶可能な前段バッファと、印
字タイミングに従って前記前段バッファから印字データ
が交互に転送されるように各2コラムの印字データを記
憶する二つの後段バッファとを有し、前記各後段バッフ
ァからの印字データに従って各ピンを駆動してなること
を特徴とする印字方式。
A printing method for a wire dot matrix printer that has two rows of staggered printing pins, with a pre-stage buffer that can store four columns of print data transferred from the print data control section in synchronization with an interrupt signal from the timing control section. and two post-stage buffers that store print data of two columns each so that the print data is transferred alternately from the pre-stage buffer according to the print timing, and each pin is driven according to the print data from each of the post-stage buffers. A printing method that is characterized by:
JP6628485A 1985-03-29 1985-03-29 Printing system of wire dot matrix printer Pending JPS61225065A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6628485A JPS61225065A (en) 1985-03-29 1985-03-29 Printing system of wire dot matrix printer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6628485A JPS61225065A (en) 1985-03-29 1985-03-29 Printing system of wire dot matrix printer

Publications (1)

Publication Number Publication Date
JPS61225065A true JPS61225065A (en) 1986-10-06

Family

ID=13311373

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6628485A Pending JPS61225065A (en) 1985-03-29 1985-03-29 Printing system of wire dot matrix printer

Country Status (1)

Country Link
JP (1) JPS61225065A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62255155A (en) * 1986-04-28 1987-11-06 Nec Corp Printing control circuit of dot matrix printer
US5037221A (en) * 1988-06-02 1991-08-06 Brother Kogyo Kabushiki Kaisha Emphasized character dot-matrix printer having two groups of dot-forming elements

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62255155A (en) * 1986-04-28 1987-11-06 Nec Corp Printing control circuit of dot matrix printer
US5037221A (en) * 1988-06-02 1991-08-06 Brother Kogyo Kabushiki Kaisha Emphasized character dot-matrix printer having two groups of dot-forming elements

Similar Documents

Publication Publication Date Title
US4059183A (en) Dot matrix printer with slanted print head and modular skewing of dot pattern information
JPS6367190B2 (en)
JPS61225065A (en) Printing system of wire dot matrix printer
US4248147A (en) Control system for dot matrix line printer using one print element per character
US3845710A (en) Print control logic circuitry for on-the-fly printers
US4825389A (en) Print data editing circuit in serial printer
JPH09300735A (en) Printing controlling apparatus
JPH0588675B2 (en)
JPS58145463A (en) Printing controller
JPS5941282A (en) Head driving system
JP2537394B2 (en) Print control method of serial dot printer
JP2003291429A (en) Thermal head driver circuit
JPH02301452A (en) Printing system
JPH01208155A (en) Dot matrix printer
JPH0515344B2 (en)
JPH0647301B2 (en) Charactor pattern generator
JPS6261971B2 (en)
JPS61206664A (en) Printer apparatus
JPH0439019Y2 (en)
JPS61241165A (en) Serial-type printer
JPH05162358A (en) Thermal recording device
JPH0514619B2 (en)
JPS63200674A (en) Recorder
JPS62290546A (en) Recorder
JPH0753456B2 (en) Printer device