JP2003291429A - Thermal head driver circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To achieve a higher printing rate in a multi-gradation thermal printer. <P>SOLUTION: The thermal head driver circuit is provided with a first buffer 3 and a second buffer 4. Line data of 8 bit per one dot are written by a first control circuit 2 alternately in the first buffer and the second buffer, and read out by a second control circuit 5 alternately from the first buffer and the second buffer, so as to be outputted to a thermal head 7 via a comparator 6. Since the data writing and reading operations to the dual buffers can be processed alternately and parallel, multi-gradation data can be transferred to the thermal head at a high speed, so that the printing rate can be improved. <P>COPYRIGHT: (C)2004,JPO

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thermal head driver circuit, and more particularly, to a thermal head driver circuit having a high data transfer speed. 2. Description of the Related Art Some thermal printers perform multi-tone printing or tone control based on thermal history. A thermal head driver circuit that performs gradation control, for example, represents one dot as 8-bit data, and
A means for dividing and controlling the heating element energizing time in the dot is used. Thermal history control is used for printing one line.
The energizing time for each dot constituting the line is shortened in accordance with the energizing history, and for each dot, for example, data one line before and two lines before the dot and one dot before the left and right adjacent dots of the dot By reducing the energization time in accordance with the data of (1), high-precision gradation control is performed. The control circuit of the thermal head driver circuit reads out the print data of 8 bits per dot developed in the page memory, inputs one line of data to the comparator, and serially transmits the data to the shift register of the thermal head from the comparator. Transmit. The comparator outputs the contents of 8-bit data in synchronization with the clock signal, and controls the energization time of each heating element by rewriting the data held in the shift register multiple times during the generation of the strobe pulse to print one line. Execute. After printing one line, the thermal head driver circuit transfers the next one line data to the comparator and repeats the above processing. As described above, when gradation control is performed, the amount of data is significantly larger than when gradation control is not performed. Therefore, the burden of reading and transferring data in the thermal head driver circuit is large, and the printing speed is increased. Bottlenecks in Therefore, there arises a technical problem to be solved in order to increase the data transfer speed to the thermal head, and an object of the present invention is to solve the above problem. SUMMARY OF THE INVENTION The present invention is proposed to achieve the above object, and has two buffers and a method for alternately writing print data for each line to the two buffers. A control circuit; and a second control circuit for alternately reading print data for each line from the two buffers and transferring the print data to the comparator.
A thermal head driver circuit configured to write and print two lines in parallel by reading one line of print data from the other buffer by the second control circuit while writing the line print data. To provide. An embodiment of the present invention will be described below in detail with reference to the drawings. FIG. 1 shows a thermal head drive circuit, wherein 1 is a page memory, 2 is a first control circuit, 3 is a first buffer, 4 is a second buffer, 5 is a second control circuit, and 6 is a comparator. 7 is a thermal head, a shift register
8, a latch 9, and a heating element 10. According to the present invention, the first control circuit 2 reads the print data from the page memory 1 and writes the data for each line alternately to the first buffer 3 and the second buffer 4, and the second control circuit 5 The circuit is configured to alternately read data from the second buffer 4 and transfer the data to the comparator 6, and performs a write operation of the first control circuit 2 and a read operation of the second control circuit 5 in parallel. . [0007] Print data of 8 bits per dot generated by a dot pattern developing unit (not shown) is stored in a page memory. For example, when performing 64 levels of calorie control, values from 0 (hex) to 40 (hex) are assigned to 8-bit dot data, and when performing 128 levels of calorie control, 0 (he
Values from x) to 80 (hex) are assigned. Figure 2 shows 64
An example of a 1-dot print pulse in stepwise calorie control is shown, where A is a dot based on data 40 (hex), B is data obtained by shortening the output time by 25% due to the history of the data before one line and the data before two lines being on. C is a print pulse of 30 (hex), and C is a print pulse of data 20 (hex) whose output time has been reduced by 50% by the ON history of the data on the left and right adjacent one line before in addition to B. First control circuit 2 of thermal head drive circuit
Reads the print data from the page memory 1 and writes the data of the first line into the first buffer 3 first. Next, the first control circuit 2 writes the data of the second line into the second buffer 4.
When the first control circuit 2 completes writing the first line data to the first buffer 3, the second control circuit 5 reads the first line data from the first buffer 3 and transfers it to the comparator 6. The comparator 6 has a built-in counter, and divides the printing time of one line for each count in synchronization with a clock. The number of divisions of the printing time for one line is 64 in the 64-step calorie control. The comparator 6 compares the count value with the dot data in each of the divided time zones, converts the count value into binary serial data of "1" if true and "0" if false, and synchronizes the thermal head 7 with the clock. To the shift register 8. This process
The number of count values during printing of one line (6 in this example)
4 times). Subsequently, the first control circuit 2 writes the data of the third line into the first buffer 3, while the second control circuit 5 reads the data of the second line from the second buffer 4,
The binary serial data is output to the shift register 8 64 times in 6 steps. As described above, data is alternately written to the two buffers 3 and 4 for each line data, and data is alternately read from the two buffers 3 and 4 to perform the writing and the reading in parallel.
As a result, the transfer from the page memory to the control circuit is completed in one time, and the multi-gradation data can be transferred to the thermal head at high speed, and high-speed, high-definition printing can be realized. The present invention is not limited to the above-described embodiment, and various modifications are possible within the technical scope of the present invention, and it is natural that the present invention extends to those modifications. is there. As described above, the thermal head drive circuit of the present invention is provided with two systems of buffers, and performs data writing and reading in two systems of buffers alternately in parallel. Key data can be transferred to the thermal head at high speed, and the printing speed can be improved.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 shows an embodiment of the present invention and is a block diagram of a thermal head drive circuit. FIG. 2 is a timing chart of a print pulse. [Explanation of Signs] 1 Page memory 2 First control circuit 3 First buffer 4 Second buffer 5 Second control circuit 6 Comparator 7 Thermal head 8 Shift register 9 Latch 10 Heating element

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Claims (1)

Claims 1. Two buffers and one buffer for two buffers
A first control circuit for alternately writing print data for each line,
A second control circuit for alternately reading print data for each line from the two buffers and transferring the print data to a comparator, wherein the first control circuit writes one line of print data to one of the buffers and simultaneously executes a second control circuit From the other buffer
A thermal head driver circuit configured to read and write line print data so that writing and reading to two buffers are performed in parallel.