JPS61222142A - High-purity pb material used for manufacturing pb alloy solder material - Google Patents

High-purity pb material used for manufacturing pb alloy solder material

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Publication number
JPS61222142A
JPS61222142A JP6298085A JP6298085A JPS61222142A JP S61222142 A JPS61222142 A JP S61222142A JP 6298085 A JP6298085 A JP 6298085A JP 6298085 A JP6298085 A JP 6298085A JP S61222142 A JPS61222142 A JP S61222142A
Authority
JP
Japan
Prior art keywords
purity
less
radioactive
manufacturing
count number
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6298085A
Other languages
Japanese (ja)
Inventor
Naoyuki Hosoda
細田 直之
Naoki Uchiyama
直樹 内山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Metal Corp
Original Assignee
Mitsubishi Metal Corp
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Filing date
Publication date
Application filed by Mitsubishi Metal Corp filed Critical Mitsubishi Metal Corp
Priority to JP6298085A priority Critical patent/JPS61222142A/en
Publication of JPS61222142A publication Critical patent/JPS61222142A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
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    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
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    • H01L2224/29099Material
    • H01L2224/291Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
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    • H01L2224/291Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29101Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
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    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
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    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
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    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
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    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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    • H01L2224/838Bonding techniques
    • H01L2224/8385Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
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    • H01L2924/16195Flat cap [not enclosing an internal cavity]

Abstract

PURPOSE:To improve reliability by manufacturing a high-purity Pb material so as to satisfy conditions of purity of 99.999% or more, the content of radioactive isotopes of less than 5ppb and the count number of radioactive alpha particles of 0.09CPH/cm<2> or less. CONSTITUTION:A raw material having high purity of 99.999% or more and properties of the content of radioactive isotopes of less than 5ppb and the count number of radioactive alpha particles of 0.09CPH/cm<2> or less is used for a Pb alloy solder material. Accordingly, when the solder material is employed for brazing joining with a ceramic case 1 of a sealing board 4 for a device such as an IC, the memory errors of the IC after assembly are eliminated completely, thus improving reliability.

Description

【発明の詳細な説明】 [産業上の利用分野] この発明は、ICは勿論のこと、大容量メモリー素子で
ある64KRAMや256KRAMなどのメモリー、さ
らに高い信頼性が要求される各種のLSIや超LSIな
どの半導体装置の組立てに際して、装置部材の接合にろ
う材として使用することができるpbろう材を製造する
のに用いられる高純度pb材に関するものである。
[Detailed Description of the Invention] [Industrial Application Field] This invention is applicable not only to ICs, but also to large-capacity memory devices such as 64KRAM and 256KRAM, as well as various LSIs and superstructures that require high reliability. The present invention relates to a high-purity PB material used to produce a PB brazing material that can be used as a brazing material to join device members when assembling semiconductor devices such as LSIs.

〔従来の技術〕[Conventional technology]

一般に、半導体装置の1つとして、141図に概略縦断
面図で示されるICセラミック・ノ5ツケージが知られ
ている。
Generally, as one type of semiconductor device, an IC ceramic cage shown in a schematic vertical cross-sectional view in FIG. 141 is known.

このICセラミック・パッケージは、主として所定のキ
ャビティをもったセラミツフケニス1と。
This IC ceramic package mainly consists of a ceramic ceramic package 1 with a predetermined cavity.

このキャビティの底部にろう付けされたシリコンチップ
などの半導体素子2と、AuあるいはAnの極細線から
なるボンディングワイヤ3と、セラミックケース1の上
面にろう付けされた封着板4と。
A semiconductor element 2 such as a silicon chip is brazed to the bottom of this cavity, a bonding wire 3 made of ultrafine Au or An wire, and a sealing plate 4 brazed to the top surface of the ceramic case 1.

セラミックケース1にろう付けされたリード材5で構成
されている。
It consists of a lead material 5 brazed to a ceramic case 1.

このようにICセラミック・パッケージにおいては、半
導体素子のセラミックケースのキャビティ底部へのろう
付け、並びに封着板のセラミックケース上面へのろう付
けに、さらに別の構造を有するICプラスチック・パッ
ケージにおいては、半導体素子のリードフレームへのろ
う付けに、各種のろう材が使用されているが、近年、高
価なAu合金ろう材に代って、安価なpb金合金う材、
すなわち、Ag:l510%、Sb:1〜15%、Sn
:1〜65%。
In this way, in the IC ceramic package, the semiconductor element is brazed to the bottom of the cavity of the ceramic case, and the sealing plate is brazed to the top surface of the ceramic case, and in the IC plastic package, which has a different structure, Various types of brazing filler metals are used for brazing semiconductor elements to lead frames, but in recent years, inexpensive PB gold alloy filler fillers have replaced expensive Au alloy fillers.
That is, Ag: l510%, Sb: 1-15%, Sn
:1~65%.

およびIn : 1へ65%のうちの1種以上を含有し
、残りがpbと不可避不純物からなる組成C以上重量%
)を有するpb金合金う材が注目されている。
and In: 1 to 65%, with the remainder consisting of PB and unavoidable impurities Composition C or more weight%
) is attracting attention.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

しかし、上記の従来pb金合金う材の製造に原料として
用いられている高純度pb材は。
However, the high-purity PB material used as a raw material for manufacturing the conventional PB gold alloy filling material mentioned above.

純度:99.999%以上。Purity: 99.999% or more.

UやThなどの放射イ生同位元素の含有量:10〜50
 p p b。
Content of radioactive isotopes such as U and Th: 10-50
p p b.

放射性α粒子のカウント数:0.1〜0.5 CPH/
d、の性質をもつものであるため、この従来高純度pb
材を用いて製造されたpb金合金う材を使用して組立て
られた半導体装置においては、しばしばメモリーエラー
が発生し、信頼性のないものであった。
Count number of radioactive α particles: 0.1 to 0.5 CPH/
d, this conventionally high-purity PB
Memory errors often occur in semiconductor devices assembled using a PB gold alloy material, making them unreliable.

〔問題点を解決するための手段〕[Means for solving problems]

そこで1本発明者等は、上述のような観点から、半導体
装置の組立てにろう材として用いた場合にメモリーエラ
ーの発生のないpb金合金う材を得べく、特にこれの原
料となる高純度pb材について研究を行なった結果、 上記の従来高純度pb材を、真空蒸留容器内で、1O−
3tory以上の高真空中で900℃以上の温度に加熱
して蒸留精製してやると、この結果得られた高純度pb
材は。
Therefore, from the above-mentioned viewpoint, the present inventors aimed to obtain a Pb gold alloy filler material that does not cause memory errors when used as a brazing filler metal in the assembly of semiconductor devices, in particular, using a high-purity material as a raw material for the filler material. As a result of research on PB materials, we found that the above-mentioned conventional high-purity PB materials were reduced to 1O-
When purified by distillation by heating to a temperature of 900°C or higher in a high vacuum of 3 tories or higher, the resulting high-purity PB
The material is.

純度:99.99996以上。Purity: 99.99996 or higher.

放射性同位元素の含有量:5ppb未満。Radioactive isotope content: less than 5 ppb.

放射性α粒子のカウント数: 0.09CPH/i以下
Count number of radioactive α particles: 0.09 CPH/i or less.

の条件を満足するようになり、したがって、これを原料
として使用して製造されたpb金合金う材を用いて組立
てられた半導体装置においては、メモリーエラーの発生
が全くなく、信頼性の高いものとなるという知見を得た
のである。
Therefore, semiconductor devices assembled using PB gold alloy material manufactured using this material as a raw material have no memory errors and are highly reliable. We obtained the knowledge that.

この発明は、上記知見にもとづいてなされたものであっ
て、半導体装置の組立てに用いられるpb金合金う材を
製造するのに、原料として用いられる高純度pb材が、
     ” 純度:99.999%以上、 放射性同位元素の含有量:5ppb未満p放射性α粒子
のカウント数: 0.09CPH/−以下。
This invention was made based on the above knowledge, and it is found that the high-purity PB material used as a raw material for manufacturing the PB gold alloy filling material used in the assembly of semiconductor devices is
” Purity: 99.999% or more, Radioactive isotope content: Less than 5 ppb, Count number of radioactive α particles: 0.09 CPH/- or less.

の性質をもつことに特徴を有するものである。It is characterized by having the following properties.

なお、この発明の高純度pb材に関して、半導体装置に
pb金合金う材が原因のメモリーエラーを発生させない
ようにするためには、その原料である烏純度pb材の純
度を99.999%以上にして、放射性同位元素の含有
量を5ppb未満とし、もって放射性α粒子のカウント
数を0.090PH/d以下とする必要があるのであっ
て、これらの性質は、上記の条件での真空蒸留精製処理
によってはじめて具備せしめることができるようになる
のである。
Regarding the high-purity PB material of this invention, in order to prevent memory errors caused by the PB gold alloy filler material from occurring in semiconductor devices, the purity of the raw material PB material must be 99.999% or higher. The content of radioactive isotopes must be less than 5 ppb, and the count number of radioactive α particles must be 0.090 PH/d or less. It can only be achieved through processing.

〔実施例〕〔Example〕

つぎに、この発明の扁純度pb材を実施例により具体的
に説明する。
Next, the high purity PB material of the present invention will be specifically explained using Examples.

それぞれ第1表に示される性質をもった高純度pb材を
用意し、この高純度pb材を真空蒸留装置に装入し、つ
いで同じく第1°表に示される条件で精製処理を施すこ
とによって1本発明高純度pb材1〜9をそれぞれ製造
した。
By preparing high-purity PB materials having the properties shown in Table 1, charging this high-purity PB material into a vacuum distillation apparatus, and then performing purification treatment under the conditions also shown in Table 1. 1 High-purity PB materials 1 to 9 of the present invention were manufactured, respectively.

ついで、この結果得られた本発明高純度pb材1〜9に
ついて、その性質を測定すると共に、これをAg:5.
4重量%を含有し、残りがpbと不可避不純物からなる
組成を有するpb金合金う材の原料として用い、さらに
この結果得られたpb金合金う材を、圧延加工により縦
:15wX横:10+wX幅:1mX厚さ:0.05−
の寸法をもった窓枠状とした状態で、41図に示される
ICの組立てに際して、封着板のセラミックケースへの
ろう一付は接合に使用し、組立て後のICのメモリーエ
ラーを測定した。これ゛らの測定結果を第1表に示した
Next, the properties of the high-purity PB materials 1 to 9 of the present invention obtained as a result were measured, and they were compared to Ag: 5.
4% by weight, with the remainder consisting of PB and unavoidable impurities.The resulting PB gold alloy filling material was further rolled to a length of 15wX width: 10+wX. Width: 1mX Thickness: 0.05-
When assembling the IC shown in Figure 41 in a window frame shape with dimensions of . The results of these measurements are shown in Table 1.

また、比較の目的で、それぞれ第1表に示される9種類
の高純度pb材を用いて同一の条件でpb金合金う材を
製造し、これを同じく同一の条件でIC組立てに使用し
、組立て後のICのメモリーエラーを測定した。
In addition, for the purpose of comparison, PB gold alloy fillers were manufactured under the same conditions using the nine types of high-purity PB materials shown in Table 1, and used for IC assembly under the same conditions. Memory errors of the IC after assembly were measured.

〔発明の効果〕〔Effect of the invention〕

@1表に示される結果から、本発明高純度pb材1へ9
は、いづれも99.999%以上の高純度を有し、放射
性同位元素の含Wlkが5ppb未満?ニして、放射性
41粒子のカウント数も0.09CPH/−以下の性質
をもつので、これを原料として用いて製造されたpb金
合金う材においては、これを半導体装置の組立てに用い
ても組立て後の半導体装置にメモリーエラーの発生は皆
無であるのに対して、高純度pb材を用いて製造された
従来pb金合金う材においては、いずれの場合も組立て
後の半導体装置C二pb合金ろう材が原因のメモリーエ
ラーの発生が見られるものであった。
From the results shown in @1 table, go to high purity PB material 1 of the present invention 9
All have high purity of 99.999% or more, and the content of radioactive isotopes Wlk is less than 5 ppb? Furthermore, since the count number of radioactive 41 particles is less than 0.09 CPH/-, the PB gold alloy material manufactured using this material as a raw material cannot be used for assembling semiconductor devices. While there is no memory error in the semiconductor device after assembly, in any case with the conventional PB gold alloy material manufactured using high-purity PB material, the semiconductor device C2pb after assembly Memory errors were observed to occur due to the alloy brazing filler metal.

上述のように、この発明の高純度pb材によれば、半導
体装置の組立てにろう材として用いてもメモリーエラー
の発生が皆無のpb金合金う材を製造することができる
のである。
As described above, according to the high purity PB material of the present invention, it is possible to produce a PB gold alloy filler material that causes no memory errors even when used as a brazing material in the assembly of semiconductor devices.

【図面の簡単な説明】[Brief explanation of the drawing]

m1図は半導体装置の1例としてのICセラミツク・パ
ッケージを示す概略縦断面図である。 1・・・セラミックケース、 2・・・半導体素子。 3・・・ポンディングワイヤ、 4・・・封着板、5・
・・リード材。
Figure m1 is a schematic longitudinal sectional view showing an IC ceramic package as an example of a semiconductor device. 1...Ceramic case, 2...Semiconductor element. 3... Bonding wire, 4... Sealing plate, 5...
...Lead material.

Claims (1)

【特許請求の範囲】 純度:99.999%以上、 放射性同位元素の含有量:5ppb未満、 放射性α粒子のカウント数:0.09CPH/cm^2
以下、 の条件を満足することを特徴とする半導体装置の組立て
用Pb合金ろう材の製造に用いられる高純度Pb材。
[Claims] Purity: 99.999% or more, Radioisotope content: less than 5 ppb, Radioactive α particle count: 0.09 CPH/cm^2
A high-purity Pb material used for manufacturing a Pb alloy brazing material for assembling semiconductor devices, characterized by satisfying the following conditions.
JP6298085A 1985-03-27 1985-03-27 High-purity pb material used for manufacturing pb alloy solder material Pending JPS61222142A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6298085A JPS61222142A (en) 1985-03-27 1985-03-27 High-purity pb material used for manufacturing pb alloy solder material

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6298085A JPS61222142A (en) 1985-03-27 1985-03-27 High-purity pb material used for manufacturing pb alloy solder material

Publications (1)

Publication Number Publication Date
JPS61222142A true JPS61222142A (en) 1986-10-02

Family

ID=13216012

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6298085A Pending JPS61222142A (en) 1985-03-27 1985-03-27 High-purity pb material used for manufacturing pb alloy solder material

Country Status (1)

Country Link
JP (1) JPS61222142A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01321094A (en) * 1988-06-24 1989-12-27 Mitsubishi Metal Corp High-purity pb material used for production of pb alloy brazing filler metal for assembling semiconductor

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58151037A (en) * 1982-03-02 1983-09-08 Mitsubishi Metal Corp Lead (pb) alloy brazing material for semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58151037A (en) * 1982-03-02 1983-09-08 Mitsubishi Metal Corp Lead (pb) alloy brazing material for semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01321094A (en) * 1988-06-24 1989-12-27 Mitsubishi Metal Corp High-purity pb material used for production of pb alloy brazing filler metal for assembling semiconductor

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