JPS60193365A - Lead frame - Google Patents

Lead frame

Info

Publication number
JPS60193365A
JPS60193365A JP59049801A JP4980184A JPS60193365A JP S60193365 A JPS60193365 A JP S60193365A JP 59049801 A JP59049801 A JP 59049801A JP 4980184 A JP4980184 A JP 4980184A JP S60193365 A JPS60193365 A JP S60193365A
Authority
JP
Japan
Prior art keywords
lead frame
tab
tab part
parts
lead
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59049801A
Other languages
Japanese (ja)
Inventor
Toshinori Tanaka
田中 俊範
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP59049801A priority Critical patent/JPS60193365A/en
Publication of JPS60193365A publication Critical patent/JPS60193365A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49568Lead-frames or other flat leads specifically adapted to facilitate heat dissipation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93Batch processes
    • H01L2224/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To enable to enhance the heat dissipating property without damaging reliability of a semiconductor device by a method wherein a tab part to be fixed with a semiconductor chip or the tab part and inside leads are constructed of a material having better heat conductivity than the other parts. CONSTITUTION:A lead frame having no tab part 4 is manufactured of a metal material of high strength at first. Then the tab part 4 is manufactured of a material of high heat conductivity. The lead frame having no tab part and the tab part 4 thereof are connected respectively at connecting parts 5 to obtain a lead frame. A semiconductor device manufactured using the lead frame thereof forms a device having an extremely favorable heat dissipating property.

Description

【発明の詳細な説明】 (技術分野) 本発明は樹脂封止型中導体装置に使用するリードフレー
ムに関する本のである。
Detailed Description of the Invention (Technical Field) The present invention relates to a lead frame used in a resin-sealed medium conductor device.

(従来技術) 樹脂封止型半導体装置は一般にリードフレームに半導体
チップが搭載され、ワイヤボンディングされ、封止用の
w脂で覆われて構成されている。
(Prior Art) A resin-sealed semiconductor device generally includes a semiconductor chip mounted on a lead frame, wire-bonded, and covered with sealing resin.

該リードフレームは、第1図の平面図に示すように半導
体チップが固着されるタブ4を有するもので、タブ4の
周囲にはタイバー3を介して外部リードlK導通する内
部リード2か伸びていてフレーム部6で支持され、それ
らが同一金属薄板をプレス加工或いはエツチング加工に
より形成されているものでめりた。この樹脂封止型半導
体装置は。
The lead frame has a tab 4 to which a semiconductor chip is fixed, as shown in the plan view of FIG. They are supported by a frame portion 6, and are formed by pressing or etching the same thin metal plate. This resin-sealed semiconductor device.

構成材料が0.1〜Q、 3 amの厚さのリードフレ
ームと残りの大半が封止用の樹脂であるために、セラミ
ック封止型のものと比べて半導体チップの熱放散性が急
く、また熱放散性はリードフレームの熱伝導度によりて
も大きく左右されるものであった。
Since the component material is a lead frame with a thickness of 0.1 to 3 am, and most of the rest is resin for sealing, the heat dissipation of the semiconductor chip is faster than that of a ceramic seal type. Furthermore, the heat dissipation performance was also greatly influenced by the thermal conductivity of the lead frame.

しかし、熱伝導度の良い金XaCu及びAgのように機
械的強度が弱いものであり、半導体装置のリードとして
は使用できない本のでめった。また、高熱伝導度金属に
不純物を添加して合金化することにより高強度にするこ
とも行なわれているが、この場合は熱伝導度が低下し、
充分な熱放散性を得ることは困難でめった。
However, unlike gold (XaCu) and Ag, which have good thermal conductivity, they have weak mechanical strength and cannot be used as leads for semiconductor devices. In addition, high strength has been achieved by adding impurities to high thermal conductivity metals and alloying them, but in this case, the thermal conductivity decreases,
It was difficult and rare to obtain sufficient heat dissipation.

(発明の目的) 本発明は樹脂封止型半導体装置の基本的構成を変化させ
ることなく熱放散性を向上せしめるリードフレームを提
供するものである。つまり熱伝導の必要な部分には、高
熱伝導度材料を使用し、その他の部分には高強度の金属
側斜を使用することによって、半導体装置の信頼性を損
なうことなく高熱放散性を有する樹脂封止型の半導体装
置を得ることを可能にしたものである。
(Object of the Invention) The present invention provides a lead frame that improves heat dissipation without changing the basic structure of a resin-sealed semiconductor device. In other words, by using high thermal conductivity materials in the areas that require heat conduction and using high-strength metal sidewalls in other areas, we have created a resin that has high heat dissipation properties without compromising the reliability of semiconductor devices. This made it possible to obtain a sealed semiconductor device.

(発明の構成) 本発明は、樹脂封止型半導体装置に使用するリードフレ
ームにおいて、半導体チップを固着するタブ部あるいは
該タブ部と内部リードが、それ以外の部分よりも熱伝導
性の良い材料で構成されていることを特徴とするリード
フレームである。
(Structure of the Invention) The present invention provides a lead frame used for a resin-sealed semiconductor device in which a tab portion for fixing a semiconductor chip or the tab portion and internal leads are made of a material with better thermal conductivity than other portions. This is a lead frame characterized by being composed of.

すなわち半導体チップの熱放散性に最も影響する部分は
半導体チップを固層するタブ部である。
That is, the portion that most affects the heat dissipation of the semiconductor chip is the tab portion that solidifies the semiconductor chip.

従って、本発明のリードフレームはタブ部金属を高熱伝
導度の材料で構成し、残部はそれぞれ適度な強度を有す
る材料で構成することとし、リードフレームがタブ部と
それ以外の部分とに2分割、或いはタブ部と内部リード
部とそれ以外の部分とに3分割されているものを、半導
体装置の組立工程でそれぞれ接続して使用するようにし
たものである。
Therefore, in the lead frame of the present invention, the tab part metal is made of a material with high thermal conductivity, and the remaining parts are made of materials with appropriate strength, so that the lead frame is divided into two parts: the tab part and the other parts. Alternatively, it is divided into three parts, a tab part, an internal lead part, and other parts, and is used by connecting them to each other in the assembly process of a semiconductor device.

(実施例) 以下第2図〜第4図を用いて本発明の第1の実施例を説
明する。まず第2図の平面図に示すように、タブ部のな
いリードフレームf42%Ni−Fe合金で製造する。
(Example) A first example of the present invention will be described below with reference to FIGS. 2 to 4. First, as shown in the plan view of FIG. 2, a lead frame without a tab portion is manufactured from an f42% Ni--Fe alloy.

5はタブ部を接続する部分である。次に第3図の平面図
に示すタブ部を無、酸素銅で製造する。7はタブリード
、5はフレーム部6への接続部である。タブ部以外の箇
所に使用する42チNi−Fe合金は高強度であり、従
来からリードフレーム材料として1更用されているもの
でろ妙、またタブ部の無酸素銅は高熱伝導度材料でめる
Oこの第2図で示したタブ部のないリードフレームと第
3図で示したタブ部とを、第4図のようにそれぞれ接続
部5において溶接、圧接あるいはペーストろう材を介し
て接続することで従来と同様の構成を持つリードフレー
ムを得ることができる。
5 is a part for connecting the tab parts. Next, the tab portion shown in the plan view of FIG. 3 is manufactured from oxygen-free copper. 7 is a tab lead, and 5 is a connection portion to the frame portion 6. The 42-inch Ni-Fe alloy used for parts other than the tab part has high strength and has been used as a lead frame material for a long time, and the oxygen-free copper in the tab part is a material with high thermal conductivity. The lead frame without a tab portion shown in FIG. 2 and the tab portion shown in FIG. This makes it possible to obtain a lead frame having the same configuration as the conventional one.

第5図は本発明の第2の実施例を示す平面図で、タブ部
と、内部リード部と、外部リードを含むその他の部分と
に3分割した場合の例で、(a)図は、外部リードを含
むその他の部分(1)、内部リート°部(11) 、タ
ブ部011)をそれぞれ示し、 (II)においては内
部リード2が個片に切り離されるのを防ぐため支持枠1
0を設けである。(b)図は、3分割した各部を接続部
5及び9において結合した図である0(効果) 本発明のリードフレームを用いて製造された半導体装置
は、タブ部が424Ni−Fe合金の約30倍の熱伝導
度を有する無酸素銅であるために、42合金単板で製造
された場合の半導体装置に比べて非常に熱放散性の良い
ものとなる。さらに第6図の断面図に示すように、タブ
4の厚さも自由に増減することが可能であり、半導体チ
ップ8の高さi由にコントロール可能である。すなわち
第6図ハ本発明リードフレームのタブ部の使用例を示す
もので、(a)はタブ4と内部リード2が同一高さで同
一厚さの場合の図でめり、(b)はタフ゛4の厚さを厚
くした場合の例を示し、(C)はりブ4の高さを下げた
場合の例を示す。さらにもう一つのオリ点として、リー
ドフレームの製造−triりブのtS状にとられれずに
できるため、4!r棟のりブに対【6したリードフレー
ムの製造設備の共用化が町有ヒとなりコストが低下する
ものでおる。第1の実施例ではす、−ドフレーム材とし
てタブ部以外は42%Ni−Fe合金を、タブ部には無
酸素銅を使用した力;、これに限られたものではなくて
、例えばタフ゛部以外にはリン青銅を、タブ部には0.
15%Sn入りCu合金を使用することも可能で、その
他の組合わせは数多〈実施することができるものである
。また第1の実施例では内部リード区外部リート°とを
分書1jせずに同一の材料で実施したが、第5図に示し
た第2の実施例のように内部!J−)’4分割して高熱
伝導度材料を使用することにより、さらに熱放散性を改
善することができる。
FIG. 5 is a plan view showing a second embodiment of the present invention, and is an example of a case where the second embodiment is divided into three parts: a tab part, an internal lead part, and other parts including external leads. The other parts (1) including the external lead, the internal lead part (11), and the tab part 011) are shown, and in (II), the support frame 1 is shown to prevent the internal lead 2 from being cut into individual pieces.
0 is set. (b) is a diagram in which each part divided into three parts is joined at connection parts 5 and 9.0 (Effect) A semiconductor device manufactured using the lead frame of the present invention has a tab part made of 424Ni-Fe alloy. Since the semiconductor device is made of oxygen-free copper, which has thermal conductivity 30 times higher, it has much better heat dissipation than a semiconductor device manufactured using a single sheet of 42 alloy. Further, as shown in the cross-sectional view of FIG. 6, the thickness of the tab 4 can be freely increased or decreased, and can be controlled depending on the height i of the semiconductor chip 8. That is, FIG. 6 shows an example of the use of the tab portion of the lead frame of the present invention, in which (a) is a diagram in which the tab 4 and the internal lead 2 have the same height and the same thickness, and (b) shows an example in which the tab portion is used. An example in which the thickness of the tube 4 is increased is shown, and (C) an example in which the height of the beam 4 is decreased is shown. Furthermore, as another point of orientation, lead frame manufacturing can be done without the tri-rib being taken in the tS shape, so 4! The production facilities for lead frames in R Building No. 6 will be shared and will be owned by the town, which will reduce costs. In the first embodiment, 42% Ni-Fe alloy is used as the hard frame material for the parts other than the tab part, and oxygen-free copper is used for the tab part. Phosphor bronze is used for the parts other than the part, and 0.0 is used for the tab part.
It is also possible to use a Cu alloy with 15% Sn, and numerous other combinations are possible. In addition, in the first embodiment, the internal leads and the external leads were made of the same material without being separated, but as in the second embodiment shown in FIG. J-)' By dividing it into four parts and using a high thermal conductivity material, the heat dissipation property can be further improved.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のリードフレームの平面図、第2図は本発
明のリードフレームの一部を示す平面図、第3図は同じ
くタブ部を示す平面図、第4図は第2図及び第3図に示
した部分を結合してなる本発明リードフレームの第1の
実施例を示す平面図、第5図は不発明リードフレームの
第20笑施例を示す平面図で、(a)は各部分図、(b
)は各部を結合した図、第6図(a) 、 (b) 、
 (C)はそれぞれ本発明リードフレームにおけるタブ
部の使用例を示す断面図である。 1・・・・・・外部リード、2・・・・・・内部リード
、3・・・・・・タイバー、4・・・・・・タブ、5・
・・・・・接続部、6・・・・・・フレーム部、7・・
・・・・タブリード、8・・・・・・#−導体チツブ、
9・・・・・・接続部、lO・・・・・・支持枠。 第 1 図 荀5図
FIG. 1 is a plan view of a conventional lead frame, FIG. 2 is a plan view showing a part of the lead frame of the present invention, FIG. 3 is a plan view showing the tab portion, and FIG. 3 is a plan view showing the first embodiment of the lead frame of the present invention, which is formed by combining the parts shown in FIG. Each partial view, (b
) is a diagram that combines each part, Figure 6 (a), (b),
(C) is a sectional view showing an example of use of the tab portion in the lead frame of the present invention. 1...External lead, 2...Internal lead, 3...Tie bar, 4...Tab, 5...
...Connection part, 6...Frame part, 7...
...Tab lead, 8...#-conductor tip,
9... Connection part, lO... Support frame. Figure 1 Figure 5

Claims (1)

【特許請求の範囲】[Claims] 樹脂封止型中導体装置に使用するリードフレームにおい
て、半導体チップを固着するタブ部あるいは該タブ部と
内部リードが、それ以外の部分より本熱伝導性の良い材
料で構成されていることを特徴とするリードフレーム。
A lead frame used in a resin-sealed medium conductor device is characterized in that the tab portion for fixing the semiconductor chip, or the tab portion and the internal leads, are made of a material with better thermal conductivity than other parts. lead frame.
JP59049801A 1984-03-15 1984-03-15 Lead frame Pending JPS60193365A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59049801A JPS60193365A (en) 1984-03-15 1984-03-15 Lead frame

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59049801A JPS60193365A (en) 1984-03-15 1984-03-15 Lead frame

Publications (1)

Publication Number Publication Date
JPS60193365A true JPS60193365A (en) 1985-10-01

Family

ID=12841246

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59049801A Pending JPS60193365A (en) 1984-03-15 1984-03-15 Lead frame

Country Status (1)

Country Link
JP (1) JPS60193365A (en)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62205650A (en) * 1986-03-05 1987-09-10 Sumitomo Electric Ind Ltd Substrate for semiconductor device
JPH01171256A (en) * 1987-12-25 1989-07-06 Fuji Electric Co Ltd Buitl-up structure of semiconductor device
JPH03129870A (en) * 1989-10-16 1991-06-03 Nec Kyushu Ltd Lead frame
JPH03147356A (en) * 1989-11-01 1991-06-24 Mitsubishi Electric Corp Lead frame for semiconductor device
US6329224B1 (en) * 1998-04-28 2001-12-11 Tessera, Inc. Encapsulation of microelectronic assemblies
EP1266856A1 (en) 2001-06-11 2002-12-18 Tokyo Kikai Seisakusho Ltd. Jaw device for rotary-press folding section
EP1277686A2 (en) 2001-07-18 2003-01-22 Kabushikigaisha Tokyo Kikai Seisakusho Cutting and folding mechanism for a web-fed rotary press
EP1382556A2 (en) 2002-07-16 2004-01-21 Kabushiki Kaisha Tokyo Kikai Seisakusho Apparatus for folding printed paper sections
US6740024B2 (en) 2002-05-09 2004-05-25 Kabushiki Kaisha Tokyo Kikai Seisakusho Jaw cylinder device at the folding station of a web-fed printing press

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62205650A (en) * 1986-03-05 1987-09-10 Sumitomo Electric Ind Ltd Substrate for semiconductor device
JPH01171256A (en) * 1987-12-25 1989-07-06 Fuji Electric Co Ltd Buitl-up structure of semiconductor device
JPH03129870A (en) * 1989-10-16 1991-06-03 Nec Kyushu Ltd Lead frame
JPH03147356A (en) * 1989-11-01 1991-06-24 Mitsubishi Electric Corp Lead frame for semiconductor device
US6329224B1 (en) * 1998-04-28 2001-12-11 Tessera, Inc. Encapsulation of microelectronic assemblies
US6541874B2 (en) 1998-04-28 2003-04-01 Tessera, Inc. Encapsulation of microelectronic assemblies
EP1266856A1 (en) 2001-06-11 2002-12-18 Tokyo Kikai Seisakusho Ltd. Jaw device for rotary-press folding section
EP1277686A2 (en) 2001-07-18 2003-01-22 Kabushikigaisha Tokyo Kikai Seisakusho Cutting and folding mechanism for a web-fed rotary press
US6673004B2 (en) 2001-07-18 2004-01-06 Kabushiki Kaisha Tokyo Kikai Seisakusho Cutting and folding mechanism for a web-fed rotary press
US6740024B2 (en) 2002-05-09 2004-05-25 Kabushiki Kaisha Tokyo Kikai Seisakusho Jaw cylinder device at the folding station of a web-fed printing press
EP1382556A2 (en) 2002-07-16 2004-01-21 Kabushiki Kaisha Tokyo Kikai Seisakusho Apparatus for folding printed paper sections

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