JPS61220836A - Ceramics circuit substrate - Google Patents

Ceramics circuit substrate

Info

Publication number
JPS61220836A
JPS61220836A JP6425485A JP6425485A JPS61220836A JP S61220836 A JPS61220836 A JP S61220836A JP 6425485 A JP6425485 A JP 6425485A JP 6425485 A JP6425485 A JP 6425485A JP S61220836 A JPS61220836 A JP S61220836A
Authority
JP
Japan
Prior art keywords
copper plate
circuit board
ceramic circuit
circuit substrate
present
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6425485A
Other languages
Japanese (ja)
Other versions
JPH0575576B2 (en
Inventor
松村　和男
忠 田中
大橋　勝治
平澤　康伸
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP6425485A priority Critical patent/JPS61220836A/en
Publication of JPS61220836A publication Critical patent/JPS61220836A/en
Publication of JPH0575576B2 publication Critical patent/JPH0575576B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/022—Processes for manufacturing precursors of printed circuits, i.e. copper-clad substrates
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/38—Improvement of the adhesion between the insulating substrate and the metal

Landscapes

  • Laminated Bodies (AREA)
  • Ceramic Products (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 ［発明の技術分野］ 本発明はアルミナ製基板と銅板とを直接接合した接着強
度の大きなセラミックス回路基板に関する。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a ceramic circuit board with high bonding strength in which an alumina substrate and a copper plate are directly bonded.

［発明の技術的背景とその問題点］ 近年、トランジスタ・モジュール用基板などとして使用
されるセラミックス回路基板の！１１造方法として、ア
ルミナ製基板等のセラミックス基板の所定位置に導体回
路を構成する銅板を配置し、銅の融点（１０８３℃）以
下、銅−酸化銅の共晶温度（１０６５℃）以上に加熱し
て接合面に形成された銅の共晶融体により両者を直接接
合させる方法が検討されている。[Technical background of the invention and its problems] In recent years, ceramic circuit boards have been used as substrates for transistor modules, etc. 11, a copper plate constituting a conductor circuit is placed in a predetermined position on a ceramic substrate such as an alumina substrate, and heated to a temperature below the melting point of copper (1083°C) and above the eutectic temperature of copper-copper oxide (1065°C). A method of directly joining the two using a copper eutectic melt formed on the joint surface is being considered.

この方法において銅板との接着強度が不充分なことがあ
り、また回路基板の銅板表面にふくれやはがれが生じる
ことがあって、製造歩留りが低いという問題点があった
。In this method, the adhesive strength with the copper plate may be insufficient, and the surface of the copper plate of the circuit board may blister or peel, resulting in a low manufacturing yield.

［発明の目的］ 本発明者らはセラミックス基板として従来より粒子が細
かく表面粗さく中心線平均粗さ）の小さいアルミナ製基
板を使用することにより、銅板との接合面積が大きくな
って接着強度が増大することを見い出した。[Purpose of the Invention] The present inventors used an alumina substrate with finer particles and lower surface roughness (center line average roughness) than conventional ceramic substrates, thereby increasing the bonding area with the copper plate and increasing the adhesive strength. found that it increases.

本発明はこのような知見にもどずいてなされたもので゛
、接着強度が大きく、製造歩留りを向上させたセラミッ
クス回路基板を提供することを目的とする。The present invention was made based on these findings, and an object of the present invention is to provide a ceramic circuit board with high adhesive strength and improved manufacturing yield.

［発明の概要］ すなわち本発明のセラミックス回路基板は表面粗さく中
心線平均粗さ）が０．１〜０．６μｍＲａのアルミナ製
基板の片面または両面に、銅版を加熱により直接接合し
てなることを特徴としている。[Summary of the invention] That is, the ceramic circuit board of the present invention is made by directly bonding a copper plate to one or both sides of an alumina substrate having a surface roughness (center line average roughness) of 0.1 to 0.6 μm Ra by heating. It is characterized by

本発明においてアルミナ製口板の表面粗さく中心線平均
粗さ）を０．１〜０．６μｓＲａと限定した理由は、０
．１μｍＲａより小さいと銅の共晶融体が漏れにくくな
るとともに機械的な食い込みが小さくなるので接猶強度
が弱くなり、０．６μｌｌＲａより大きいとボアーが多
くなって銅板と接合する面積が小さくなるので接着強度
が不充分になるとともに、銅板中の酸素が酸素ガスとな
ってふくれやはがれの原因となることによる。アルミナ
製基板の密度は３．６５〜３．９０ａ／ｄが好ましく、
これより小さいとボアーが多くなって接着強度が小さく
なる。In the present invention, the surface roughness (center line average roughness) of the alumina mouth plate is limited to 0.1 to 0.6 μsRa.
．． If it is smaller than 1μmRa, the copper eutectic melt will not easily leak and the mechanical bite will be small, resulting in weak clamping strength.If it is larger than 0.6μllRa, there will be more bores and the area to be bonded to the copper plate will be smaller. This is because the adhesive strength becomes insufficient and oxygen in the copper plate turns into oxygen gas, causing blistering and peeling. The density of the alumina substrate is preferably 3.65 to 3.90 a/d,
If it is smaller than this, the number of bores will increase and the adhesive strength will decrease.

本発明のセラミックス回路基板はたとえば次のようにし
て製造される。The ceramic circuit board of the present invention is manufactured, for example, as follows.

アルミナ製基板の片面または両面に酸素を１０−Ｏ〜２
０００１１＋）＋１．好ましくは３００〜５００１）ｌ
）−含有する、たとえばタフビッヂ電解銅板を配置し、
窒素ガス等の不活性雰囲気中、１０６５〜１０８３℃で
１〜３０分間加熱する。10-O~2 oxygen on one or both sides of the alumina substrate
00011+)+1. Preferably 300-5001)l
)-containing, for example, placing a tough bidge electrolytic copper plate,
Heat in an inert atmosphere such as nitrogen gas at 1065 to 1083°C for 1 to 30 minutes.

あるいは酸素をほとんど含有しない銅板を使用づる場合
は酸化性雰囲気中で加熱する。Alternatively, if a copper plate containing almost no oxygen is used, it is heated in an oxidizing atmosphere.

［発明の実施例］ 次に本発明の実施例について説明する。[Embodiments of the invention] Next, examples of the present invention will be described.

実施例 表面粗さく中心線平均粗さ）が０．３〜０．５μｍ　Ｒ
ａ　、密度３．７０〜３．８６ａ　ｌｃｊ、大きさ５４
１１＋１Ｘ　３３１１Ｘ　０　、６３５１！１１１のア
ルミナ製基板の両面に酸素含有ｆ１１４００ｐｐｍ、厚
さ０．３１１１１の銅板を配置し、この状態で１０７５
℃に保持した連続炉に装入し、炉内に窒素ガスを流しな
がら、試料を２００　ｍｍ／分の速度で搬送して加熱し
た。Example surface roughness (center line average roughness) is 0.3 to 0.5 μm R
a, density 3.70-3.86a lcj, size 54
11 + 1X 3311
The sample was placed in a continuous furnace maintained at .degree. C., and heated by being transported at a speed of 200 mm/min while flowing nitrogen gas into the furnace.

出口から試料を取り出し、銅板の接着状態を調べたとこ
ろ、接着強度は１５〜１８　ｋｏ／ｃｍで液体浸透探傷
試験による不良率は約１０％であった。When a sample was taken out from the outlet and the adhesion state of the copper plate was examined, the adhesion strength was 15 to 18 ko/cm, and the failure rate by liquid penetrant testing was about 10%.

一方表面相さく中心線平均粗さ）が０．７μ膳Ｒａ１密
度が３．５５〜３．６４（Ｊ　ｌｃｊのアルミナ製基板
を使用したセラミックス回路基板は、接着強度が１０〜
１４　ｋｇ／ｃａｂ、液体浸透探傷試験による不良率は
約２０％であった。On the other hand, ceramic circuit boards using JLCJ's alumina substrates have an adhesive strength of 10 to 3.64 (average roughness of the center line of surface grain) of 0.7μ and Ra1 density of 3.55 to 3.64.
14 kg/cab, and the defective rate by liquid penetrant testing was approximately 20%.

［発明の効果］ 以上の実施例からも明らかなように本発明方法によれば
接着強度の大きいセラミックス回路基板が得られ、また
不良率が低下して製造歩留りが向上する。[Effects of the Invention] As is clear from the above examples, according to the method of the present invention, a ceramic circuit board with high adhesive strength can be obtained, and the defect rate is reduced and the manufacturing yield is improved.

Claims (2)

【特許請求の範囲】[Claims] （１）表面粗さ（中心線平均粗さ）が０．１〜０．６μ
ｍＲａのアルミナ製基板の片面または両面に、銅板を加
熱により直接接合してなることを特徴とするセラミック
ス回路基板。(1) Surface roughness (center line average roughness) is 0.1 to 0.6μ
A ceramic circuit board characterized by having a copper plate directly bonded to one or both sides of an mRa alumina board by heating. （２）アルミナ製基板の密度が３．６５〜３．９０ｇ／
ｃｍ＾３である特許請求の範囲第１項記載のセラミック
ス回路基板。(2) Density of alumina substrate is 3.65 to 3.90g/
The ceramic circuit board according to claim 1, which has a diameter of cm^3.
JP6425485A 1985-03-28 1985-03-28 Ceramics circuit substrate Granted JPS61220836A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6425485A JPS61220836A (en) 1985-03-28 1985-03-28 Ceramics circuit substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6425485A JPS61220836A (en) 1985-03-28 1985-03-28 Ceramics circuit substrate

Publications (2)

Publication Number Publication Date
JPS61220836A true JPS61220836A (en) 1986-10-01
JPH0575576B2 JPH0575576B2 (en) 1993-10-20

Family

ID=13252851

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6425485A Granted JPS61220836A (en) 1985-03-28 1985-03-28 Ceramics circuit substrate

Country Status (1)

Country Link
JP (1) JPS61220836A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63166774A (en) * 1986-12-27 1988-07-09 同和鉱業株式会社 Manufacture of joined body of copper plate and alumina substrate

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5237914A (en) * 1975-07-30 1977-03-24 Gen Electric Method of directly combining metal to ceramics and metal
JPS5649588A (en) * 1979-09-28 1981-05-06 Tokyo Shibaura Electric Co Method of forming thin film for ceramic substrate

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5237914A (en) * 1975-07-30 1977-03-24 Gen Electric Method of directly combining metal to ceramics and metal
JPS5649588A (en) * 1979-09-28 1981-05-06 Tokyo Shibaura Electric Co Method of forming thin film for ceramic substrate

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63166774A (en) * 1986-12-27 1988-07-09 同和鉱業株式会社 Manufacture of joined body of copper plate and alumina substrate
JPH0367988B2 (en) * 1986-12-27 1991-10-24 Dowa Mining Co

Also Published As

Publication number Publication date
JPH0575576B2 (en) 1993-10-20

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Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term