JPS61216477A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS61216477A JPS61216477A JP60057815A JP5781585A JPS61216477A JP S61216477 A JPS61216477 A JP S61216477A JP 60057815 A JP60057815 A JP 60057815A JP 5781585 A JP5781585 A JP 5781585A JP S61216477 A JPS61216477 A JP S61216477A
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- output
- surge voltage
- channel
- output terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0266—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は半導体装置に堡シ、特に半導体装置の出力端子
に印加されるサージ電圧の保@装&を設けた半導体装置
に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device provided with a barrier, particularly a surge voltage protection device applied to an output terminal of the semiconductor device.
なお、以下の説明は、このサージ電圧印加が特に問題と
なるMO8型半導体装置について行う。Note that the following description will be made regarding an MO8 type semiconductor device in which this surge voltage application is particularly problematic.
従来、MOa型半導体装置の出力端子は、出力端子を態
動する出力用MO8トランジスタが部分大きなチャネル
幅を有するため、外部からのサージ電圧に対する保護は
特に必要とされていなかり九。Conventionally, the output terminal of an MOa type semiconductor device does not particularly require protection against external surge voltage because the output MO8 transistor that activates the output terminal has a partially large channel width.
しかし、近年の半導体装置の高置集積度の向上に伴なう
、不純物拡散領域の接合深さの減少、短チヤネル化等に
より、出力用トランジスタの耐圧が低下し、外部サージ
電圧による破壊か起こシやすくなってきている。However, with the recent increase in the degree of high-level integration of semiconductor devices, the junction depth of impurity diffusion regions has decreased, channels have become shorter, etc., and the withstand voltage of output transistors has decreased, causing damage due to external surge voltage. It's getting easier.
本発明の目的社、上記の従来の出力回路で問題であった
外部サージ電圧に対する耐圧を向上させることかできる
半導体装置を提供することにある。SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor device that can improve the withstand voltage against external surge voltage, which has been a problem with the conventional output circuits described above.
本発明の半導体装置は、出力端子に*aされかランジス
タを非導通状態に、する−足電位に接続したことからな
っている。The semiconductor device of the present invention has a transistor connected to the output terminal in a non-conducting state and at a negative potential.
以下1本発明の実施例について図面を参照して説明する
。An embodiment of the present invention will be described below with reference to the drawings.
第1図は本発明の一実施例の要部を示す平面図、第2図
はその等価回路図で、第1図は第2図のトランジスタ(
h、Qs部分を示す。FIG. 1 is a plan view showing a main part of an embodiment of the present invention, FIG. 2 is an equivalent circuit diagram thereof, and FIG. 1 is a transistor (
h, shows the Qs part.
本実施例は、金属配f!14によりて出力端子21に接
続され、かつ、6個に分割されたゲート電極12、 l
3’を有するNチャネルMOSトランジスタを介して
接地電位GNDに接続したことからなっている。すなわ
ち、ゲート電極13が接地された部分により、第2図に
示す保護用トランジスタQ3電源Vccソースが出力用
トランジスタQ1のドレインに接続された出力用トラン
ジスタでめる。In this example, metal distribution! A gate electrode 12 connected to the output terminal 21 by 14 and divided into six pieces, l
3' is connected to the ground potential GND via an N-channel MOS transistor. That is, the grounded portion of the gate electrode 13 connects the power supply Vcc source of the protection transistor Q3 shown in FIG. 2 to the output transistor connected to the drain of the output transistor Q1.
ここで、出力用トランジスタQl 、 Q2が非導通状
態時に、外部から出力用トランジスタQ1の耐圧を起え
るサージ電圧か印加された時、aha子21に接続され
た金属配線14よ)トランジスタQ1.Qaにサージ電
圧が印加される。トランジスタ(h、Q3のドレイン部
に加わった電荷は、出力トランジスタQ!t−駆動する
ゲート電極12のチャネル部分を通じてソースに流入す
るか、同時に接地電位に固定された保護用トランジスタ
Q3のゲート電極13のチャネル部分にも流れるため、
結果として、単位チャネル面積当たルの電流量が減少し
、より大きなサージ電圧に対して出力端子21が耐えう
る様になる。Here, when the output transistors Ql and Q2 are in a non-conducting state, when a surge voltage is applied from the outside that causes the withstand voltage of the output transistor Q1, the metal wiring 14 connected to the aha terminal 21) transistor Q1. A surge voltage is applied to Qa. The charge added to the drain part of the transistor (h, Q3) flows into the source through the channel part of the output transistor Q!t-driving gate electrode 12, or at the same time flows into the gate electrode 13 of the protective transistor Q3 fixed to the ground potential. Because it also flows to the channel part of
As a result, the amount of current per unit channel area is reduced, allowing the output terminal 21 to withstand larger surge voltages.
なお、以上の実施例はトランジスタとしてNチャネルM
U8 トランジスタを対象としたが、本発明はこれに限
足されることなく、PチャネルMO8トランジスタでも
、更に一般的にバイポーラトランジスタを含むトランジ
スタ全体に適用されることは言うまでもない。Note that the above embodiment uses an N-channel M transistor as a transistor.
Although the present invention is directed to the U8 transistor, it goes without saying that the present invention is not limited thereto and is applicable to P-channel MO8 transistors, and more generally to all transistors including bipolar transistors.
以上、詳細説明したとおり、本発明によれば、出力端子
に印加され友外部サージ電圧は、出力用トランジスタの
耐圧を越えると、出力回路を構成電位に固定した保護用
トランジスタ側にも流れる。As described in detail above, according to the present invention, when the external surge voltage applied to the output terminal exceeds the withstand voltage of the output transistor, it also flows to the protection transistor that fixes the output circuit to the configuration potential.
このため、出力用トランジスタの単位面積当シに流れる
電流量は少なくなシ、出力端子の保護能力が向上すると
ころの半導体装置が得られる。Therefore, a semiconductor device can be obtained in which the amount of current flowing per unit area of the output transistor is small and the ability to protect the output terminal is improved.
第1図は本発明の一実施例の要部を示す平面図、第2図
はその等価回路図である。
11・・・・・・N型拡散領域、12.13・・・・・
・ゲート電極、14.15・・・・・・金属配線、16
・・・・・・入力信号線、17・・・・・・コンタクト
ホール、21・・・・・・出力端子、22.23・・・
・・・入力信号端、Q 1* Q 2・・・・・・出力
紳用トランジスタs Qs・・・・・・保護用トランジ
スタ、Vcc・・・・・・電源、GND・・・・・・接
地電位。FIG. 1 is a plan view showing essential parts of an embodiment of the present invention, and FIG. 2 is an equivalent circuit diagram thereof. 11...N-type diffusion region, 12.13...
・Gate electrode, 14.15...Metal wiring, 16
...Input signal line, 17...Contact hole, 21...Output terminal, 22.23...
...Input signal terminal, Q 1 * Q 2 ... Output transistor s Qs ... Protection transistor, Vcc ... Power supply, GND ... Ground potential.
Claims (1)
有する出力用トランジスタの前記制御電極の一部をその
部分における前記出力用トランジスタを非導通状態にす
る一定電位に接続したことを特徴とする半導体装置。A part of the control electrode of an output transistor connected to an output terminal and having a control electrode divided into a plurality of parts is connected to a constant potential that makes the output transistor in that part non-conductive. Semiconductor equipment.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60057815A JPS61216477A (en) | 1985-03-22 | 1985-03-22 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60057815A JPS61216477A (en) | 1985-03-22 | 1985-03-22 | Semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS61216477A true JPS61216477A (en) | 1986-09-26 |
JPH0571145B2 JPH0571145B2 (en) | 1993-10-06 |
Family
ID=13066412
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP60057815A Granted JPS61216477A (en) | 1985-03-22 | 1985-03-22 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61216477A (en) |
Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5060048A (en) * | 1986-10-22 | 1991-10-22 | Siemens Aktiengesellschaft & Semikron GmbH | Semiconductor component having at least one power mosfet |
US5239194A (en) * | 1990-03-02 | 1993-08-24 | Kabushiki Kaisha Toshiba | Semiconductor device having increased electrostatic breakdown voltage |
US6507089B1 (en) | 1999-06-16 | 2003-01-14 | Nec Corporation | Semiconductor device, semiconductor integrated circuit, and method for manufacturing semiconductor device |
US6525388B1 (en) | 1999-11-11 | 2003-02-25 | Nec Compound Semiconductor Devices, Ltd. | Compound semiconductor device having diode connected between emitter and collector of bipolar transistor |
EP1359620A2 (en) * | 2002-04-24 | 2003-11-05 | Texas Instruments Incorporated | ESD Protection Of Noise Decoupling Capacitors |
JP2004304136A (en) * | 2003-04-01 | 2004-10-28 | Oki Electric Ind Co Ltd | Semiconductor device |
EP0948051A3 (en) * | 1998-03-24 | 2006-04-05 | NEC Electronics Corporation | Semiconductor device having a protective circuit |
WO2014112294A1 (en) * | 2013-01-18 | 2014-07-24 | セイコーインスツル株式会社 | Semiconductor device |
CN104919577A (en) * | 2013-01-18 | 2015-09-16 | 精工电子有限公司 | Semiconductor device |
CN105280690A (en) * | 2014-07-15 | 2016-01-27 | 瑞萨电子株式会社 | Semiconductor device |
-
1985
- 1985-03-22 JP JP60057815A patent/JPS61216477A/en active Granted
Cited By (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5060048A (en) * | 1986-10-22 | 1991-10-22 | Siemens Aktiengesellschaft & Semikron GmbH | Semiconductor component having at least one power mosfet |
US5239194A (en) * | 1990-03-02 | 1993-08-24 | Kabushiki Kaisha Toshiba | Semiconductor device having increased electrostatic breakdown voltage |
EP0948051A3 (en) * | 1998-03-24 | 2006-04-05 | NEC Electronics Corporation | Semiconductor device having a protective circuit |
US6507089B1 (en) | 1999-06-16 | 2003-01-14 | Nec Corporation | Semiconductor device, semiconductor integrated circuit, and method for manufacturing semiconductor device |
US6525388B1 (en) | 1999-11-11 | 2003-02-25 | Nec Compound Semiconductor Devices, Ltd. | Compound semiconductor device having diode connected between emitter and collector of bipolar transistor |
EP1359620A2 (en) * | 2002-04-24 | 2003-11-05 | Texas Instruments Incorporated | ESD Protection Of Noise Decoupling Capacitors |
EP1359620A3 (en) * | 2002-04-24 | 2008-07-23 | Texas Instruments Incorporated | ESD Protection Of Noise Decoupling Capacitors |
JP2004304136A (en) * | 2003-04-01 | 2004-10-28 | Oki Electric Ind Co Ltd | Semiconductor device |
WO2014112294A1 (en) * | 2013-01-18 | 2014-07-24 | セイコーインスツル株式会社 | Semiconductor device |
JP2014138145A (en) * | 2013-01-18 | 2014-07-28 | Seiko Instruments Inc | Semiconductor device |
CN104919577A (en) * | 2013-01-18 | 2015-09-16 | 精工电子有限公司 | Semiconductor device |
CN104937701A (en) * | 2013-01-18 | 2015-09-23 | 精工电子有限公司 | Semiconductor device |
CN105280690A (en) * | 2014-07-15 | 2016-01-27 | 瑞萨电子株式会社 | Semiconductor device |
CN112820770A (en) * | 2014-07-15 | 2021-05-18 | 瑞萨电子株式会社 | Semiconductor device with a plurality of transistors |
CN105280690B (en) * | 2014-07-15 | 2021-09-28 | 瑞萨电子株式会社 | Semiconductor device with a plurality of transistors |
Also Published As
Publication number | Publication date |
---|---|
JPH0571145B2 (en) | 1993-10-06 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
EXPY | Cancellation because of completion of term |