JPS61212023A - Semiconductor wafer pressing structure for dry etching device - Google Patents
Semiconductor wafer pressing structure for dry etching deviceInfo
- Publication number
- JPS61212023A JPS61212023A JP5227185A JP5227185A JPS61212023A JP S61212023 A JPS61212023 A JP S61212023A JP 5227185 A JP5227185 A JP 5227185A JP 5227185 A JP5227185 A JP 5227185A JP S61212023 A JPS61212023 A JP S61212023A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor wafer
- electrode
- wafer holding
- plate
- dry etching
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 183
- 238000001312 dry etching Methods 0.000 title claims description 22
- 238000003825 pressing Methods 0.000 title abstract description 6
- 230000007797 corrosion Effects 0.000 claims abstract description 7
- 238000005260 corrosion Methods 0.000 claims abstract description 7
- 239000000463 material Substances 0.000 claims description 26
- 238000001816 cooling Methods 0.000 claims description 9
- 239000012777 electrically insulating material Substances 0.000 claims description 6
- 238000000034 method Methods 0.000 abstract description 11
- 230000005684 electric field Effects 0.000 abstract description 5
- 239000000919 ceramic Substances 0.000 abstract description 3
- 239000010453 quartz Substances 0.000 abstract description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 3
- 239000011810 insulating material Substances 0.000 abstract 2
- 239000011359 shock absorbing material Substances 0.000 abstract 1
- 235000012431 wafers Nutrition 0.000 description 146
- 238000005530 etching Methods 0.000 description 19
- 239000000498 cooling water Substances 0.000 description 8
- 230000000694 effects Effects 0.000 description 8
- 230000002093 peripheral effect Effects 0.000 description 4
- 239000003507 refrigerant Substances 0.000 description 4
- 229920000642 polymer Polymers 0.000 description 3
- 241000257465 Echinoidea Species 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 238000010420 art technique Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 239000004519 grease Substances 0.000 description 1
- 230000001771 impaired effect Effects 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 238000010849 ion bombardment Methods 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000007261 regionalization Effects 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 238000001179 sorption measurement Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Drying Of Semiconductors (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の利用分野〕
本発明は、ドライエツチング装置の半導体ウェハ押え機
構に係り、特に構造が簡単で量産型のドライエツチング
装置に好適な半導体ウニノー押え機構に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a semiconductor wafer holding mechanism for a dry etching apparatus, and more particularly to a semiconductor wafer holding mechanism that has a simple structure and is suitable for mass-produced dry etching apparatuses.
ドライエツチング装置による半導体集積回路の微細パタ
ーン形成は、被処理物である半導体ウェハ上に所望のパ
ターンをレジストの露光現象によって形成し、これをマ
スクとして、真空雰囲気中に導入したエツチングガスの
高周波グロー放電を利用してレジストパターンを半導体
ウェハ上に転写することにより行われる。その際、レジ
スト膜はエツチングガスのプラズマ照射やイオン衝撃を
受けて半導体ウェノ・の温度が上昇するため、熱による
軟化や変質を引き起こし、微細パターン形成に悪影響を
与えることがある。このため、レジストの軟化点以下に
、半導体ウェハの温度上昇を抑制しなければならず特に
エツチング速度を向上させる目的で高周波電力を上げる
場合には、半導体ウェハの冷却はドライエツチング装置
にとって、必要不可欠でおる。Formation of fine patterns on semiconductor integrated circuits using dry etching equipment involves forming a desired pattern on a semiconductor wafer, which is an object to be processed, by exposing a resist to light, and using this as a mask, high-frequency glow of an etching gas introduced into a vacuum atmosphere is applied. This is done by transferring a resist pattern onto a semiconductor wafer using electric discharge. At this time, the resist film is subjected to etching gas plasma irradiation and ion bombardment, which causes the temperature of the semiconductor film to rise, causing softening and deterioration due to heat, which may have an adverse effect on fine pattern formation. For this reason, it is necessary to suppress the temperature rise of the semiconductor wafer to below the softening point of the resist, and cooling the semiconductor wafer is essential for dry etching equipment, especially when increasing high-frequency power for the purpose of increasing the etching rate. I'll go.
そこで、従来半導体ウェハを載置する水冷電極と半導体
ウニ戸開の伝熱性能を向上させるため、半導体ウェハと
電極間に弾性シートやグリースを介在させる技術、半導
体ウェノ１を電極に機械的に押圧する技術、または静電
吸着を利用して半導体ウェハを電極忙密着させる技術な
どが提案されている。Therefore, in order to improve the heat transfer performance of the conventional water-cooled electrode on which the semiconductor wafer is placed and the semiconductor sea urchin door opening, we developed a technology that interposed an elastic sheet or grease between the semiconductor wafer and the electrode, and mechanically pressed the semiconductor wafer 1 onto the electrode. Techniques have been proposed to bring semiconductor wafers into close contact with electrodes using electrostatic adsorption.
前記半導体ウェハな電極に機械的に押圧する技術として
は、例えば特開昭５７−４５２４０号公報特開昭５５−
１２７０３４号公報忙開示されている技術がある。しか
し、これらの先行技術では、半導体ウェハを電極へ載置
する度に、半導体ウェハをねじ止め治具で押圧するため
、量産型のドライエツチング装置には採用し難い欠点や
、構造が複雑で、かつ半導体ウェハ押え機構部分が半導
体ウェハの載置面からプラズマ中に突出していて、半導
体ウェハ周辺の電界を乱すため、電界に垂直に入射して
半導体ウェハを物理的に食刻するイオンの入射の方向性
を失うので、半導体ウェハ面上のエツチングの均一性を
損うという欠点があった。Techniques for mechanically pressing the semiconductor wafer electrode include, for example, Japanese Patent Application Laid-Open No. 57-45240 and Japanese Patent Application Laid-Open No. 55-
There is a technique disclosed in the publication No. 127034. However, in these prior art techniques, each time the semiconductor wafer is placed on the electrode, the semiconductor wafer is pressed with a screw jig, so it has drawbacks that make it difficult to adopt it in mass-produced dry etching equipment, and the structure is complicated. In addition, the semiconductor wafer holding mechanism protrudes into the plasma from the semiconductor wafer mounting surface and disturbs the electric field around the semiconductor wafer, preventing the incidence of ions perpendicular to the electric field and physically etching the semiconductor wafer. Since the etching directionality is lost, the etching uniformity on the semiconductor wafer surface is impaired.
本発明の目的は、前記先行技術の欠点をなくし、電極上
に載置された半導体ウェハ周辺の電界の乱れを抑制でき
、かつ簡単な構造で、しかも量産型のドライエツチング
装置に適し、半導体ウェハと電極間の伝熱性能を向上さ
せ得るドライエツチング装置の半導体ウェハ押え機構を
提供することにあり、さらに本発明の他の目的は、エツ
チング処理された半導体ウェハを半導体ウェハ押え本体
から確実に引き離し得るドライエツチング装置の半導体
ウェハ押え機構を提供することにある。An object of the present invention is to eliminate the drawbacks of the prior art, suppress disturbances in the electric field around a semiconductor wafer placed on an electrode, have a simple structure, and be suitable for mass-produced dry etching equipment. Another object of the present invention is to provide a semiconductor wafer holding mechanism for a dry etching apparatus that can improve the heat transfer performance between the semiconductor wafer holding body and the semiconductor wafer holding body. An object of the present invention is to provide a semiconductor wafer holding mechanism for a dry etching apparatus.
本発明の１番目の発明は、特許請求の範囲第１項に記載
のとおり、耐食性、耐熱性を有する電気絶縁材料で薄板
状に形成されかつ電極上に載置された半導体ウェハの外
縁部を押える半導体ウェハ押え本体と、この半導体ウェ
ハ押え本体を弾発的に支持する板ばねとにより構成した
ところに特徴を有するもので、この構成により、電極上
に載置された半導体ウェハ周辺の電界の乱れを抑制でき
、機構全体の構造を簡略化でき、量産型のドライエツチ
ング装置に適用して半導体ウェノ１と電極間の伝熱性能
の向上を図ることができる。As stated in claim 1, the first aspect of the present invention is to provide an outer edge portion of a semiconductor wafer formed into a thin plate shape from an electrically insulating material having corrosion resistance and heat resistance and placed on an electrode. This device is characterized by being composed of a semiconductor wafer presser body that holds down the semiconductor wafer, and a leaf spring that resiliently supports the semiconductor wafer presser body.With this configuration, the electric field around the semiconductor wafer placed on the electrode is reduced. Disturbances can be suppressed, the structure of the entire mechanism can be simplified, and the heat transfer performance between the semiconductor wafer 1 and the electrode can be improved by applying it to a mass-produced dry etching device.
また、本発明の２番目の発明は、特許請求の範囲第３項
に記載のとおり、半導体ウェノ１押え本体から半導体ウ
ェハな離脱させる離脱手段を備えているところに特徴を
有するもので、この構成により、エツチング処理された
半導体ウェハを半導体ウェハ押え本体から確実に引き離
すことができる。Further, the second invention of the present invention is characterized in that it is provided with a detaching means for detaching the semiconductor wafer from the semiconductor wafer 1 presser main body, as described in claim 3. As a result, the etched semiconductor wafer can be reliably separated from the semiconductor wafer holding body.
以下、本発明の実施例を図面により説明する第１図およ
び第２図は、本発明を適用すべき平行平板型ドライエツ
チング装置の一例と、これに適用された本発明半導体ウ
ェハ押え機構の一実施例を示す。1 and 2, which illustrate embodiments of the present invention using drawings, show an example of a parallel plate type dry etching apparatus to which the present invention is applied, and an example of a semiconductor wafer holding mechanism of the present invention applied thereto. An example is shown.
これらの図に示す平行平板型ドライエツチング装置は、
処理室１と、この処理室１内の上部側に定置された電極
３と、処理室１の下部に形成された電極導入口２から処
理室１内に導入される電極６とを具備している。前記処
理室１内は、大気に対して気密に保持されている。前記
電極３には、筒軸４と、複数個の小孔５とが設けられ、
筒軸４の内部から小孔５を通じて、真空雰囲気中で処理
室１内にエツチングガスを導入するようになっている。The parallel plate dry etching equipment shown in these figures is
It comprises a processing chamber 1, an electrode 3 fixed at the upper side of the processing chamber 1, and an electrode 6 introduced into the processing chamber 1 from an electrode introduction port 2 formed at the lower part of the processing chamber 1. There is. The inside of the processing chamber 1 is kept airtight from the atmosphere. The electrode 3 is provided with a cylindrical shaft 4 and a plurality of small holes 5,
Etching gas is introduced into the processing chamber 1 in a vacuum atmosphere from inside the cylindrical shaft 4 through the small hole 5.
前記電極６は、軸７を介して上下駆動装置（図示せず）
に連結され電極導入口２を通じて処理室１内の前記電極
３に対向する定位置へ移動可能に構成されている前記電
極３，６間には、高周波電力が印加されるようになって
いる。また、前記電極６には電極冷却手段と、半導体ウ
ェハ冷却手段とが設けられている。前記電極冷却手段は
、軸７の内部から電極６の内部にわたって設けられた冷
却水導入路８と、電極６内に形成された冷却水室９と、
電極６の内部から軸７の内部にわたって設けられた冷却
水導出路１０とを有して構成され、冷却水を循環させて
電極６を冷却するようになっている。前記半導体ウェハ
冷却手段は、軸７から電極６の内部に設けられたバイブ
１１の内部を通じて冷媒ガスを供給し。The electrode 6 is connected to a vertical drive device (not shown) via a shaft 7.
High frequency power is applied between the electrodes 3 and 6, which are connected to each other and are movable through the electrode introduction port 2 to a fixed position opposite the electrode 3 in the processing chamber 1. Further, the electrode 6 is provided with an electrode cooling means and a semiconductor wafer cooling means. The electrode cooling means includes a cooling water introduction path 8 provided from the inside of the shaft 7 to the inside of the electrode 6, and a cooling water chamber 9 formed inside the electrode 6.
A cooling water outlet path 10 is provided extending from the inside of the electrode 6 to the inside of the shaft 7, and the cooling water is circulated to cool the electrode 6. The semiconductor wafer cooling means supplies refrigerant gas from the shaft 7 through the inside of the vibrator 11 provided inside the electrode 6.
半導体ウェハ１２を冷却するようになっている。The semiconductor wafer 12 is cooled.
一方、半導体ウェハ押え機構は第１図〜第４図に示すよ
うに、処理室１に形成された電極導入口２の上方に設置
された半導体ウェハ押え本体１３と、これを弾発的に支
持する板ばね１９と、半導体ウェハ押え本体１３からエ
ツチング処理された半導体ウェハ１２を離脱させる離脱
手段としての板はね２１とを備えている。On the other hand, as shown in FIGS. 1 to 4, the semiconductor wafer holding mechanism includes a semiconductor wafer holding main body 13 installed above the electrode introduction port 2 formed in the processing chamber 1, and a semiconductor wafer holding main body 13 that elastically supports this. and a plate spring 21 as a detaching means for detaching the etched semiconductor wafer 12 from the semiconductor wafer holding main body 13.
前記半導体ウェハ押え本体１３は、半導体ウェハ押えプ
レート１４と、緩衝材１５とを有している前記半導体ウ
ェハ押えプレート１４は、前記電極３．６間に形成され
るプラズマ状態の乱れを小さく押えるため、耐食性。耐
熱性に優れた電気絶縁材料、例えばセラミックスや石英
の薄板で形成されている。また、半導体ウェハ押えプレ
ート１４は、第３図に示すように、中空円盤状に形成さ
れている。前記緩衝材１５け、第３図から分かるように
、円弧形の緩衝材片間に前記離脱手段としての板ばね２
１を挟んで、前記半導体ウェハ押えプレート１４と同心
円のリング状に組み合わされ、かつ前記半導体ウェハ押
えプレート１４０半導体ウェハ押え面側、つまり電極６
側の面に配置されている。さらに、前記緩衝材１５は半
導体ウェハ押えプレート１４と緩衝材ホルダ１６間に挟
持されており、この緩衝材ホルダ１６は座板１７と、半
導体ウェハ押え本体支持用の板ばね１９と一緒に、円周
方向に等間隔をおいて設けられた複数本の取り付はボル
ト１８により前記半導体ウェハ押えプレート１４に共締
めされている。The semiconductor wafer holding main body 13 includes a semiconductor wafer holding plate 14 and a cushioning material 15. The semiconductor wafer holding plate 14 suppresses disturbances in the plasma state formed between the electrodes 3.6 to a minimum. , corrosion resistance. It is made of a thin plate of electrically insulating material with excellent heat resistance, such as ceramics or quartz. Further, the semiconductor wafer holding plate 14 is formed into a hollow disk shape, as shown in FIG. As can be seen from FIG. 3, the leaf spring 2 serving as the release means is inserted between the arc-shaped pieces of the cushioning material.
1 in a concentric ring shape with the semiconductor wafer holding plate 14, and the semiconductor wafer holding plate 140 on the semiconductor wafer holding surface side, that is, the electrode 6.
placed on the side surface. Furthermore, the cushioning material 15 is held between a semiconductor wafer holding plate 14 and a cushioning material holder 16, and this cushioning material holder 16 is held in a circular shape together with a seat plate 17 and a leaf spring 19 for supporting the semiconductor wafer holding main body. A plurality of attachments provided at equal intervals in the circumferential direction are jointly fastened to the semiconductor wafer holding plate 14 by bolts 18.
そして、前記緩衝材１５は電極６上に載置された半導体
ウェハ１２に直接当接するようになっている。The buffer material 15 is adapted to directly contact the semiconductor wafer 12 placed on the electrode 6.
前記半導体ウェハ押え本体支持用の板ばね１９は、第５
図から分かるように、半導体ウェハ押えプレート１４と
同心円のリング状に形成されている。そして、この板は
ね１９は半導体ウェハ押えプレート１４に、前述のごと
く、取り付はボルト１８により緩衝材１５と一緒に結合
され、また処理室１に形成された電極導入口２の周縁部
に、第３図に示すように、円周方向に前記取り付はポル
） １８．１８間に設けられた複数本の取り付はボルト
２０により結合されていて、半導体ウェハ押え本体１３
を弾発的に作用させるように支持している。The leaf spring 19 for supporting the semiconductor wafer holding main body has a fifth
As can be seen from the figure, it is formed into a ring shape concentric with the semiconductor wafer holding plate 14. This plate spring 19 is attached to the semiconductor wafer holding plate 14 together with the buffer material 15 by bolts 18 as described above, and is attached to the peripheral edge of the electrode introduction port 2 formed in the processing chamber 1. , as shown in FIG.
It is supported so that it acts elastically.
前記エツチング処理された半導体ウェハの離脱手段とし
ての板ばね２１は、第３図から分かるように、短冊型に
形成され、かつ第４図忙示すように、例月側半部が下方
に向かって突出する形状に折り曲げられている。また、
この板はね２１は円周方向において前記緩衝材片間に介
装されて複数個配置されており、各板ばね２１は取り付
は用ピン２２を介して前記半導体ウェハ押えプレート１
４に固定され、かつ根元側半部は半導体ウェハ押えプレ
ート１４と緩衝材ホルダ１６間に挟持されている。As can be seen from FIG. 3, the leaf spring 21, which serves as a means for removing the etched semiconductor wafer, is formed into a rectangular shape, and as shown in FIG. It is bent into a protruding shape. Also,
A plurality of plate springs 21 are interposed between the cushioning material pieces in the circumferential direction, and each plate spring 21 is attached to the semiconductor wafer holding plate 1 through a pin 22.
4, and the base half is held between the semiconductor wafer holding plate 14 and the cushioning material holder 16.
前記実施例の半導体ウェハ押え機構は、平行平板型ドラ
イエツチング装置と一緒に次のように使用され、作用す
る。The semiconductor wafer holding mechanism of the above embodiment is used and operates in the following manner together with a parallel plate type dry etching apparatus.
すなわち、第１図に示すように、電極６を処理室１から
下降させた位置で、電極６上に処理すべき半導体ウェハ
１２を載置し、ついで電極６を処理室１に形成された電
極導入口２を通じて処理室１内に導入し、この処理室１
内に設置された電極３に対向する定位置まで上昇させる
。That is, as shown in FIG. 1, the semiconductor wafer 12 to be processed is placed on the electrode 6 at a position where the electrode 6 is lowered from the processing chamber 1, and then the electrode 6 is placed on the electrode formed in the processing chamber 1. It is introduced into the processing chamber 1 through the introduction port 2, and the processing chamber 1 is
It is raised to a fixed position facing the electrode 3 installed inside.
前記電極６を上昇させる間に、この電極６上゛に載置さ
れている半導体ウェハ１２は、最初に半導体ウェハ押え
機構における半導体ウェハの離脱手段としての板ばね２
１に接し、ついで板ばね２１がたわみ、半導体ウェハ１
２は半導体ウェハ押え機構の緩衝材１５に接する。続い
て、電極６を上昇させると、取り付はボルト１８を介し
て半導体ウェハ押えプレー）１４に結合されかつ他の取
り付はボルト２２を介して処理室１の電極導入 ゛
口２の周縁部に結合された半導体ウェハ押え本体支持用
の板ばね１９かたわみ、電極６を処理室１内に設置され
た電極３忙対向する定位［まで上昇させると、前記板ば
ね１９のたわみに相当する押え力で、半導体ウェハ押え
本体１３により半導体ウェハ１２Ｆｉ電極６上に押し付
けられ、密着する。While the electrode 6 is being raised, the semiconductor wafer 12 placed on the electrode 6 is first moved by the leaf spring 2 as a semiconductor wafer release means in the semiconductor wafer holding mechanism.
1, then the leaf spring 21 is deflected, and the semiconductor wafer 1
2 is in contact with the cushioning material 15 of the semiconductor wafer holding mechanism. Subsequently, when the electrode 6 is raised, the attachment is connected to the semiconductor wafer holding plate 14 via the bolt 18, and the other attachment is attached to the peripheral edge of the electrode introduction port 2 of the processing chamber 1 via the bolt 22. When the plate spring 19 for supporting the main body of the semiconductor wafer press coupled to is deflected, and the electrode 6 is raised to a position opposite to the electrode 3 installed in the processing chamber 1, the presser foot corresponding to the deflection of the plate spring 19 is Due to the force, the semiconductor wafer 12 is pressed onto the Fi electrode 6 by the semiconductor wafer holding main body 13 and is brought into close contact with the semiconductor wafer 12Fi electrode 6.
前記電極６を定位置まで上昇させた後、真空雰囲気中で
電極３の筒軸４の内部を経て小孔５１からエツチングガ
スが導入され、電極３，６間に高周波電力が印加され、
半導体ウェハ１２にエツチング処理が施される。After the electrode 6 is raised to a fixed position, etching gas is introduced from the small hole 51 through the inside of the cylindrical shaft 4 of the electrode 3 in a vacuum atmosphere, and high frequency power is applied between the electrodes 3 and 6.
The semiconductor wafer 12 is subjected to an etching process.
その間、電極６は電極冷却手段を構成している冷却水導
入路８、冷却水室？および冷却水導出路１０に循環され
る冷却水で冷却され、電極６が冷却されるに伴い、電極
６から半導体ウェハ１２に伝熱される。During this time, the electrode 6 is connected to the cooling water introduction channel 8 and the cooling water chamber, which constitute the electrode cooling means. The electrode 6 is cooled by the cooling water that is circulated through the cooling water outlet path 10, and as the electrode 6 is cooled, heat is transferred from the electrode 6 to the semiconductor wafer 12.
一方、半導体ウェハ冷却手段としてのバイブ１１を通じ
て冷媒ガスが供給され、この冷媒ガスにより半導体ウェ
ハ１２が直接冷却される。そして、半導体ウェハ１２の
外縁部を前記半導体ウェハ押え本体１３により押えてい
るので、電極６と半導体ウェハ１２の外縁部からの冷媒
ガスの漏洩が防止される。On the other hand, refrigerant gas is supplied through the vibrator 11 as a semiconductor wafer cooling means, and the semiconductor wafer 12 is directly cooled by this refrigerant gas. Since the outer edge of the semiconductor wafer 12 is held down by the semiconductor wafer holding body 13, leakage of refrigerant gas from the outer edge of the electrode 6 and the semiconductor wafer 12 is prevented.
前記エツチング処理の終了後、電極６を、処理された半
導体ウェハ１２を載置した状態で下降させる。After the etching process is completed, the electrode 6 is lowered with the processed semiconductor wafer 12 placed thereon.
その際、半導体ウェハの離脱手段としての板ばね２１が
働き、緩衝材１５の下面にエツチングによる重合物が付
着し、緩衝材１５にエツチング処理された半導体ウェハ
１２が貼り付いて離れないような場合でも、緩衝材１５
からエツチング処理された半導体ウェハ１２を確実に引
き離すことができる。At this time, the leaf spring 21 acts as a means for removing the semiconductor wafer, and if a polymer due to etching adheres to the lower surface of the buffer material 15 and the etched semiconductor wafer 12 sticks to the buffer material 15 and cannot be separated. However, the buffer material 15
The etched semiconductor wafer 12 can be reliably separated from the etching process.
前記電極６を、エツチング処理された半導体ウェハ１２
を載置したまま、処理室１から引き出し、電極６からエ
ツチング処理された半導体ウェハ１２を取り出してエツ
チング処理の１サイクルを終了する。The electrode 6 is attached to an etched semiconductor wafer 12.
The semiconductor wafer 12 placed thereon is pulled out from the processing chamber 1, and the etched semiconductor wafer 12 is taken out from the electrode 6, thereby completing one cycle of the etching process.
前記実施例の半導体ウェハ押え機構によれば次の効果が
ある。The semiconductor wafer holding mechanism of the embodiment described above has the following effects.
（１） 半導体ウェハ押え機構を半導体ウェハ押え本
体１３と、これを支持する板ばね１９とを有して構成し
、前記半導体ウェハ押え本体１３を半導体ウェハ押えプ
レート１４と緩衝材１５とで構成し、半導体ウェハ押え
プレート１４をセラミックスや石英などの耐食性、耐熱
性に優れた電気絶縁材料の薄板で形成し、前記緩衝材１
５を前記半導体ウェハ押えプレート１４０半導体ウェハ
押え面側に配し、この緩衝材１５の半導体ウェハ押え面
側に板ばね１９を配してこれらの部材を結合し、しかも
緩衝材１５と半導体ウェハ押えプレート１４とで半導体
ウェハ１２の外縁部を押えるようにしているので、処理
室１内において電極６上に載置された半導体ウェハ１２
を押えた状態で、半導体ウェハ押えプレート１４、緩衝
材１５および板ばね１９との結合体がプラズマ側にわず
かしか突出しないため、電極３．６間に形成されるプラ
ズマ状態に大きな乱れを生じさせることがなく、したが
って半導体ウェハ１２にエツチング処理を均−忙施すこ
とができる。(1) The semiconductor wafer holding mechanism is composed of a semiconductor wafer holding main body 13 and a leaf spring 19 that supports this, and the semiconductor wafer holding main body 13 is composed of a semiconductor wafer holding plate 14 and a cushioning material 15. , the semiconductor wafer holding plate 14 is formed of a thin plate of an electrically insulating material with excellent corrosion resistance and heat resistance, such as ceramics or quartz, and the buffer material 1
5 is placed on the semiconductor wafer holding surface side of the semiconductor wafer holding plate 140, and a leaf spring 19 is placed on the semiconductor wafer holding side of the cushioning material 15 to connect these members. Since the outer edge of the semiconductor wafer 12 is held down by the plate 14, the semiconductor wafer 12 placed on the electrode 6 in the processing chamber 1 is
When pressed, the combined body of the semiconductor wafer holding plate 14, the buffer material 15, and the leaf spring 19 protrudes only slightly toward the plasma side, which causes a large disturbance in the plasma state formed between the electrodes 3.6. Therefore, the etching process can be uniformly performed on the semiconductor wafer 12.
（２） 半導体ウェハ１２に緩衝材１５を当接させて
押えるようにしているので、半導体ウェハ１２を押える
際の衝撃力を緩和でき、さらに板ばね１９により半導体
ウェハ１２Ｖｃ加える押圧力を零から漸次直線的に増加
させることができるので、半導体ウェハ１２に作用する
衝撃力を小さくなし得るばかりでなく、半導体ウェハ押
えプレート１４を脆弱材料で形成した場合の、半導体ウ
ェハ押えプレート１４の機械的寿命を長くすることがで
きる。(2) Since the cushioning material 15 is brought into contact with the semiconductor wafer 12 and pressed, the impact force when pressing the semiconductor wafer 12 can be alleviated, and the leaf spring 19 gradually reduces the pressing force applied to the semiconductor wafer 12Vc from zero. Since it can be increased linearly, not only can the impact force acting on the semiconductor wafer 12 be reduced, but also the mechanical life of the semiconductor wafer holding plate 14 can be shortened when the semiconductor wafer holding plate 14 is made of a brittle material. It can be made longer.
（３）半導体ウェハ押え本体１３の支持にリング状の板
ばね１９を採用し、この板ばね１９を複数本の取り付は
ボルト１８により半導体ウェハ押え本体１３に結合する
一方、複数本の他の取り付はポルト２０により処理室１
の電極導入口２の周縁部に結合しているので、板はね１
９の上下動に対する横方向、つまり押えるべき半導体ウ
ェハ１２の直径方向の剛性を大きくできるため、半導体
ウェハ押え本体１３の押え代の横ずれを小さくすること
ができ、したがって半導体ウェハ押え本体１３からプラ
ズマに開口する半導体ウェハ１２のエツチング領域の再
現性を向上させることができ、量産処理において均一な
製品を得ることができる。(3) A ring-shaped leaf spring 19 is adopted to support the semiconductor wafer holding body 13, and when attaching a plurality of these leaf springs 19, they are connected to the semiconductor wafer holding body 13 with bolts 18, while other Installation is done in processing chamber 1 by Porto 20.
Since the plate is connected to the periphery of the electrode inlet 2, the plate spring 1
Since it is possible to increase the rigidity in the lateral direction against the vertical movement of the semiconductor wafer 9, that is, in the diametrical direction of the semiconductor wafer 12 to be held, it is possible to reduce the lateral deviation of the holding margin of the semiconductor wafer holding main body 13, and therefore, the plasma from the semiconductor wafer holding main body 13 can be increased. The reproducibility of the etched area of the semiconductor wafer 12 to be opened can be improved, and uniform products can be obtained in mass production.
（４） エツチング処理後、電極６を下降させる際エ
ツチング処理された半導体ウェハの離脱手段としての板
ばね２１により、エツチング処理された半導体ウェハ１
２を半導体ウェハ押え本体１３から積極的に引き離すよ
うにしているのでエツチング処理中に緩衝材１５の下面
にエツチングによる重合物が付着し、これＫよりエツチ
ング処理された半導体ウェハ１２が貼り、付き、緩衝材
１５から離れないような状態になっても板ばね２１の働
きにより、エツチング処理された半導体ウェハ１２を緩
衝材１５から確実に引き離して電極６上忙載置させるこ
とができる。(4) After the etching process, when the electrode 6 is lowered, the etched semiconductor wafer 1 is removed by the leaf spring 21 as a means for removing the etched semiconductor wafer.
2 is actively pulled away from the semiconductor wafer holding body 13, so that during the etching process, a polymer due to etching adheres to the lower surface of the buffer material 15, and the etched semiconductor wafer 12 sticks to and adheres to it. Even if the semiconductor wafer 12 cannot be separated from the buffer material 15, the action of the leaf spring 21 makes it possible to reliably separate the etched semiconductor wafer 12 from the buffer material 15 and place it on the electrode 6.
（５） 電極６の処理室１内への上昇動作を利用して
半導体ウェハ押え本体１３と板ばね１９とを働かせ、電
極６上に載置された半導体ウェハ１２を自動的に押える
ことができる。(5) The semiconductor wafer holding main body 13 and the leaf spring 19 are activated by utilizing the rising movement of the electrode 6 into the processing chamber 1, so that the semiconductor wafer 12 placed on the electrode 6 can be automatically held down. .
次に、第５図および第６図は本発明の他の実施例を示す
もので、この実施例のものは前記第１図〜第４図に示す
実施例とは半導体ウェハ押え本体支持用の板ばねの形状
が異なっている。Next, FIG. 5 and FIG. 6 show another embodiment of the present invention, and this embodiment is different from the embodiment shown in FIGS. 1 to 4 described above. The shape of the leaf spring is different.
すなわち、この実施例ではリング状の板ばねに代えて、
短冊型の板ばね２３が半導体ウェハ押え本体１３の下方
において円周方向に間隔をおいて複数個配置されている
。That is, in this embodiment, instead of a ring-shaped leaf spring,
A plurality of strip-shaped leaf springs 23 are arranged below the semiconductor wafer holding main body 13 at intervals in the circumferential direction.
そして、各板ばね２３の一方の端部は取り付はポル）２
４により半導体ウェハ押え本体１３＆Ｃ結合され、他方
の端部は他の取り付はポル）２５により処理室１の電極
導入口２０周縁部に結合されている。One end of each leaf spring 23 is attached to the
4 is connected to the semiconductor wafer holding body 13&C, and the other end is connected to the periphery of the electrode inlet 20 of the processing chamber 1 by means of 25.
この第５図および第６図忙示す実施例の他の構成につい
ては、前記第１図〜第４図に示す実施例と同一であり、
板はね２３の形状が単純でしかも取り付けやすい外は、
作用、効果についても前記第１図〜第４図に示す実施例
と同様である。The other configurations of the embodiment shown in FIGS. 5 and 6 are the same as the embodiment shown in FIGS. 1 to 4,
The shape of the plate spring 23 is simple and easy to install.
The functions and effects are also similar to those of the embodiments shown in FIGS. 1 to 4.
以上説明した本発明の１番目の発明によれば耐食性、耐
熱性を有する電気絶縁材料で薄板状に形成され、かつ前
記電極上に載置された半導体ウェハの外縁部を押える半
導体ウェハ押え本体と、この半導体ウェハ押え本体を弾
発的に支持する板ばねとにより構成しており、全体を薄
板状に形成できるため、電極上に載置された半導体ウェ
ハからプラズマ側へわずかしか突出しないので、電極間
に形成されるプラズマ状態の乱れを小さく抑制でき、し
たがって半導体ウェハを均一にエツチング処理し得る効
果があり、半導体ウェハ押え本体を板ばねにより支持し
、前記半導体弁え本体を弾発的に作用させるようにして
いるので、半導体ウェハを載置する電極と、他の電極を
設置した処理室とを相対的に移動させて行う量産型のド
ライエツチング装置の移動部材を利用して半導体ウェハ
を電極に自動的忙密着させ得る効果があり、板ばねな介
して半導体ウェハ押え本体により半導体ウェハを電極忙
密着させるようにしているので、電極から半導体ウェハ
への伝熱性能を向上させ得る効果があり、構造が簡潔な
るため、メンテナンスを容易に行い得る効果もある。According to the first aspect of the present invention described above, a semiconductor wafer holding body is formed in a thin plate shape from an electrically insulating material having corrosion resistance and heat resistance, and presses the outer edge of the semiconductor wafer placed on the electrode. This semiconductor wafer holding main body is composed of a leaf spring that elastically supports it, and since the whole can be formed into a thin plate shape, only a small amount protrudes from the semiconductor wafer placed on the electrode toward the plasma side. Disturbances in the plasma state formed between the electrodes can be suppressed to a small extent, which has the effect of uniformly etching the semiconductor wafer. Therefore, the semiconductor wafer can be removed by using a moving member of a mass-produced dry etching device that relatively moves the electrode on which the semiconductor wafer is placed and the processing chamber in which other electrodes are installed. It has the effect of automatically bringing the semiconductor wafer into close contact with the electrode, and since the semiconductor wafer holding body brings the semiconductor wafer into close contact with the electrode through the plate spring, it has the effect of improving heat transfer performance from the electrode to the semiconductor wafer. Since the structure is simple, maintenance can be easily performed.
また、本発明の２番目の発明によれば、半導体ウェハ押
え本体からエツチング処理された半導体ウェハな離脱さ
せる離脱手段を設けているので、半導体ウェハ押え本体
にエツチングによる重合体が付着し、半導体ウェハ押え
本体にエツチング処理された半導体ウェハが貼り付くよ
うな場合にも、その半導体ウェハを確実に引き離し得る
格別な効果がある。Further, according to the second aspect of the present invention, since the detaching means for detaching the etched semiconductor wafer from the semiconductor wafer holding body is provided, the etched polymer adheres to the semiconductor wafer holding body, and the semiconductor wafer is removed from the semiconductor wafer holding body. Even when an etched semiconductor wafer sticks to the presser body, it has a special effect of being able to reliably separate the semiconductor wafer.
第１図〜第４図は平行平板型ドライエツチング装置に適
用した本発明の一実施例を示すもので、その第１図は処
理すべき半導体ウェハを載置した電極を処理室内に導入
する直前の各部材の配置状態を示す縦断正面図、第２図
はエツチング処理時の各部材の配置状態を示す縦断正面
図、第３図は第１図の■−■線横断平面図、第４図は第
３図の■−■線切断拡大断面図、第５図および第６図は
本発明の他の実施例を示すもので、その第５図は横断平
面図、第６図は第５図のＭ−Ｖｌ線断面図である。
１・・・・・・・・・・・・処理室
２・・・・・−・・・・・電極導入口
５．６・・・・・・・・・電極
１２・・・・・・・・・半導体ウェハ
１３・・・・・・・・・半導体ウェハ押え本体１４・・
−・・・・・半導体ウェハ押えプレート１５・・・・・
・・・・緩衝材
１８・・・・・−・・緩衝材と板ばねとを共線めする取
り付はボルト
１９・・・・・−・・半導体ウェハ押え本体支持用の板
ばね２０・・・・・−・・板ばねと電極導入口の周縁部
とを結合する取り付はボルト
２１・・・・・−・・処理された半導体ウェハの離脱手
段としての板はね
２２・・・・・〜・・板ばねの取り付は用ピン２３・・
・・・・・・・半導体ウェハ押え本体支持用の板ばね
２４・・・・・−・・板ばねと半導体ウェハ押え本体と
の取り付はボルト
２５・・・・・・・・・板ばねと電極導入口の周縁部と
を結合する取り付はボルトFigures 1 to 4 show an embodiment of the present invention applied to a parallel plate type dry etching apparatus. Fig. 2 is a vertical sectional front view showing the arrangement of each member during etching processing, Fig. 3 is a cross-sectional plan view taken along the line ■-■ of Fig. 1, and Fig. 4 is a longitudinal sectional front view showing the arrangement of each member. is an enlarged sectional view taken along the line ■-■ in FIG. 3, and FIGS. 5 and 6 show other embodiments of the present invention, of which FIG. It is a sectional view taken along the line M-Vl. 1......Processing chamber 2...-- Electrode inlet 5.6... Electrode 12... ... Semiconductor wafer 13 ... Semiconductor wafer holding body 14 ...
-... Semiconductor wafer holding plate 15...
...Buffer material 18... Bolts 19 are used to attach the buffer material and the leaf spring so that they are collinear. ...Flat spring 20 for supporting the semiconductor wafer holding body. .....A bolt 21 is used to connect the leaf spring and the peripheral edge of the electrode introduction port.A leaf spring 22 is used as a means for removing the processed semiconductor wafer. ......Pin 23 for mounting the leaf spring...
・・・・・・Plate spring 24 for supporting the semiconductor wafer holder main body ・・・・・・・・・Bolt 25 is used to attach the plate spring to the semiconductor wafer holder main body ・・・・・・Flat spring and the peripheral edge of the electrode inlet are attached using bolts.
Claims (1)
を、前記電極上に密着させるドライエッチング装置の半
導体ウェハ機構において耐食性、耐熱性を有する電気絶
縁材料で薄板状に形成され、かつ前記電極上に載置され
た半導体ウェハの外縁部を押える半導体ウェハ押え本体
と、この半導体ウェハ押え本体を弾発的に支持する板ば
ねとにより構成したことを特徴とするドライエッチング
装置の半導体ウェハ押え機構。 ２、特許請求の範囲第１項において、前記半導体ウェハ
押え本体を、半導体ウェハ押えプレートと、これの半導
体ウェハ押え面側に取り付けられた緩衝材とで構成した
ことを特徴とするドライエッチング装置の半導体ウェハ
押え機構。 ３、冷却機能を有する電極上に載置された半導体ウェハ
を、前記電極上に密着させるドライエッチング装置の半
導体ウェハ押え機構において、耐食性、耐熱性を有する
電気絶縁材料で薄板状に形成され、かつ前記電極上に載
置された半導体ウェハの外縁部を押える半導体ウェハ押
え本体と、この半導体ウェハ押え本体を弾発的に支持す
る板ばねと、前記半導体ウェハ押え本体から半導体ウェ
ハを離脱させる離脱手段とにより構成したことを特徴と
するドライエッチング装置の半導体ウェハ押え機構。 ４、特許請求の範囲第３項において、前記半導体ウェハ
押え本体を、半導体ウェハ押えプレートと、これの半導
体ウェハ押え面側に取り付けられた緩衛材とで構成した
ことを特徴とするドライエッチング装置の半導体ウェハ
押え機構。 ５、特許請求の範囲第３項において、前記離脱手段を、
電極側に半導体ウェハを押すばねで構成したことを特徴
とするドライエッチング装置の半導体ウェハ押え機構。[Claims] 1. A semiconductor wafer placed on an electrode having a cooling function is formed into a thin plate using an electrically insulating material having corrosion resistance and heat resistance in a semiconductor wafer mechanism of a dry etching apparatus that brings the semiconductor wafer into close contact with the electrode. Dry etching characterized by comprising a semiconductor wafer holding body that presses the outer edge of the semiconductor wafer formed and placed on the electrode, and a leaf spring that resiliently supports the semiconductor wafer holding body. Device's semiconductor wafer holding mechanism. 2. A dry etching apparatus according to claim 1, characterized in that the semiconductor wafer holding main body is composed of a semiconductor wafer holding plate and a cushioning material attached to the semiconductor wafer holding surface side of the semiconductor wafer holding plate. Semiconductor wafer holding mechanism. 3. In a semiconductor wafer holding mechanism of a dry etching apparatus that brings a semiconductor wafer placed on an electrode having a cooling function into close contact with the electrode, the semiconductor wafer is formed into a thin plate shape from an electrically insulating material having corrosion resistance and heat resistance, and A semiconductor wafer presser body that presses the outer edge of the semiconductor wafer placed on the electrode, a leaf spring that elastically supports the semiconductor wafer presser body, and a release means that detaches the semiconductor wafer from the semiconductor wafer presser body. A semiconductor wafer holding mechanism for a dry etching apparatus, characterized by comprising: 4. The dry etching apparatus according to claim 3, wherein the semiconductor wafer holding main body is composed of a semiconductor wafer holding plate and a guarding material attached to the semiconductor wafer holding surface side of the semiconductor wafer holding plate. semiconductor wafer holding mechanism. 5. In claim 3, the detachment means:
A semiconductor wafer holding mechanism for a dry etching apparatus characterized by comprising a spring that presses a semiconductor wafer toward an electrode side.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5227185A JPH0666300B2 (en) | 1985-03-18 | 1985-03-18 | Dry etching equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5227185A JPH0666300B2 (en) | 1985-03-18 | 1985-03-18 | Dry etching equipment |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61212023A true JPS61212023A (en) | 1986-09-20 |
| JPH0666300B2 JPH0666300B2 (en) | 1994-08-24 |
Family
ID=12910111
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5227185A Expired - Fee Related JPH0666300B2 (en) | 1985-03-18 | 1985-03-18 | Dry etching equipment |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0666300B2 (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63170468U (en) * | 1987-04-28 | 1988-11-07 | ||
| JPS63283024A (en) * | 1986-12-19 | 1988-11-18 | アプライド マテリアルズ インコーポレーテッド | Magnetic field accelerated plasma etching reactor |
| JPH0215623A (en) * | 1988-04-25 | 1990-01-19 | Applied Materials Inc | Magnetic field enhancing plasma etching reactor |
| US4931135A (en) * | 1987-12-25 | 1990-06-05 | Tokyo Electron Limited | Etching method and etching apparatus |
| JPH02148837A (en) * | 1988-05-23 | 1990-06-07 | Lam Res Corp | Device and method of clamping semiconductor wafer |
| JPH02268427A (en) * | 1989-04-11 | 1990-11-02 | Tokyo Electron Ltd | Plasma processor |
| WO2015137364A1 (en) * | 2014-03-14 | 2015-09-17 | 独立行政法人産業技術総合研究所 | Plasma processing device |
-
1985
- 1985-03-18 JP JP5227185A patent/JPH0666300B2/en not_active Expired - Fee Related
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63283024A (en) * | 1986-12-19 | 1988-11-18 | アプライド マテリアルズ インコーポレーテッド | Magnetic field accelerated plasma etching reactor |
| JPS63170468U (en) * | 1987-04-28 | 1988-11-07 | ||
| US4931135A (en) * | 1987-12-25 | 1990-06-05 | Tokyo Electron Limited | Etching method and etching apparatus |
| JPH0215623A (en) * | 1988-04-25 | 1990-01-19 | Applied Materials Inc | Magnetic field enhancing plasma etching reactor |
| JPH02148837A (en) * | 1988-05-23 | 1990-06-07 | Lam Res Corp | Device and method of clamping semiconductor wafer |
| JPH02268427A (en) * | 1989-04-11 | 1990-11-02 | Tokyo Electron Ltd | Plasma processor |
| WO2015137364A1 (en) * | 2014-03-14 | 2015-09-17 | 独立行政法人産業技術総合研究所 | Plasma processing device |
| JPWO2015137364A1 (en) * | 2014-03-14 | 2017-04-06 | 国立研究開発法人産業技術総合研究所 | Plasma processing equipment |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0666300B2 (en) | 1994-08-24 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |