JPS6121145U - Erroneous transmission cutoff circuit - Google Patents

Erroneous transmission cutoff circuit

Info

Publication number
JPS6121145U
JPS6121145U JP1984104293U JP10429384U JPS6121145U JP S6121145 U JPS6121145 U JP S6121145U JP 1984104293 U JP1984104293 U JP 1984104293U JP 10429384 U JP10429384 U JP 10429384U JP S6121145 U JPS6121145 U JP S6121145U
Authority
JP
Japan
Prior art keywords
transmitter
circuit
signal
transmission
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1984104293U
Other languages
Japanese (ja)
Other versions
JPH0413859Y2 (en
Inventor
重男 吉原
芳久 工藤
Original Assignee
日本電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気株式会社 filed Critical 日本電気株式会社
Priority to JP1984104293U priority Critical patent/JPS6121145U/en
Publication of JPS6121145U publication Critical patent/JPS6121145U/en
Application granted granted Critical
Publication of JPH0413859Y2 publication Critical patent/JPH0413859Y2/ja
Granted legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案による誤送信遮断回路の実施例を示す回
路図である。 1・・・アンテナ、2・・・送信機、3・・・送信出力
検出器、4・・・送信オン端子、5・・・スイツチング
トランジスタ、6・司D ROM,7〜19・・・論理
ゲートの入出力、20.21・・・放電用ダイオード、
22・・・プレススイッチ、23・・・CPU,24〜
27・・・ノア回路、28,29・・・インバータ。
FIG. 1 is a circuit diagram showing an embodiment of the erroneous transmission cutoff circuit according to the present invention. DESCRIPTION OF SYMBOLS 1... Antenna, 2... Transmitter, 3... Transmission output detector, 4... Transmission ON terminal, 5... Switching transistor, 6... Main D ROM, 7-19... Logic gate input/output, 20.21... discharge diode,
22...Press switch, 23...CPU, 24~
27...NOR circuit, 28, 29...Inverter.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] マイクロコンピュータによりプレススイッチのオンオフ
動作を検出して送信機の送信、受信を制御腰誤送信のと
きはこれを停止させる、無線機の誤送信遮断回路におい
て、送信機の送信出力の検出信号とプレススイッチのオ
ンオフ信号を整合するための整合回路と、前記整合回路
より前記プレススイッチのオフ信号に対応する信号が出
力されており、かつ前記送信機の送信検出信号を受けた
とき送信機をオフするための信号を出力するノア回路よ
りなる検出回路と、前記検出回路より送信機をオフする
ための信号を受けたとき、その信号を一定時間遅延させ
るためのC, Rよりなる時定数回路と、前記時定数回
路出力を入力とする2個のノア回路よりなるチャツタリ
ング防止のためのフリツプフロツプ回路と、前記プレス
スイッチのオンオフ動作によって出力されるマイクロヨ
ンピュータからの送信機オンオフ信号を出力させ、前記
フリツプフロツプ回路より送信機をオフするための信号
を受けたとき、前記マイクロコンピュータから送信機オ
ン信号を受けている状態でもそのオフ信号を出力する1
個のノア回路と、前記1個のノア回路出力により送信機
の送信制御を行なうトランジスタとから構成した誤送信
遮断回路。
A microcomputer detects the on/off operation of the press switch and controls the transmitter's transmission and reception.In the wireless equipment's erroneous transmission cutoff circuit, which stops the transmitter in the event of an erroneous transmission, the transmitter's transmission output detection signal and the press are used. a matching circuit for matching on/off signals of the switches; and the matching circuit outputs a signal corresponding to the off signal of the press switch, and turns off the transmitter when receiving a transmission detection signal of the transmitter. a detection circuit made of a NOR circuit that outputs a signal for turning off the transmitter, and a time constant circuit made of C and R for delaying the signal for a certain period of time when receiving a signal to turn off the transmitter from the detection circuit; A flip-flop circuit for preventing chattering consisting of two NOR circuits which input the output of the time constant circuit; When a signal to turn off the transmitter is received from the circuit, the off signal is output even when the transmitter on signal is received from the microcomputer.
An erroneous transmission cutoff circuit comprising: NOR circuits; and a transistor for controlling transmission of a transmitter based on the output of the NOR circuit.
JP1984104293U 1984-07-10 1984-07-10 Erroneous transmission cutoff circuit Granted JPS6121145U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1984104293U JPS6121145U (en) 1984-07-10 1984-07-10 Erroneous transmission cutoff circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1984104293U JPS6121145U (en) 1984-07-10 1984-07-10 Erroneous transmission cutoff circuit

Publications (2)

Publication Number Publication Date
JPS6121145U true JPS6121145U (en) 1986-02-07
JPH0413859Y2 JPH0413859Y2 (en) 1992-03-30

Family

ID=30663645

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1984104293U Granted JPS6121145U (en) 1984-07-10 1984-07-10 Erroneous transmission cutoff circuit

Country Status (1)

Country Link
JP (1) JPS6121145U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5933349U (en) * 1982-08-24 1984-03-01 株式会社東芝 Abnormal transmission reset circuit for mobile radio equipment

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1491031A (en) * 1974-10-18 1977-11-09 Molins Ltd Reservoirs for cigarettes and other similar rod-like articles

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5933349U (en) * 1982-08-24 1984-03-01 株式会社東芝 Abnormal transmission reset circuit for mobile radio equipment

Also Published As

Publication number Publication date
JPH0413859Y2 (en) 1992-03-30

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