JPS593643U - computer control tuner - Google Patents

computer control tuner

Info

Publication number
JPS593643U
JPS593643U JP9783582U JP9783582U JPS593643U JP S593643 U JPS593643 U JP S593643U JP 9783582 U JP9783582 U JP 9783582U JP 9783582 U JP9783582 U JP 9783582U JP S593643 U JPS593643 U JP S593643U
Authority
JP
Japan
Prior art keywords
computer
broadcast radio
radio signal
computer control
outputs
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9783582U
Other languages
Japanese (ja)
Inventor
町田 憲雄
Original Assignee
日本電気ホームエレクトロニクス株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気ホームエレクトロニクス株式会社 filed Critical 日本電気ホームエレクトロニクス株式会社
Priority to JP9783582U priority Critical patent/JPS593643U/en
Publication of JPS593643U publication Critical patent/JPS593643U/en
Pending legal-status Critical Current

Links

Landscapes

  • Control Of Amplification And Gain Control (AREA)
  • Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来のチューナのフロント・エンドを構成する
機器のブロック回路図、第2図は本考案の実施例による
コンピュータ制御チューナのブロック回路図である。 なお図面に記載の記号は下記のものを示す。1・・・・
・・アンテナ、2・・・・・・高周波増幅器、3・・・
・・・局部発振器、4・・・・・・周波数混合器、6・
・・・・・フロント・エンド、8・・・・・・コンピュ
ータ、9・・・・・・自動入力レベル制御回路、12・
・・・・・検出回路。
FIG. 1 is a block circuit diagram of equipment constituting the front end of a conventional tuner, and FIG. 2 is a block circuit diagram of a computer-controlled tuner according to an embodiment of the present invention. The symbols shown in the drawings indicate the following. 1...
...Antenna, 2...High frequency amplifier, 3...
... Local oscillator, 4 ... Frequency mixer, 6.
. . . Front end, 8 . . . Computer, 9 . . . Automatic input level control circuit, 12.
...Detection circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 受信した放送電波信号を中間周波数に変換して出力する
フロント・エンドにおいて、フロント・エンドの中の高
周波増幅器の信号路より取り出された放送電波信号を検
出する検出回路と、この検出回路の出力と記憶されたデ
ータとを比較判断して制御信号を出力するコンピュータ
と、このコンピュータの出力により前記高周波増幅器に
入力される放送電波信号が最良の入力レベルとなるよう
に制御される自動入力レベル制御回路とより構成される
ことを特徴とするコンピュータ制御チューナ。
In the front end that converts the received broadcast radio signal to an intermediate frequency and outputs it, there is a detection circuit that detects the broadcast radio signal taken out from the signal path of the high frequency amplifier in the front end, and an output of this detection circuit. A computer that compares and judges stored data and outputs a control signal, and an automatic input level control circuit that controls the broadcast radio signal input to the high frequency amplifier to have the best input level based on the output of this computer. A computer-controlled tuner comprising:
JP9783582U 1982-06-29 1982-06-29 computer control tuner Pending JPS593643U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9783582U JPS593643U (en) 1982-06-29 1982-06-29 computer control tuner

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9783582U JPS593643U (en) 1982-06-29 1982-06-29 computer control tuner

Publications (1)

Publication Number Publication Date
JPS593643U true JPS593643U (en) 1984-01-11

Family

ID=30232545

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9783582U Pending JPS593643U (en) 1982-06-29 1982-06-29 computer control tuner

Country Status (1)

Country Link
JP (1) JPS593643U (en)

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