JPS61210693A - Thick film hybrid integrated circuit board - Google Patents

Thick film hybrid integrated circuit board

Info

Publication number
JPS61210693A
JPS61210693A JP5205685A JP5205685A JPS61210693A JP S61210693 A JPS61210693 A JP S61210693A JP 5205685 A JP5205685 A JP 5205685A JP 5205685 A JP5205685 A JP 5205685A JP S61210693 A JPS61210693 A JP S61210693A
Authority
JP
Japan
Prior art keywords
circuit board
integrated circuit
hybrid integrated
thick film
film hybrid
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5205685A
Other languages
Japanese (ja)
Inventor
昌己 木下
大岩 隆夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Japan Radio Co Ltd
Original Assignee
Japan Radio Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Japan Radio Co Ltd filed Critical Japan Radio Co Ltd
Priority to JP5205685A priority Critical patent/JPS61210693A/en
Publication of JPS61210693A publication Critical patent/JPS61210693A/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、基板上の金属化処理された層と部品保持部材
とが半田接合されている厚膜混成集積回路板に関するも
のである。
DETAILED DESCRIPTION OF THE INVENTION [Industrial Application] The present invention relates to a thick film hybrid integrated circuit board in which a metallized layer on a substrate and a component holding member are soldered together.

〔従来の技術〕[Conventional technology]

厚膜混成集積回路板は、例えばセラミックの絶縁基板に
Ag−Pdなどの金属を焼付けて金属化処理した層で回
路をつくり、その層と回路部品を保持する部材である金
属の脚とを半田で接合し、回路板に部品を取付けている
Thick-film hybrid integrated circuit boards are made by creating a circuit with a layer of metal such as Ag-Pd baked onto a ceramic insulating substrate, and then soldering that layer to metal legs that hold circuit components. and then attach the parts to the circuit board.

′従来、この種の厚膜混成集積回路板で回路部品を正確
な位置に取付けるためには、基板に孔を開けそこに部品
の脚を嵌合挿入してから半田付けする方法がある。この
方法は、孔径の精度を部品の同径の精度に合せなければ
ならなかったり、挿入の手間が掛ったりするという欠点
がある。治具で回路部品を位置決めしながら半田付けを
する方法もある。この方法は精度が高く複雑な形状の治
具を必要とするという不便がある。
' Conventionally, in order to mount circuit components in accurate positions on this type of thick film hybrid integrated circuit board, there has been a method of drilling holes in the board, fitting and inserting the legs of the components into the holes, and then soldering them. This method has disadvantages in that the accuracy of the hole diameter must be matched to the accuracy of the same diameter of the component, and that it takes time and effort for insertion. Another method is to use a jig to position the circuit components while soldering. This method has the inconvenience of requiring a jig with high precision and a complicated shape.

また簡易な方法としてセルフアライメント方法というも
のがある。第2図にはこの方法により製゛造した厚膜混
成集積回路板の要部拡大断面図が示しである。同図で基
板l上の金属化処理した層2に回路部品(不図示)の脚
3を半田4で付けしである。この方法は半田4が溶融し
ているとき、固体(金属化処理層2および脚3)と液体
(溶融半田)とのぬれ現象による付着力で部品の脚3を
吸引し、部品を基板lの所定の位置に取付けるものであ
る。しかしこのセルフアライメント方法は、半田クリー
ムを印刷したときの印刷精度が悪い場合に、部品が正確
な位置に取付けられなくなってしまう。特に半田クリー
ムの印刷塗布厚が不均一になった場合には第2図に示す
ように脚3が傾いて固定され、回路部品も傾いてしまう
ことになる。また金属化処理層2の中央から外れた位置
に固定されてしまうという欠点がある。
Another simple method is a self-alignment method. FIG. 2 shows an enlarged sectional view of the main parts of a thick film hybrid integrated circuit board manufactured by this method. In the figure, legs 3 of circuit components (not shown) are attached with solder 4 to a metallized layer 2 on a substrate 1. In this method, when the solder 4 is melted, the legs 3 of the component are attracted by the adhesion force due to the wetting phenomenon between the solid (metallized layer 2 and legs 3) and the liquid (molten solder), and the component is attached to the substrate l. It is installed in a predetermined position. However, with this self-alignment method, if the printing accuracy when printing the solder cream is poor, the parts may not be installed in the correct position. In particular, if the printing thickness of the solder cream becomes uneven, the legs 3 will be fixed at an angle as shown in FIG. 2, and the circuit components will also be at an angle. Further, there is a drawback that the metallized layer 2 is fixed at a position off the center thereof.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

本発明は、従来の厚膜混成集積回路板の上記欠点を解消
するもので、精度が高く複雑な形状の治具を使うことな
く、しかも簡易な製造工程で、精度良く部品が固定され
ている厚膜混成集積回路板を提供しようとするものであ
る。
The present invention solves the above-mentioned drawbacks of conventional thick-film hybrid integrated circuit boards, and allows parts to be fixed with high precision through a simple manufacturing process without using jigs with high precision and complex shapes. It is an object of the present invention to provide a thick film hybrid integrated circuit board.

〔問題点を解決するための手段〕[Means for solving problems]

本発明を適用する厚膜混成集積回路板の構成を、実施例
に対応する第1図を参照しながら説明する。
The structure of a thick film hybrid integrated circuit board to which the present invention is applied will be explained with reference to FIG. 1, which corresponds to an embodiment.

本発明の厚膜混成集積回路板は、基板lには部品を保持
する部材3が固定される位置に、細孔5が開けられてい
る。細孔5の内周全体に渡り少なくとも基板の厚さ方向
の一部と、細孔5の周辺とが金属化処理された層7にな
っている。モして細孔5に対応した位置にある金属の部
品保持部材3と、金属化処理された層7とが半田3によ
り接合固定されている。
In the thick film hybrid integrated circuit board of the present invention, a pore 5 is formed in the substrate 1 at a position where a member 3 for holding a component is fixed. At least a portion of the entire inner periphery of the pore 5 in the thickness direction of the substrate and the periphery of the pore 5 is a metallized layer 7 . A metal component holding member 3 located at a position corresponding to the pore 5 and a metallized layer 7 are bonded and fixed by solder 3.

〔作用〕[Effect]

上記のごとく本発明の厚膜混成集積回路板は、基板lの
細孔5の周辺と、細孔5の内周全体に渡り金属化処理層
7があるので、金属化処理M7に部品を保持する部材3
を半田付けするとき、溶融半田が細孔5の内周の金属化
処理層7内を毛細管現象(固体と液体とのぬれ現象)に
より浸透して□ゆく。そのとき保持部材3の底辺が溶融
半田の浸透力により均一に吸引される。したがっ゛て第
1図に示すように保持部材3は、細孔5を塞ぐような位
置にくると共に、基板lの面に対し垂直に取付けられる
As described above, the thick film hybrid integrated circuit board of the present invention has the metallized layer 7 around the pore 5 of the substrate 1 and over the entire inner periphery of the pore 5, so that components are held in the metallized layer M7. Part 3
When soldering, the molten solder penetrates into the metallized layer 7 on the inner periphery of the pore 5 by capillary action (wetting phenomenon of solid and liquid). At this time, the bottom side of the holding member 3 is uniformly attracted by the penetrating force of the molten solder. Therefore, as shown in FIG. 1, the holding member 3 is positioned so as to close the pore 5 and is attached perpendicularly to the surface of the substrate l.

〔実施例〕〔Example〕

以下、本発明の実施例を詳細に説明する。 Examples of the present invention will be described in detail below.

第1図は本発明を適用した厚膜混成集積回路板の一実施
例の要部拡大断面図である。
FIG. 1 is an enlarged sectional view of essential parts of an embodiment of a thick film hybrid integrated circuit board to which the present invention is applied.

例えばセラミックの絶縁体を基板1にし、回路部品(不
図示)を取付ける位置には細孔5が開けられている。基
板lには、形成する回路に従いAg−Pdなとの金属と
硝子フリットとをバインダで混合した懸濁液を印刷塗布
してから、焼付ける。
For example, a ceramic insulator is used as the substrate 1, and pores 5 are formed at positions where circuit components (not shown) are to be attached. A suspension of a metal such as Ag--Pd and glass frit mixed with a binder is printed and coated on the substrate 1 according to the circuit to be formed, and then baked.

すると金属化処理した層7で回路がつくられると共に、
細孔5の内周にも金属化処理層7が回込む。回路ができ
た基板1に半田クリームを印刷塗布する。そして、回路
部品を保持する部材である金属の脚3を夫々所定の細孔
5の位置に配置してから昇温する。すると半田が溶融し
て細孔5の内周の金属化処理層7に沿っ、て毛細管現象
により浸透してゆき、脚3の底辺が均一に吸引される。
Then, a circuit is created using the metallized layer 7, and
The metallized layer 7 also extends around the inner periphery of the pore 5 . Solder cream is applied by printing onto the circuit board 1. Then, the metal legs 3, which are members for holding the circuit components, are placed in respective predetermined positions of the pores 5, and then the temperature is raised. Then, the solder melts and permeates along the metallized layer 7 on the inner periphery of the pore 5 by capillary action, and the bottom of the leg 3 is uniformly attracted.

脚3の底辺は細孔5の上部にくると共に、金属化処理層
7の上面と平行になる。脚3は所定の位置(細孔5の位
置)に直立することになる。次いで冷却すると、このま
〜の状態で半田8が固化する。すなわち第1図に示す厚
膜混成集積回路板ができる。
The base of the leg 3 is above the pore 5 and parallel to the top surface of the metallized layer 7. The legs 3 stand upright at a predetermined position (the position of the pore 5). When it is then cooled, the solder 8 solidifies in this state. In other words, a thick film hybrid integrated circuit board as shown in FIG. 1 is produced.

なお上記実施例で細孔5の内周の金属化処理層7の深さ
寸法dは、細孔5の半径寸法と同一程度が最も好ましい
。これより大幅に小さいと(半径の%程度)、溶融半田
の毛細管現象による吸引量が少ないため、脚3が配置さ
れた当初の傾きが修正しきれなくなってしまう。また深
さ寸法dが基板1の厚さ寸法と同一で、金属化処理層7
が細孔5の内周全体に渡り裏面まで設けられていると、
溶融半田に閉ざされた空隙を生じやすい。そのため吸引
量が少なくなってしまい、やはり脚3の傾きが修正しき
れなくなってしまう。
In the above embodiment, the depth d of the metallized layer 7 on the inner periphery of the pore 5 is most preferably approximately the same as the radius of the pore 5. If it is significantly smaller than this (approximately % of the radius), the amount of suction of molten solder due to capillary action will be small, making it impossible to correct the original inclination of the legs 3. Further, the depth dimension d is the same as the thickness dimension of the substrate 1, and the metallized layer 7
is provided over the entire inner circumference of the pore 5 to the back surface,
It is easy to create closed voids in the molten solder. As a result, the amount of suction decreases, and the inclination of the legs 3 cannot be corrected.

〔発明の効果〕 以上説明したように、本発明を適用した厚膜混成集積回
路板は、細孔の毛細管現象による吸引で部品を所定の位
置(細孔を塞ぐ位置)に配置すると共に基板の面に対し
垂直に取付けるものである。したがって、複雑な形状で
精度を要する治具を使うことなく、しかも簡易な製造工
程でありながら、精度良く回路部品を基板に固定しであ
る厚膜混成集積回路板を提供することができる。
[Effects of the Invention] As explained above, the thick film hybrid integrated circuit board to which the present invention is applied can place components in predetermined positions (positions that close the pores) by suction due to the capillary action of the pores, and also It is installed perpendicular to the surface. Therefore, it is possible to provide a thick film hybrid integrated circuit board in which circuit components are fixed to the substrate with high precision, without using jigs that have complicated shapes and require precision, and through a simple manufacturing process.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明を適用した厚膜混成集積回路板の要部拡
大断面図、第2図は従来の厚膜混成集積回路板の同」二
図である。 1 、 基板、   2・7 、  金属化処理層、3
04部品保持部材、 4・81. 半田、5・ ・ 細
孔、 第  / 図 蜀2図
FIG. 1 is an enlarged cross-sectional view of a main part of a thick film hybrid integrated circuit board to which the present invention is applied, and FIG. 2 is a sectional view of a conventional thick film hybrid integrated circuit board. 1. Substrate, 2.7. Metallized layer, 3
04 Parts holding member, 4・81. Solder, 5. Pore, No. 2, Figure 2

Claims (1)

【特許請求の範囲】  基板に設けられた細孔の周辺と、該細孔の内周全体に
渡り少なくとも該基板の厚さ方向の一部とが金属化処理
された層を有し、 該細孔に対応した位置にある金属の部品保持部材と、前
記金属化処理された層とが半田接合されていることを特
徴とする厚膜混成集積回路板。
[Scope of Claims] A metallized layer is provided around a pore provided in a substrate and at least a part of the thickness direction of the substrate over the entire inner periphery of the pore, 1. A thick film hybrid integrated circuit board, characterized in that a metal component holding member located at a position corresponding to the hole and the metallized layer are soldered together.
JP5205685A 1985-03-15 1985-03-15 Thick film hybrid integrated circuit board Pending JPS61210693A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5205685A JPS61210693A (en) 1985-03-15 1985-03-15 Thick film hybrid integrated circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5205685A JPS61210693A (en) 1985-03-15 1985-03-15 Thick film hybrid integrated circuit board

Publications (1)

Publication Number Publication Date
JPS61210693A true JPS61210693A (en) 1986-09-18

Family

ID=12904149

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5205685A Pending JPS61210693A (en) 1985-03-15 1985-03-15 Thick film hybrid integrated circuit board

Country Status (1)

Country Link
JP (1) JPS61210693A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6025168B2 (en) * 1982-10-27 1985-06-17 株式会社荒井鉄工所 automatic separation system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6025168B2 (en) * 1982-10-27 1985-06-17 株式会社荒井鉄工所 automatic separation system

Similar Documents

Publication Publication Date Title
JPS60192304A (en) Chip resistor
JPS61210693A (en) Thick film hybrid integrated circuit board
JPH06112621A (en) Stand-off structure of module
JPS617692A (en) Method of securing conductor pin and printed circuit board secured with conductor pin
JPH0325427Y2 (en)
JPS60201696A (en) Method of soldering flt package
JPS60163496A (en) Printed circuit board
JPS63155689A (en) Method of solder-coating of printed board
JPS59186388A (en) Method of connecting printed board
JPS5992597A (en) Method of soldering electronic part
JP2772190B2 (en) How to attach connection pins
JPS5932112Y2 (en) multilayer capacitor
JPH0747901Y2 (en) Printed wiring board
JPH0115121Y2 (en)
JPS60218900A (en) Printed circuit board
JPH07122846A (en) Soldering method of small surface mounting part
JP2530783Y2 (en) Chip component mounting structure
JPH0650349U (en) Composite semiconductor device
JPH04269894A (en) Soldering method for surface mount component on printed circuit board
JPS61107791A (en) Printed wiring board
JPH066092A (en) Part installation method
JPS5958893A (en) Mounting substrate
JPS6254996A (en) Mounting of electronic component
JPS6140091A (en) Method of mounting electronic part
JPS58131654U (en) Thick film electrode structure