JPS61206018A - Power source circuit - Google Patents

Power source circuit

Info

Publication number
JPS61206018A
JPS61206018A JP60047154A JP4715485A JPS61206018A JP S61206018 A JPS61206018 A JP S61206018A JP 60047154 A JP60047154 A JP 60047154A JP 4715485 A JP4715485 A JP 4715485A JP S61206018 A JPS61206018 A JP S61206018A
Authority
JP
Japan
Prior art keywords
circuit
voltage
output
cpu
turned
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60047154A
Other languages
Japanese (ja)
Inventor
Hisashi Kinoshita
木下 久
Hideki Yoshitake
吉武 秀樹
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP60047154A priority Critical patent/JPS61206018A/en
Publication of JPS61206018A publication Critical patent/JPS61206018A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To obtain an electric power source in which the number of parts is small and the circuit is made simple by turning on and off the electric power source with one push-switch, executing the constant voltage interruption to a CPU without a constant voltage circuit an building in the automatic power off function. CONSTITUTION:When a push switch PS of a push switch circuit 3 is pushed, a transistor Tr2 is turned on, through a constant voltage circuit 4, a constant voltage VD is supplied, a CPU 5 is operated and an output voltage VP1 is VD. The voltage VP1 is compared with a reference voltage at a voltage dropping detecting circuit 7, and when the voltage is lower than the reference voltage, a base electric current holding circuit 6 is turned on, and the base electric current of Tr2 is made to flow. At the circuit 3, an output voltage VPS is the input voltage of an interruption input terminal INT of the CPU 5, the first interruption input is neglected, the switch PS is separated and the circuit 6 is on. Next, when the switch PS is pushed, the CPU 5 stops the action, the circuit 6 is turned off, Tr2 is also turned off and the voltage VD is dropped. Since the reference voltage is set to V3 or above at the circuit 7 in the excessive condition of the dropping, an output voltage Vb is zero, and the circuit 6 is not turned on.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、血圧計や体温計等の電池を電源とし、しかも
マイクロコンピュータを使用した製品の電源回路に関す
るものである。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a power supply circuit for products such as blood pressure monitors and thermometers which are powered by batteries and further employ microcomputers.

従来の技術 消費電力が少い血圧計や体温計の電源として電池が多用
され、信号処理手段としてマイクロコンピュータ(以下
、CPUという)が用いられている。これらに用いられ
る電源回路では、電源投入後長時間使用しない場合や、
電源の切り忘れによる電池寿命の低下を防止するため一
定時間後に自動的に電源をオフするオートパワー第2回
路を内蔵する。
BACKGROUND OF THE INVENTION Batteries are often used as power sources for blood pressure monitors and thermometers, which consume less power, and microcomputers (hereinafter referred to as CPUs) are used as signal processing means. The power supply circuits used in these devices may not be used for a long time after the power is turned on, or
It has a built-in auto power second circuit that automatically turns off the power after a certain period of time to prevent shortening of battery life due to forgetting to turn off the power.

発明が購決し、ようとする問題点 そのためプッシュスイッチ等で電源をオンし、自己保持
回路で電源を供給すると共にオートパワーオフや電源オ
フの制御を容易にするよう電源回路を構成する必要があ
る。
Problems that the invention aims to solve: Therefore, it is necessary to turn on the power with a push switch, etc., supply power with a self-holding circuit, and configure the power supply circuit to facilitate automatic power-off and power-off control. .

またスイッチング回路は電源と定電圧回路の間に接続さ
れるため、部品点数の少い回路で構成するには、容量低
下とともに出力電圧が低下する電源電圧を使用する必要
がある。この時プッシュスイッチ回路の出力電圧をCP
Uの入力信号として、電源をオフするには、定電圧駆動
のCPUに対して定電圧の出力信号を出力する必安があ
る。
Furthermore, since the switching circuit is connected between the power supply and the constant voltage circuit, in order to configure the circuit with a small number of components, it is necessary to use a power supply voltage whose output voltage decreases as the capacity decreases. At this time, the output voltage of the push switch circuit is CP
As an input signal for U, in order to turn off the power, it is necessary to output a constant voltage output signal to a constant voltage driven CPU.

またCPUの出力信号で自己保持回路を解除するには、
CPUの電源となる定電圧回路の出力電圧が瞬時に零に
なるか、または除々に低下する場合は、CPUの制御不
能域の電圧では自己保持回路をオンさせない回路を必要
とし回路構成が複雑になっていた。
Also, to release the self-holding circuit using the CPU output signal,
If the output voltage of the constant voltage circuit that powers the CPU drops to zero instantaneously or gradually decreases, a circuit that does not turn on the self-holding circuit at voltages that are beyond the CPU's control is required, making the circuit configuration complicated. It had become.

本発明は電、池を電源とする血圧計や体温計において、
回路構成が簡単で部品点数の少い、電源回路を提供する
ことを目的としている。
The present invention provides a blood pressure monitor and a thermometer that use a battery as a power source.
The purpose is to provide a power supply circuit with a simple circuit configuration and a small number of parts.

問題点を解決するための手段 本発明は上記問題点を解決するため、容量低下と共に出
力電圧が低下する電池等を電源とし、しかもCPUを定
電圧駆動する電源回路において、電源をスイッチングす
るトランジスタと、前記トランジスタのベース電流をス
イッチングするプッシュスイッチ回路と、前記トランジ
スタの出力電圧を一定電圧に変換する定電圧回路と、前
記定電圧回路の出力を電源とし、前記プッシュスイッチ
回路の出力電圧を入力とするCPUと、前記CPUの出
力電圧が所定値以上であることを検出する電圧低下検出
回路と、前記電圧低下検出回路の出力を入力とする前記
トランジスタのベース電流保持回路と、前記プッシュス
イッチ回路の出力電圧を一定にするため前記CPUの出
力端子と前記プッシュスイッチ回路の入力端子を接続す
るダイオードとで電源回路を構成する。
Means for Solving the Problems In order to solve the above-mentioned problems, the present invention provides a power supply circuit that uses a battery or the like as a power source whose output voltage decreases as the capacity decreases, and that drives a CPU at a constant voltage, by using a transistor for switching the power source. , a push switch circuit that switches the base current of the transistor, a constant voltage circuit that converts the output voltage of the transistor into a constant voltage, an output of the constant voltage circuit as a power source, and an output voltage of the push switch circuit as an input. a voltage drop detection circuit that detects that the output voltage of the CPU is equal to or higher than a predetermined value, a base current holding circuit of the transistor that receives the output of the voltage drop detection circuit as an input, and a push switch circuit. In order to keep the output voltage constant, a power supply circuit is configured with a diode connecting the output terminal of the CPU and the input terminal of the push switch circuit.

作  用 本発明は上記した構成により、簡単な回路構成で電源の
オンオフ機能やオートパワーオフ機能を有すると共に、
電源電圧オフ時の過渡現象での誤動作を防止している。
Function The present invention has a power on/off function and an auto power off function with a simple circuit configuration due to the above-described configuration.
This prevents malfunctions due to transient phenomena when the power supply voltage is turned off.

実施例 以下、本発明の実施例を第1図および第2図に沿って詳
細に説明する。第1図において、1は電池等の電源、2
は電源1をスイッチングするトランジスタ、3はトラン
ジスタ20ベースとアース間に抵抗R1とプッシュスイ
ッチPSと抵抗〜を直列に接続したプッシュスイッチ回
路、4は定電圧回路、5はCPU、6はトランジスタ2
のベース電流保持回路、7は電圧低下検出回路、Dはダ
イオードである。第2図には電圧低下検出回路の具体例
を示す。
Embodiments Hereinafter, embodiments of the present invention will be described in detail with reference to FIGS. 1 and 2. In Figure 1, 1 is a power source such as a battery, 2
is a transistor that switches the power supply 1, 3 is a push switch circuit in which a resistor R1, a push switch PS, and a resistor ~ are connected in series between the base of the transistor 20 and ground, 4 is a constant voltage circuit, 5 is a CPU, and 6 is a transistor 2
7 is a voltage drop detection circuit, and D is a diode. FIG. 2 shows a specific example of the voltage drop detection circuit.

まずプッシュスイッチ回路3のプッシュスイッチPSを
押すと、トランジスタ2がオンし、定電圧回路4を介し
て、CPU5の端子vDD−vss間へ 定電圧VDが
供給され、CPU5が作動し、出力P1の出力電圧vP
1をVDとする。次に出力電圧vP、が電圧低下検出回
路7で基準電fEV R,fと比較されvPl〉vR,
fの場合はベース電流保持回路6をオンし、トランジス
タ2のベースtit−流す。またプッシュスイッチ回路
3においては、出力電圧vPs をCPU6の割り込み
入力端子INTの入力電圧としているが、プッシュスイ
ッチpsを最初に押した時は、 が印加され、CPU5がオンした後は、CPU5の出力
vP1がダイオードDを介してプッシュスイッチ回路3
に供給され、 vP8=VD−0,6(v) が印加される。しかし、CPU5において、電源投入後
の入力端子INTへの最初の割シ込み入力は無視するよ
うに構成し、プッシュスイッチPsを離してもベース電
流保持回路3はオンしたままである。
First, when push switch PS of push switch circuit 3 is pressed, transistor 2 is turned on, constant voltage VD is supplied between terminals vDD and vss of CPU 5 through constant voltage circuit 4, CPU 5 is activated, and output P1 is Output voltage vP
Let 1 be VD. Next, the output voltage vP is compared with the reference voltage fEVR,f by the voltage drop detection circuit 7, and vPl>vR,
In the case of f, the base current holding circuit 6 is turned on to allow the base current of the transistor 2 to flow. In addition, in the push switch circuit 3, the output voltage vPs is used as the input voltage of the interrupt input terminal INT of the CPU 6. When the push switch ps is pressed for the first time, is applied, and after the CPU 5 is turned on, the output voltage of the CPU 5 is vP1 is connected to push switch circuit 3 via diode D.
and vP8=VD-0,6(v) is applied. However, the CPU 5 is configured to ignore the first interrupt input to the input terminal INT after power is turned on, and the base current holding circuit 3 remains on even if the push switch Ps is released.

次にプッシュスイッチを押すと Vp8=VD−Qs(v) がCPU5の入力端子INTに印加され、CPU6の動
作は停止し、CPU5の出力vP、は。■となり、ベー
ス電流保持回路6はオフし、それでトランジスタ2もオ
フして、定電圧回路4の電圧VDは低下する。電圧VD
がOvまで低下する過渡状態において、CPU5の保証
する最低動作電圧Vaよりも電圧VDが小さくなった時
、CPU5の出力電圧vP1 は不定となる。この時、
出力電圧vP1がoVからVDになっても、電圧低下検
出回路7において、基準電圧Vア。fをVa 以上に設
定しているので、出力電圧vbはoVのままで、ベース
電流保持回路6はオンしない。
Next, when the push switch is pressed, Vp8=VD-Qs(v) is applied to the input terminal INT of the CPU5, the operation of the CPU6 is stopped, and the output vP of the CPU5 is. (2), the base current holding circuit 6 is turned off, the transistor 2 is also turned off, and the voltage VD of the constant voltage circuit 4 is reduced. Voltage VD
In a transient state in which the voltage VD decreases to Ov, when the voltage VD becomes smaller than the minimum operating voltage Va guaranteed by the CPU 5, the output voltage vP1 of the CPU 5 becomes unstable. At this time,
Even if the output voltage vP1 changes from oV to VD, the voltage drop detection circuit 7 maintains the reference voltage Va. Since f is set above Va, the output voltage vb remains oV and the base current holding circuit 6 is not turned on.

またCPU5において、一定時間後に電源をオフするオ
ートパワーオフの機能は、出力P1をコントロールする
ことで容易に構成できる。
Further, in the CPU 5, an auto power-off function for turning off the power after a certain period of time can be easily configured by controlling the output P1.

次に電圧低下検出回路7の具体例を第2図に従って説明
する。第2図0では入力端子aとアースC間に抵抗R3
とR4を直列に接続し、R3とR4の接続点を出力端子
すに接続する。R3とR4はを満足するよう設定する。
Next, a specific example of the voltage drop detection circuit 7 will be explained with reference to FIG. In Figure 2 0, there is a resistor R3 between input terminal a and ground C.
and R4 are connected in series, and the connection point of R3 and R4 is connected to the output terminal. R3 and R4 are set to satisfy.

第2図(b)では入力端子dと出力端子す間にツェナー
ダイオードZD と抵抗R6を直列に接続し、出力端子
すとアースC間に抵抗〜を接続する。ツェナーダイオー
ドZDの両端の電圧はvRefとし、R5(R6とする
In FIG. 2(b), a Zener diode ZD and a resistor R6 are connected in series between the input terminal d and the output terminal, and a resistor .about. is connected between the output terminal and the ground C. The voltage across the Zener diode ZD is vRef, and R5 (R6).

第3図(C)では入力端子aはオペアンプOPの非反転
入力端子に接続し、基準電圧vrofをオペアンプ○P
の反転端子に接続し、オペアンプoPの出力端子は抵抗
R7を介して出力端子すと接続する。
In Fig. 3(C), the input terminal a is connected to the non-inverting input terminal of the operational amplifier OP, and the reference voltage vrof is connected to the operational amplifier ○P.
The output terminal of the operational amplifier oP is connected to the output terminal via a resistor R7.

以上3つの回路において、vPlがVア。f以下になる
と、電圧低下検出回路7の出力電圧vbは低下し、ベー
ス電流保持回路6はオンしない。
In the above three circuits, vPl is Va. When it becomes less than f, the output voltage vb of the voltage drop detection circuit 7 decreases, and the base current holding circuit 6 does not turn on.

発明の効果 以上のように本発明によれば、1つのプッシュスイッチ
で電源のオンオフを可能にし、定電圧回路を構成するこ
とな(CPUへの定電圧の割り込み出力を可能にし、オ
ートパワーオフの機能も内置できる低コストの電源回路
を提供することができる。
Effects of the Invention As described above, according to the present invention, it is possible to turn on and off the power supply with a single push switch, and there is no need to configure a constant voltage circuit (it is possible to output a constant voltage interrupt to the CPU, and it is possible to turn off the power automatically). It is possible to provide a low-cost power supply circuit whose functions can also be installed internally.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例における電源回路図、第2図
は同電源回路の電圧低下検出回路の具体回路構成を示す
回路図である。 1・・・・・・電源、2・・・・・・トランジスタ、3
・・・・・・プッシュスイッチ回路、4・・・・・・定
電圧回路、6・・・・・・CPU、6・・・・・・ベー
ス電流保持回路、7・・・・・・電圧低下検出回路。 代理人の氏名 弁理士 中 尾 敏 男 はが1名第2
図 a、l (+)     (2)
FIG. 1 is a power supply circuit diagram in one embodiment of the present invention, and FIG. 2 is a circuit diagram showing a specific circuit configuration of a voltage drop detection circuit of the power supply circuit. 1...Power supply, 2...Transistor, 3
...Push switch circuit, 4 ... Constant voltage circuit, 6 ... CPU, 6 ... Base current holding circuit, 7 ... Voltage Drop detection circuit. Name of agent: Patent attorney Toshio Nakao, 1st person, 2nd person
Figure a, l (+) (2)

Claims (1)

【特許請求の範囲】[Claims] 容量低下とともに出力電圧が低下する電池等を電源とし
、マイクロコンピュータを定電圧駆動する電源回路にお
いて、前記電源をスイッチングするトランジスタと、前
記トランジスタのベース電流をスイッチングするプッシ
ュスイッチ回路と、前記トランジスタの出力電圧を一定
電圧に変換する定電圧回路と、前記定電圧回路の出力を
電源とし、前記プッシュスイッチ回路の出力電圧を入力
とするマイクロコンピュータと、前記マイクロコンピュ
ータの出力電圧が所定値以上であることを検出する電圧
低下検出回路と、前記電圧低下検出回路の出力を入力と
する前記トランジスタのベース電流保持回路と、前記プ
ッシュスイッチ回路の出力電圧を一定にするため前記マ
イクロコンピュータの出力端子と前記プッシュスイッチ
回路の入力端子を接続するダイオードとを具備した電源
回路。
A power supply circuit that uses a battery or the like whose output voltage decreases as the capacity decreases as a power source and drives a microcomputer at a constant voltage includes a transistor that switches the power source, a push switch circuit that switches the base current of the transistor, and an output of the transistor. a constant voltage circuit that converts a voltage into a constant voltage; a microcomputer that uses the output of the constant voltage circuit as a power source and the output voltage of the push switch circuit as an input; and an output voltage of the microcomputer that is equal to or higher than a predetermined value. a voltage drop detection circuit for detecting the voltage drop detection circuit; a base current holding circuit for the transistor that receives the output of the voltage drop detection circuit as an input; and a base current holding circuit for the transistor that receives the output of the voltage drop detection circuit; A power supply circuit equipped with a diode that connects the input terminal of the switch circuit.
JP60047154A 1985-03-08 1985-03-08 Power source circuit Pending JPS61206018A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60047154A JPS61206018A (en) 1985-03-08 1985-03-08 Power source circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60047154A JPS61206018A (en) 1985-03-08 1985-03-08 Power source circuit

Publications (1)

Publication Number Publication Date
JPS61206018A true JPS61206018A (en) 1986-09-12

Family

ID=12767168

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60047154A Pending JPS61206018A (en) 1985-03-08 1985-03-08 Power source circuit

Country Status (1)

Country Link
JP (1) JPS61206018A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7536568B2 (en) 2005-12-01 2009-05-19 Covidien Ag Ultra low power wake-up circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7536568B2 (en) 2005-12-01 2009-05-19 Covidien Ag Ultra low power wake-up circuit
US8041964B2 (en) 2005-12-01 2011-10-18 Covidien Ag Ultra low power wake-up circuit

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