JPS61203313U - - Google Patents
Info
- Publication number
- JPS61203313U JPS61203313U JP8767085U JP8767085U JPS61203313U JP S61203313 U JPS61203313 U JP S61203313U JP 8767085 U JP8767085 U JP 8767085U JP 8767085 U JP8767085 U JP 8767085U JP S61203313 U JPS61203313 U JP S61203313U
- Authority
- JP
- Japan
- Prior art keywords
- output
- logarithmic compression
- capacitor
- differential amplifier
- receiving element
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000006835 compression Effects 0.000 claims description 4
- 238000007906 compression Methods 0.000 claims description 4
- 239000003990 capacitor Substances 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Measurement Of Optical Distance (AREA)
- Focusing (AREA)
- Length Measuring Devices By Optical Means (AREA)
Description
第１図は本考案の一実施例に係る測距装置を含
む自動焦点機構を示すブロツク回路図、第２図は
第１図の動作を説明するための波形図、そして第
３図および第４図はそれぞれ第１図の回路に用い
られるピークホールド回路の例を示すブロツク回
路図である。
１，２：受光ダイオード、３，４：増幅器、５
，６：対数圧縮ダイオード、７，８，２５，３４
，５１：コンデンサ、９：差動増幅器、１０，１
１，１２，１３，３３，４９，５０：抵抗、１４
：ピークホールド回路、１５，１６：コンパレー
タ、１７：デコーダおよびラツチ回路、１８，１
９：出力増幅器、２０，２１：レンズ駆動用マグ
ネツト、２３：コントロール回路、２４：抵抗、
２６：ドライバ、２７：発光ダイオード、３０：
ＦＥＴ、３１，３２：ダイオード、３５：インバ
ータ、３６，４０，４１……，４７：トランジス
タ、４８：定電流回路。
FIG. 1 is a block circuit diagram showing an automatic focusing mechanism including a distance measuring device according to an embodiment of the present invention, FIG. 2 is a waveform diagram for explaining the operation of FIG. 1, and FIGS. Each figure is a block circuit diagram showing an example of a peak hold circuit used in the circuit of FIG. 1, 2: Photodetector diode, 3, 4: Amplifier, 5
, 6: Logarithmic compression diode, 7, 8, 25, 34
, 51: Capacitor, 9: Differential amplifier, 10, 1
1, 12, 13, 33, 49, 50: resistance, 14
: Peak hold circuit, 15, 16: Comparator, 17: Decoder and latch circuit, 18, 1
9: Output amplifier, 20, 21: Lens driving magnet, 23: Control circuit, 24: Resistor,
26: Driver, 27: Light emitting diode, 30:
FET, 31, 32: diode, 35: inverter, 36, 40, 41..., 47: transistor, 48: constant current circuit.
Claims (1)
る受光素子と、該受光素子の各出力がそれぞれ入
力される２つの対数圧縮回路と、各々の対数圧縮
回路の出力の直流成分を遮断するコンデンサと、
該コンデンサを介して前記対数圧縮回路の各出力
に入力が接続され測距信号を出力する差動増幅器
と、該差動増幅器の出力を保持するピークホール
ド回路とを具備することを特徴とする測距装置。 A light receiving element whose ratio of two outputs changes depending on the light irradiation position, two logarithmic compression circuits into which each output of the light receiving element is input, and a capacitor that blocks the DC component of the output of each logarithmic compression circuit. and,
A measuring device comprising: a differential amplifier having an input connected to each output of the logarithmic compression circuit via the capacitor and outputting a ranging signal; and a peak hold circuit holding the output of the differential amplifier. range device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8767085U JPS61203313U (en) | 1985-06-12 | 1985-06-12 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8767085U JPS61203313U (en) | 1985-06-12 | 1985-06-12 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61203313U true JPS61203313U (en) | 1986-12-20 |
Family
ID=30640107
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8767085U Pending JPS61203313U (en) | 1985-06-12 | 1985-06-12 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61203313U (en) |
-
1985
- 1985-06-12 JP JP8767085U patent/JPS61203313U/ja active Pending
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