JPS61202501A - Voltage controlled oscillator for pll - Google Patents
Voltage controlled oscillator for pllInfo
- Publication number
- JPS61202501A JPS61202501A JP60043069A JP4306985A JPS61202501A JP S61202501 A JPS61202501 A JP S61202501A JP 60043069 A JP60043069 A JP 60043069A JP 4306985 A JP4306985 A JP 4306985A JP S61202501 A JPS61202501 A JP S61202501A
- Authority
- JP
- Japan
- Prior art keywords
- frequency
- phase
- amplitude
- control voltage
- frequency control
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000010355 oscillation Effects 0.000 claims description 3
- 239000003990 capacitor Substances 0.000 description 5
- 238000010586 diagram Methods 0.000 description 2
- 238000003384 imaging method Methods 0.000 description 1
- 238000011835 investigation Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L2207/00—Indexing scheme relating to automatic control of frequency or phase and to synchronisation
- H03L2207/06—Phase locked loops with a controlled oscillator having at least two frequency control terminals
Landscapes
- Inductance-Capacitance Distribution Constants And Capacitance-Resistance Oscillators (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明はPLL(位相同期ループ)用電圧制御発振器(
以下vCOという)に関するものでるる。[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a voltage controlled oscillator for PLL (phase locked loop) (
(hereinafter referred to as vCO).
従来、共振回路に可変容鷺ダイオードを用いたVCOで
は、可変容菫ダイオードの一端に周波数制御電圧を加え
、その他端は接地又は直流電圧を加えていた。その丸め
、周波数制御電圧の高い周波数成分にも、応答してVC
O出力周改畝が変動するという問題がめった。Conventionally, in a VCO using a variable capacity violet diode in a resonant circuit, a frequency control voltage is applied to one end of the variable capacity violet diode, and the other end is grounded or a DC voltage is applied. In response to the rounding and high frequency components of the frequency control voltage, the VC
The problem of fluctuating output circumferential ridges frequently occurred.
この従来のvCOは、周波数制御電圧の高い周波数成分
にも応答していたため、位相比e器出力κ含まれる比較
周波数成分によってvCO出力周rlL数が変動しない
樟、位相比較器出力を低域通過フィルタを介してVCO
に入力している。This conventional vCO also responded to high frequency components of the frequency control voltage, so the phase comparator output κ does not vary depending on the included comparison frequency components, and the phase comparator output passes through a low frequency range. VCO through filter
is being entered.
そこでこのvCO人力の周波数制御゛電圧Ktまれる比
較周波数成分を十分に減衰させるため一低域通過フィル
タの、遮断特性を急峻にする必要があるが、遮断周波数
を低くするとPLLルーズの帯域が狭くなるという欠点
がろシ、また遮ffr特性を急峻にするとPLLループ
の位相が回転し、ループが不安定となるという欠点があ
った。Therefore, in order to sufficiently attenuate the comparison frequency component inputted by this manual frequency control of vCO voltage Kt, it is necessary to make the cutoff characteristic of the low-pass filter steep. However, when the cutoff frequency is lowered, the PLL loose band becomes narrower. There is also a drawback that if the shielding ffr characteristic is made steep, the phase of the PLL loop rotates, making the loop unstable.
本発明の目的は、このような欠点を除き、高周波成分に
よる出力周波数変動を除き、PLLループを安定に動作
できるようにしたPLL用VCOを提供することにある
。SUMMARY OF THE INVENTION An object of the present invention is to provide a PLL VCO that eliminates such drawbacks, eliminates output frequency fluctuations due to high frequency components, and enables stable operation of a PLL loop.
本発明の構成は、共振回路に可変谷型ダイオードを用い
てこの可変容量ダイオードの−1に制御電圧を印加して
発振周波数を制御するPLL用電圧制御発fi器におい
て、前記可変容量ダイオードの他端には、高域通過フィ
ルタと、このフィルタの出力を接続する位相調整回路お
よび振−調整回路を介して前記周波数制御″電圧を印加
する仁とを特徴とする。The present invention provides a voltage controlled oscillator for PLL in which a variable valley type diode is used in a resonant circuit and a control voltage is applied to -1 of the variable capacitance diode to control the oscillation frequency. The end is characterized by a high-pass filter and a wire to which the frequency control voltage is applied via a phase adjustment circuit and an amplitude adjustment circuit connecting the output of this filter.
次に本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.
第1図は本発明の一実施例の回路図である。図中、11
は周波数制御電圧入力端子、12は直流増@器、13は
高域通過フィルタ、14は位相調査回路、15は振幅調
整回路、17は可変容量ダイオード、16.18は直流
カット用コンデンサ、19はインダクタ、22はトラン
ジスタ、19.21は帰還コンデンサ、20は直流カッ
ト用コンデンサ、22が■CO出力端子である。4成要
素16〜22によってコレクタ接地コルピッツ発撤器を
構成している。FIG. 1 is a circuit diagram of an embodiment of the present invention. In the figure, 11
is a frequency control voltage input terminal, 12 is a DC amplifier, 13 is a high-pass filter, 14 is a phase investigation circuit, 15 is an amplitude adjustment circuit, 17 is a variable capacitance diode, 16.18 is a DC cut capacitor, 19 is a An inductor, 22 a transistor, 19.21 a feedback capacitor, 20 a DC cut capacitor, and 22 a CO output terminal. The four components 16 to 22 constitute a collector-grounded Colpitts ejector.
ここで高域通過フィルタ13の遮断周波d’に位相比較
器から周波数制御1gl電圧に蒲れてぐる比411!周
波数よシ低い周波数にと9、また位相及び振幅調整回路
14.15を用いて、周波数詞(IIl電圧が比較周波
数と同じ周波数の時に直流増幅器12及び振暢調姫回w
r15双方の出力の撮嘱差及び位相差が0になる様w4
!!する。この時、位相および振幅の調帯が微少でおる
様に高域通過フィルタの遮断周波数を調整する。Here, the ratio between the cutoff frequency d' of the high-pass filter 13 and the frequency control 1gl voltage from the phase comparator is 411! At a frequency lower than the frequency 9, and by using the phase and amplitude adjustment circuits 14 and 15, when the voltage is at the same frequency as the comparison frequency, the DC amplifier 12 and the smooth tuning circuit are adjusted.
r15 so that the imaging difference and phase difference of both outputs become 0 w4
! ! do. At this time, the cut-off frequency of the high-pass filter is adjusted so that the phase and amplitude tuning is minimal.
以上のVRK各部をfJ!4整することによシ、周波数
制御電圧に含まれる比較周波数成分の信号は可変容蓋ダ
イオード17の両端に同振幅、同位相で加わるので、可
変各賞ダイオード17の容量は変化−せず、従ってvC
Oの出力は周波数制御電圧に含まれる比較周波数成分の
信号に応答しない。また、周波数制御電圧に、高域フィ
ルタ遮断周波数より高い周波数成分が加わった時にも、
可変容量ダイオード170両端にはほぼ同相、同振幅の
信号が加わシ、vCOの出力変動は少なくなる。逆に、
周波数制御電圧に高域フィルタ遮断周波数より低い周波
数成分が加わった時には可変谷型ダイオード17のカソ
ード側にアノード側より大振幅の1δ号が加わるので、
その周波数詞@電圧にvCOの出力周波数が応答する。The above VRK parts are fJ! 4, the signal of the comparison frequency component included in the frequency control voltage is applied to both ends of the variable cap diode 17 with the same amplitude and the same phase, so the capacitance of each variable cap diode 17 does not change. Therefore vC
The output of O does not respond to the comparison frequency component signal contained in the frequency control voltage. Also, when a frequency component higher than the high-pass filter cutoff frequency is added to the frequency control voltage,
Signals having substantially the same phase and the same amplitude are applied to both ends of the variable capacitance diode 170, and the fluctuation in the output of vCO is reduced. vice versa,
When a frequency component lower than the high-pass filter cutoff frequency is added to the frequency control voltage, the 1δ signal with a larger amplitude is applied to the cathode side of the variable valley diode 17 than the anode side.
The output frequency of vCO responds to that frequency word @voltage.
以上の様に、本実施例では、高域フィルタの遮断周波数
が比較周波数よシ低い場合に、比較周波数に対するvC
O出力の変動をなくすことが可能となる。As described above, in this embodiment, when the cutoff frequency of the high-pass filter is lower than the comparison frequency, the vC
It becomes possible to eliminate fluctuations in O output.
なお、本実施例の発振回路は、コレクタ接地コルピッツ
型発懺回路により説明したが、共振回路に可変容量ダイ
オードを用いた発振器であれば、どのようなものでも適
用できることは明らかである。Although the oscillation circuit of this embodiment has been explained using a common collector Colpitts type oscillator circuit, it is obvious that any oscillator using a variable capacitance diode in the resonant circuit can be applied.
以上説明したように、本発明によnば、PLLルーズの
帯域を位相比較器の比較周波数成分まで広げると同時に
、周波数1tilI#電圧に含まれる比較周波数成分に
よる出力周波nKwJの少ないvCOを実現することが
できる。As explained above, according to the present invention, it is possible to widen the PLL loose band to the comparison frequency component of the phase comparator, and at the same time realize vCO with less output frequency nKwJ due to the comparison frequency component included in the frequency 1tilI# voltage. be able to.
第1図は本発明の一実施例のブロック図である。
図において
11・・・・・・周波式制御電圧入力、12・・・・・
・直流増幅器、13・・・・・・高域通過フィルタ、1
4・・・・・・位相tA贅回路、15・・・・・・振幅
調整回路、16.L8,23・・・・・・直流カットコ
ンデンサ、17・・・・・・可変容量ダイオード、19
・・・・・・インダクタ、20,21’−・・・・・帰
還コンデンサ、22・・・・・・トランジスタ、24・
・・・・・■CO出力端子、
である。FIG. 1 is a block diagram of one embodiment of the present invention. In the figure, 11... Frequency type control voltage input, 12...
・DC amplifier, 13... High pass filter, 1
4... Phase tA circuit, 15... Amplitude adjustment circuit, 16. L8, 23...DC cut capacitor, 17...Variable capacitance diode, 19
...Inductor, 20,21'-...Feedback capacitor, 22...Transistor, 24.
...■CO output terminal.
Claims (1)
イオードの一端に制御電圧を印加して発振周波数を制御
するPLL用電圧制御発振器において、前記可変容量ダ
イオードの他端には、高域通過フィルタと、このフィル
タの出力を接続する位相調整回路および振幅調整回路を
介して前記周波数制御電圧を印加することを特徴とする
PLL用電圧制御発振器。A voltage controlled oscillator for PLL uses a variable capacitance diode in a resonant circuit and controls the oscillation frequency by applying a control voltage to one end of the variable capacitance diode, the other end of the variable capacitance diode having a high-pass filter; A voltage controlled oscillator for PLL, characterized in that the frequency control voltage is applied through a phase adjustment circuit and an amplitude adjustment circuit to which the output of the filter is connected.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60043069A JPS61202501A (en) | 1985-03-05 | 1985-03-05 | Voltage controlled oscillator for pll |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60043069A JPS61202501A (en) | 1985-03-05 | 1985-03-05 | Voltage controlled oscillator for pll |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS61202501A true JPS61202501A (en) | 1986-09-08 |
Family
ID=12653563
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP60043069A Pending JPS61202501A (en) | 1985-03-05 | 1985-03-05 | Voltage controlled oscillator for pll |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61202501A (en) |
-
1985
- 1985-03-05 JP JP60043069A patent/JPS61202501A/en active Pending
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