JPS612015A - Rotary encoder device - Google Patents

Abstract

PURPOSE:To output a puse signal each 1/2 period by counting a clock pulse of the phase equivalent to 1/2 of one period of the pulse signal of a rotary encoder and by substracting the counted value thereof with the clock pulse of the following one period. CONSTITUTION:A clock pulse with a fixed period is outputted from a clock pulse generating circuit 8 to a 1/2 frequency dividing circuit 1 and the pulse of 1/2 of the frequency is outputted to a down counter 3. On the other hand a rotary encoder 7 generates a pulse and inputs into a differentiation circuit 4. A pulse is inputted into the down counter 3 synchronizing the front edge of the high level of the pulse thereof. The number equivalent to 1/2 of one period set by the counter 2 is substracted by the clock pulse in the following one period at the down counter 3, and the pulse signal is outputted at the time when the counting contents become in zero. Consequently the pulse signal can be obtd. even at the medium point of one period of the pulse signal of the rotary encoder.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention utilizes two-cycle pulses of the pulse signal output from the rotary encoder when performing various controls using the cycle of the pulse signal output from the rotary encoder. This invention relates to a device that makes it possible to obtain signals and use them for control.

[Prior art]

Devices are often configured to use the pulse signal output by the low-resolution encoder as a reference signal for control, that is, to perform a predetermined operation each time one or more periods of the pulse signal are detected. Normally, one period or less of a pulse signal cannot be used as a reference for control.

An example of the above-mentioned device is a drum-rotating inkjet printer, which prints by jetting ink droplets onto the paper while rotating a drum around which paper is wound. Pulse signals output by a rotary encoder are used to control the droplet ejection position.

By the way, in the above-mentioned printer, one dot is printed by ejecting ink droplets for each pulse generated by the rotary encoder, and usually 6 dots are printed.
/ mu resolution, when printing at 12 dots/fi, which is twice the normal resolution, at the midpoint of one cycle of the pulse signal output by the low-return encoder. Control is required to eject ink droplets.

In order to realize such control, a method as shown in FIG. 3 has conventionally been adopted. That is, one period P of the pulse signal output by the rotary encoder as shown in Figure 3+8)
In this case, the rising edge of the pulse signal (the leading edge of the high level portion) as shown in FIG. 3(b) and the falling edge (the trailing edge of the high level portion) as shown in FIG. As shown in FIG. 3 (dl), two signals are obtained during one period of the original pulse signal.

However, with this method, the output waveform of the low reencoder changes depending on the ambient temperature, and the high level period A
(A') and the low level period B (B') do not match in time, and it is difficult to obtain a pulse signal exactly at the point of two cycles of the original pulse signal. However, the actual situation is that printing accuracy deteriorates and good printing conditions cannot be obtained.

[Purpose of the invention]

The present invention has been made in view of the above circumstances,
1 period of the pulse signal output by the rotary encoder
The rotary encoder is configured to detect the exact midpoint of one period of the pulse signal by counting the number of clock pulses equivalent to /2 with a counter and subtracting this counted value with the clock pulses in the next period. It is an object of the present invention to provide a rotary encoder device capable of accurately obtaining a pulse signal at the same period of +A of a pulse signal to be output.

[Structure of the invention]

The rotary encoder device according to the present invention includes a counter that times one period of a pulse signal emitted by a rotary encoder using a clock pulse, and a clock that counts each corresponding number of one period of the pulse signal based on the timing result of the counter. , and a down counter that performs subtraction counting by the clock pulse in one period following the period of the timed pulse signal, and outputs the pulse signal when the count of the down counter becomes 0. Features.

〔Example〕

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described in detail below based on drawings showing embodiments thereof.

FIG. 1 is a block diagram showing the circuit configuration of a low reencoder device according to the present invention.

The pulse signal PS output from the low-resolution encoder 7 is input to the differentiator circuit 4. The differentiating circuit 4 detects the rising edge of the input pulse signal, and outputs a pulse signal FE cut out in synchronization with this rising edge to one input terminal of the down counter 3, the mono-multi-by-break 5, and the OR gate 6.

The mono-multi high break 5 is triggered by the pulse signal from the differentiating circuit 4 and outputs a pulse signal with a short time width, which is applied to the counter 2 as a reset pulse RP to reset the counter 2.

The counter 2 divides the frequency of the clock pulse CL generated by the clock pulse generation circuit 8 into 2% by the frequency dividing circuit 1.
The count value is given to the down counter 3. Further, the clock pulse CL generated by the clock pulse generating circuit 8 is directly applied to the down counter 3 and is used for subtracting the count value applied from the counter 2 to the down counter 3.

The down counter 3 is configured so that the pulse signal FE output from the differentiating circuit 4 is applied as a rotary signal, and when this load signal is applied, the count value of the counter 2 is loaded. Then, this count value is subtracted and counted using the clock pulse CL, and when the result becomes 0, the pulse signal DP is outputted to the other input terminal of the OR gate 6.

The operation of the apparatus of the present invention configured as described above will be explained below according to the time chart shown in FIG.

The clock pulse generation circuit 8 outputs a clock pulse CL of a constant period to the divide-by-2 circuit 1 and the down counter 3 as shown in FIG.
A pulse signal having a frequency twice the frequency of the applied clock pulse CL is applied to the counter 2 as shown in FIG. Therefore, the counter 2 counts the number of clock pulses generated by the cross pulse generation circuit 8 by 2.

On the other hand, the rotary encoder 7 generates a pulse signal PS with a period P as shown in FIG.

As shown in FIG. 2 (C1), the differentiator circuit 4 outputs a pulse signal FE in synchronization with the leading edge, that is, the rising edge, of the high level portion of the pulse signal PS output by the rotary encoder 7. This pulse signal FE is It is applied to one input terminal of the gate 6 and is output from the output terminal of the OR gate 6. Therefore, from the output terminal of the OR gate 6, a signal PS' synchronized with the rising edge of the pulse signal ps output from the rotary encoder 7 is output. is output as shown in FIG. 2 (gl).

On the other hand, the pulse signal FE generated by the differentiating circuit 4 is also given to the down counter 3 as a load signal, and each time this pulse signal FE is given to the down counter 3,
The count value of counter 2 is loaded into down counter 3.

Furthermore, the pulse signal FB generated by the differentiating circuit 4 is also given to the mono multi-bi break 5, which triggers the mono multi-bi break 5 to give a reset pulse RP to the counter 2 as shown in FIG. 2 (dl). .

Therefore, when the counter 2 counts the value of 2 of the clock pulse CL corresponding to each period of the pulse signal ps generated by the low reencoder 7, the counted value is written to the down counter 30-, and then the counter 2 The counted value will be weighed in cents.

Then, the pulse signal P generated by the rotary encoder 7
The count value of the counter 2 loaded into the down counter 3 each time each period of S starts, that is, the value of % of the number of clock pulses CLO corresponding to the previous one period of the pulse signal PS is calculated by the clock pulse generation circuit 8. is subtracted and counted by the clock pulse CL generated. The result of this subtraction count is 0
In other words, at the end of the period X shown in FIG. 2(g), in other words, at the end of the previous period
At a time point corresponding to , the down counter 3 outputs the pulse signal DP to the other input terminal of the OR gate 6. As a result, each pulse signal output from the rotary encoder 7 is output from the output terminal of the OR gate 6 as shown in FIG.
The signal ps'' is output at the middle point of the period, and the period X and Y
A pulse signal is obtained at exactly the midpoint of one period of the pulse signal ps outputted by the rotary encoder 7.

〔effect〕

As detailed above, according to the present invention, a pulse signal can be obtained at the exact midpoint of each cycle of the pulse signal output by the rotary encoder, so that the rotary encoder generates a signal regardless of the temperature characteristics of the rotary encoder. It becomes possible to obtain a pulse signal with two periods (double the frequency) of the pulse signal.

Therefore, if the apparatus of the present invention is used in the above-mentioned drum rotation type inkjet printer, good printing results can be obtained even when printing is performed at twice the normal resolution.

[Brief explanation of the drawing]

The drawings show an embodiment of the present invention; FIG. 1 is a block diagram showing the circuit configuration of the device of the present invention, FIG. 2 is a time chart thereof, and FIG. 3 is a time chart of a conventional method. 1...2 frequency divider circuit 2...Counter 3...Down counter 4...Differential circuit 7...Rotary encoder 8...Clock pulse generation circuit CL...Clock pulse ps...Pulse signal

Claims (1)

[Claims] 1. A counter that measures one cycle of a pulse signal emitted by a rotary encoder using a clock pulse, and a number equivalent to 1/2 of one cycle of the pulse signal is set based on the time measurement result of the counter. , and a down counter that performs subtraction counting by the clock pulse in one period following the period of the timed pulse signal, and outputs the pulse signal when the count of the down counter becomes 0. Characteristic rotary encoder device.