JPS61201461A - Manufacture of photosensor element - Google Patents
Manufacture of photosensor elementInfo
- Publication number
- JPS61201461A JPS61201461A JP60041845A JP4184585A JPS61201461A JP S61201461 A JPS61201461 A JP S61201461A JP 60041845 A JP60041845 A JP 60041845A JP 4184585 A JP4184585 A JP 4184585A JP S61201461 A JPS61201461 A JP S61201461A
- Authority
- JP
- Japan
- Prior art keywords
- electrode film
- layer
- amorphous silicon
- type
- film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 20
- 229910021417 amorphous silicon Inorganic materials 0.000 claims abstract description 44
- 238000000034 method Methods 0.000 claims description 21
- 230000003287 optical effect Effects 0.000 claims description 21
- 229910052751 metal Inorganic materials 0.000 claims description 20
- 239000002184 metal Substances 0.000 claims description 20
- 238000005530 etching Methods 0.000 claims description 13
- 239000000758 substrate Substances 0.000 claims description 13
- 230000001681 protective effect Effects 0.000 claims description 12
- 238000000151 deposition Methods 0.000 claims description 4
- 238000000059 patterning Methods 0.000 claims description 2
- 229910001120 nichrome Inorganic materials 0.000 abstract description 11
- 239000004020 conductor Substances 0.000 abstract description 8
- 238000001020 plasma etching Methods 0.000 abstract description 5
- 239000006185 dispersion Substances 0.000 abstract 2
- GQPLMRYTRLFLPF-UHFFFAOYSA-N Nitrous Oxide Chemical compound [O-][N+]#N GQPLMRYTRLFLPF-UHFFFAOYSA-N 0.000 description 8
- 239000007789 gas Substances 0.000 description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 6
- 238000007796 conventional method Methods 0.000 description 5
- 229910052814 silicon oxide Inorganic materials 0.000 description 5
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 4
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 4
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 4
- 235000013842 nitrous oxide Nutrition 0.000 description 4
- 238000000206 photolithography Methods 0.000 description 4
- 229910000077 silane Inorganic materials 0.000 description 4
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 3
- 229910052804 chromium Inorganic materials 0.000 description 3
- 239000011651 chromium Substances 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 239000011521 glass Substances 0.000 description 3
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 2
- CURLTUGMZLYLDI-UHFFFAOYSA-N Carbon dioxide Chemical compound O=C=O CURLTUGMZLYLDI-UHFFFAOYSA-N 0.000 description 2
- 229910052786 argon Inorganic materials 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000005566 electron beam evaporation Methods 0.000 description 2
- 238000000605 extraction Methods 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 229910003437 indium oxide Inorganic materials 0.000 description 2
- PJXISJQVUVHSOJ-UHFFFAOYSA-N indium(iii) oxide Chemical compound [O-2].[O-2].[O-2].[In+3].[In+3] PJXISJQVUVHSOJ-UHFFFAOYSA-N 0.000 description 2
- 230000004298 light response Effects 0.000 description 2
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 description 2
- 229910001887 tin oxide Inorganic materials 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910021529 ammonia Inorganic materials 0.000 description 1
- 238000003491 array Methods 0.000 description 1
- 229910002092 carbon dioxide Inorganic materials 0.000 description 1
- 239000001569 carbon dioxide Substances 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 239000008267 milk Substances 0.000 description 1
- 210000004080 milk Anatomy 0.000 description 1
- 235000013336 milk Nutrition 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 230000001105 regulatory effect Effects 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14665—Imagers using a photoconductor layer
Abstract
Description
【発明の詳細な説明】
（産業上の利用分野）
この発明は画像読取装置等に用いる非晶質シリコン光セ
ンサ素子の製造方法に関する。DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a method of manufacturing an amorphous silicon optical sensor element used in an image reading device or the like.
（従来の技術）
この種の従来提案されている光センサ素子の構造を第３
図に示す、この素子はｐｉｎ型光ダイオードを用いた素
子で、受光作用を有する多数のドツト配列を有している
。この素子は例えばガラス基板等の絶縁性透明基板１１
と、この基板ｌｌ上に設けた各受光部に共通で透明な、
例えば酸化インジウム或いは酸化スズ等の導電膜からな
る、第一電極膜１２と、この第一導電膜１２上に順次に
設けたＰ型、ｉ型及びｎ型非晶質シリコ７層１３．１４
及び１５とからなり、かつ、ドツトに対応して互いに分
離して形成した複数の受光部１６と、それぞれの受光部
１８のｎＷ非非晶質シリコ滑層１５表面の一部分を除き
全面に被着した例えばシリコン酸化Ｈ’Ｊ等の絶縁膜か
らなる保護膜１７と、各受光部Ｉ６のｎ型非晶質シリコ
７層１５と表面で接し個別に形成した例えばアルミニウ
ムからなる第二電極膜１８である。(Prior art) The structure of this type of conventionally proposed optical sensor element is
This element shown in the figure is an element using a pin type photodiode, and has a large number of dot arrays having a light receiving function. This element includes an insulating transparent substrate 11 such as a glass substrate, for example.
And, a common and transparent light receiving part provided on this substrate II.
For example, a first electrode film 12 made of a conductive film such as indium oxide or tin oxide, and seven P-type, i-type, and n-type amorphous silicon layers 13 and 14 sequentially provided on the first conductive film 12.
and 15, and a plurality of light-receiving parts 16 formed separately from each other corresponding to the dots, and the nW amorphous silicon slipping layer 15 of each light-receiving part 18 is coated on the entire surface except for a part of the surface. A protective film 17 made of an insulating film such as silicon oxide H'J, and a second electrode film 18 made of aluminum, for example, which is individually formed in contact with the n-type amorphous silicon 7 layer 15 of each light receiving part I6 at the surface. be.
この光センサ素子の動作を簡単に説明する。The operation of this optical sensor element will be briefly explained.
第一電極膜１２と、第二電極［１８との間に数Ｖ程度の
逆バイアス電圧を印加した状態で、被検出物からの照射
光りを基板１１の側で受光すると、その光強度に比例し
てｉ型非晶質シリコン層Ｉ４中に電子・正孔対が発生す
る。これらキャリアは接合部の電界により加速され、一
方のキャリアの電子はｎ型非晶質シリコ７層１５へ及び
他方のキャリアの正孔はｐ型非晶質シリコン層１３へと
移動する。これら電子及び正孔を第一電極膜１２及び第
二電極膜１８とで検出することにより、被検出物の明暗
比を得ることが出来る。When a reverse bias voltage of about several volts is applied between the first electrode film 12 and the second electrode [18], when the irradiated light from the object to be detected is received on the substrate 11 side, it is proportional to the light intensity. As a result, electron-hole pairs are generated in the i-type amorphous silicon layer I4. These carriers are accelerated by the electric field at the junction, and electrons of one carrier move to the n-type amorphous silicon layer 15, and holes of the other carrier move to the p-type amorphous silicon layer 13. By detecting these electrons and holes with the first electrode film 12 and the second electrode film 18, the contrast ratio of the object to be detected can be obtained.
（発明が解決しようとする問題点）
しかしながら、第３図に示した従来構造の光サンサでは
、ｐ型、ｉ型及びｎ型非晶質シリコ７層１３．１４及び
１５を分離加工してそれぞれドツトに対応する複数の独
立した受光部１６を形成する場合、通常はホトリソ工程
を用い、レジストをマスクとして非晶質シリコン層のプ
ラズマエツチングを行っている。この場合、レジストに
ピンホールがある場合、或いは、プラズマダメージによ
りレジストに欠陥が生じたりした場合、ｐ型、ｉ型及び
ｎ型非晶質シリコ７層１３．１４及び！５にピンホール
が発生し、これがため、これらピンホールを介して第一
電極膜１２と第二電極膜１８との間に短絡を生じてしま
う、従って、故障の無い光センサ素子の製造歩留まりが
低下するという欠点があった。(Problems to be Solved by the Invention) However, in the optical sensor of the conventional structure shown in FIG. When forming a plurality of independent light-receiving sections 16 corresponding to dots, a photolithography process is usually used, and the amorphous silicon layer is plasma-etched using a resist as a mask. In this case, if there is a pinhole in the resist, or if a defect occurs in the resist due to plasma damage, the p-type, i-type, and n-type amorphous silicon 7 layers 13, 14 and! Pinholes are generated in 5, which causes a short circuit between the first electrode film 12 and the second electrode film 18 through these pinholes.Therefore, the manufacturing yield of trouble-free optical sensor elements is reduced. The disadvantage was that it decreased.
さらに、従来構造の光センサ素子を製造するに当り、シ
リコン酸化膜等の保護膜１７をエツチングしてこれに第
二電極膜をｎ型非晶質シリコン層に接触させるための穴
を設けるが、この保護膜１７のエツチング液として通常
は弗酸系のエツチング液を用いる。この弗酸系のエツチ
ング液を用いると、各ドツト間でエツチングのバラツキ
が生じて穴の大きさや形状にバラツキが生じることが経
験的に認められており、これがため、光センサ素子を完
成させた場合、光電電流値、暗電流値等の各ドツト間で
の出力にバラツキが生じてしまう欠点があった。Furthermore, when manufacturing a photosensor element with a conventional structure, the protective film 17 such as a silicon oxide film is etched to provide a hole for bringing the second electrode film into contact with the n-type amorphous silicon layer. As the etching solution for this protective film 17, a hydrofluoric acid-based etching solution is usually used. It has been empirically recognized that when this hydrofluoric acid-based etching solution is used, variations in etching occur between dots, resulting in variations in hole size and shape. In this case, there is a drawback that variations occur in outputs such as photoelectric current values and dark current values between dots.
さらに、光応答速度をより速くするため、第二電極膜と
接していない第二導電型非晶質シリコン層を除去する方
法が提案されているが、従来の方法ではマスクずれを生
じるためその方法は採用出来ない。Furthermore, in order to further increase the photoresponse speed, a method has been proposed in which the second conductivity type amorphous silicon layer that is not in contact with the second electrode film is removed, but the conventional method causes mask misalignment. cannot be hired.
この発明の目的は上述した従来の欠点に鑑み、製造歩留
まりが向上し、各ドツト間での出力にバラツキを生ぜず
しかも光応答速度を高めるための処理を可能にした光セ
ンサ素子の製造方法を提供することにある。SUMMARY OF THE INVENTION In view of the above-mentioned conventional drawbacks, the object of the present invention is to provide a method for manufacturing an optical sensor element that improves manufacturing yield, eliminates variations in output between dots, and enables processing to increase optical response speed. It is about providing.
（問題点を解決するための手段）
この目的の達成を図るため、この発明によれば、透明絶
縁基板上に透明の第一電極膜と、非晶質シリコンからな
り互いに分離した複数の受光部と、該受光部上に設けた
第二電極膜と、該受光部を保護する保護膜とを具える光
センサ素子を製造するに当り、
この基板上に第一電極膜と、第一導電型、ｉ型及び第二
導電型非晶質シリコン層と、金属層とを順次に被着する
工程と、
この金属層をパターニングした後、得られた金属層パタ
ーンをマスクとして各非晶質シリコン層をエツチングし
て複数の受光部に分離する工程と、
この金属層パターンをエツチングして第二電極Ｈ９を形
成する工程と、
その後に、前述の保護膜を形成する工程とを含むことを
特徴とする。(Means for Solving the Problems) In order to achieve this object, according to the present invention, a transparent first electrode film is provided on a transparent insulating substrate, and a plurality of light receiving portions made of amorphous silicon and separated from each other are provided. In manufacturing a photosensor element comprising a second electrode film provided on the light receiving portion, and a protective film for protecting the light receiving portion, a first electrode film and a first conductivity type are provided on this substrate. , a step of sequentially depositing i-type and second conductivity type amorphous silicon layers and a metal layer, and after patterning the metal layer, each amorphous silicon layer is formed using the obtained metal layer pattern as a mask. The metal layer pattern is etched to separate it into a plurality of light-receiving parts, the metal layer pattern is etched to form the second electrode H9, and then the above-mentioned protective film is formed. do.
この発明の実施に当っては、金属パターンの加工に続け
て第二導電型非晶質シリコン層を第二電極膜と同一のパ
ターンでエツチングするのが好適である。In carrying out the present invention, it is preferable to etch the second conductivity type amorphous silicon layer in the same pattern as the second electrode film following the processing of the metal pattern.
（作用）
このように構成すれば、ｐ型、ｉ型及びｎ型非晶質シリ
コン層をプラズマエツチングして分離加工する場合に、
少なくても第二電極膜となるべき金属層をマスクとして
用いるため、この金属層にピンホールやプラズマダメー
ジが生じたりしないので、第−電極膜及びその後に形成
された第二電極膜との間のこれら非晶質シリコン層にピ
ンホーズが生じて両電極膜間に短絡が生ずる恐れがなく
、従って製造歩留まりを向上させることが出来る。(Function) With this configuration, when separating p-type, i-type, and n-type amorphous silicon layers by plasma etching,
Since at least the metal layer that is to become the second electrode film is used as a mask, no pinholes or plasma damage will occur in this metal layer, so there will be no gap between the first electrode film and the second electrode film formed after that. There is no possibility that pinholes will occur in these amorphous silicon layers and a short circuit will occur between both electrode films, and therefore manufacturing yield can be improved.
さらに、金属層を均一エツチングの容易なニクロム層或
いはその他の好適導電材料とすることにより各ドツト毎
の第二電極膜の形状、大きさ、位置等を揃えることが出
来るので、出力のバラツキを低く抑えることが出来る。Furthermore, by using a nichrome layer or other suitable conductive material that can be easily etched uniformly as the metal layer, it is possible to make the shape, size, position, etc. of the second electrode film for each dot uniform, thereby reducing variations in output. It can be suppressed.
さらに、第二電極膜の形成を保護膜の形成前に行うので
、少なくともこの第二電極膜を下地の′エツチングの際
のマスクとして使用出来、従って、光応答速度を速める
方法すなわち第二電極膜と接触していない第二導電型型
非晶質シリコン層を除去する方法を取り入れることが出
来る。Furthermore, since the second electrode film is formed before the protective film is formed, the second electrode film can be used at least as a mask during etching of the underlying layer. It is possible to adopt a method of removing the second conductivity type amorphous silicon layer that is not in contact with the second conductivity type amorphous silicon layer.
（実施例）
以下１図面を参照して、この発明の実施例につき説明す
る。尚、これら図において、断面を表わすへ−２チング
は一部分を除き省略して示しである。(Example) An example of the present invention will be described below with reference to one drawing. In these figures, the -2 markings representing the cross section are omitted except for a part.
匹１芝恵
第１図（Ａ）〜（Ｄ）はこの発明の光センサ素子の製造
方法の一実施例を説明するための製造工程図であり、こ
れら図は主要製造段階でのウェハの状態を概略的に示す
断面図である。Figures 1 (A) to (D) are manufacturing process diagrams for explaining one embodiment of the method for manufacturing an optical sensor element of the present invention, and these figures show the state of the wafer at the main manufacturing stage. It is a sectional view showing roughly.
先ず、絶縁性透明基板２１例えばガラス基板上に透明の
第一電極膜２２例えば酸化インジウム或いは酸化スズの
膜を通常の方法で設ける０次に、この第一導電膜２２上
に、第−導電型例えばＰ型非晶質シリコン層２３、Ｘ型
非晶質シリコ７層２４及び第二導電型例えばｎ型非晶質
シリコン層２５を成長させる。尚、以下の説明において
、非晶質シリコン層をａ−Ｓｉ層と称する。First, a transparent first electrode film 22 such as an indium oxide or tin oxide film is provided on an insulating transparent substrate 21 such as a glass substrate by a conventional method. For example, a P-type amorphous silicon layer 23, an X-type amorphous silicon 7 layer 24, and a second conductivity type, for example, an n-type amorphous silicon layer 25 are grown. Note that in the following description, the amorphous silicon layer will be referred to as an a-Si layer.
この場合、ｐ型ａ−Ｓｉ層２３はグロー放電法を用い、
シランカス（ＳｉＨａ）を主成分としかつポロン（Ｂ２
Ｈ６ガスを用いる）を不純物として膜厚５０〜５００人
程度の成膜する。また、ｉ型ａ −Ｓｉ層２４は同様に
シランガスを主成分としかつポロンを少量（Ｂ ２ Ｈ
＆ ／ ５ｉＨａ 〜数ｐｐｔａ）Ｗｆ＝ｈａシテＭ成
する。さらに、ｎ型ａ−Ｓｉ層２５はシランガスを主成
分とし、リン（ＰＨ３ガスを用いる）を不純物として添
加して形成する。In this case, the p-type a-Si layer 23 is formed using a glow discharge method,
The main component is Sirancus (SiHa) and Poron (B2).
A film with a thickness of about 50 to 500 layers is formed using H6 gas as an impurity. Further, the i-type a-Si layer 24 similarly contains silane gas as a main component and a small amount of poron (B 2 H
& / 5iHa ~ several ppta) Wf = ha city M is formed. Further, the n-type a-Si layer 25 is formed mainly of silane gas, with phosphorus (using PH3 gas) added as an impurity.
続いて、このｎ型ａ−Ｓｉ層２５上に電子ビーム蒸着法
又はその他の方法により第二電極膜となるべき金属Ｒｆ
！２Ｂ例えばニクロム層を形成し、よって５第１図（Ａ
）に示すようなウェハ構造を得る。Subsequently, a metal Rf to be a second electrode film is deposited on this n-type a-Si layer 25 by electron beam evaporation or other methods.
! 2B For example, form a nichrome layer, thus 5Fig. 1 (A
) to obtain a wafer structure as shown in ().
次に、この第二金属膜すなわちニクロム層２Ｂの被着に
続き、ホトリソ工程を用いて、このニクロム層２Ｇを基
板２１上に形成すべきドツトの位置、大きさ及び形状に
対応したパターンにエツチングして金属膜にクロム層）
パターン２８ａを得る。その後に、形成しようとする第
二電極膜のパターンを有するレジスト層２７を、エツチ
ングにより残存させたニクロム層パターン２８ａの表面
に、被着し、第１図（Ｂ）に示すようなウェハ構造を得
る。Next, following the deposition of the second metal film, that is, the nichrome layer 2B, the nichrome layer 2G is etched into a pattern corresponding to the position, size, and shape of the dots to be formed on the substrate 21 using a photolithography process. chromium layer on the metal film)
A pattern 28a is obtained. Thereafter, a resist layer 27 having the pattern of the second electrode film to be formed is deposited on the surface of the nichrome layer pattern 28a left by etching, forming a wafer structure as shown in FIG. 1(B). obtain.
この場合、レジスト層２７は表面の周縁部より後退した
領域に形成する。In this case, the resist layer 27 is formed in a region recessed from the peripheral edge of the surface.
次に、第１図（Ｂ）に示したニクロム層パターン２６ａ
及びレジスト層２７をマスクとして用いて、下側の各ａ
−Ｓｉ層をエツチングしてドツトに対応しかつ互いに分
離した複数の受光部２Ｂを形成する。この受光部２８の
形成は、例えばフレオンガス（ＣＦ ４ ）を用いたプ
ラズマエツチング法により、ｎ型ａ−Ｓｉ層２５、ｉ型
ａ−Ｓｉ層２４及びｐ型ａ−Ｓｉ層２３を順次にエツチ
ングして多数の島状の受光部２８に分離する。この場合
、第一電極膜２２は各受光部２８に対して共通の電極と
して残存させる。Next, the nichrome layer pattern 26a shown in FIG.
And using the resist layer 27 as a mask, each lower a
- Etching the Si layer to form a plurality of light receiving portions 2B corresponding to the dots and separated from each other. The light receiving portion 28 is formed by sequentially etching the n-type a-Si layer 25, the i-type a-Si layer 24, and the p-type a-Si layer 23 by, for example, a plasma etching method using Freon gas (CF 4 ). The light receiving portions 28 are separated into a large number of island-shaped light receiving portions 28. In this case, the first electrode film 22 is left as a common electrode for each light receiving section 28 .
その後に、レジスト層２７をマスクとしてこのレジスト
層２７の領域外にはみでているニクロム層パターン２ｆ
３ａの部分を選択的に除去し、このニクロム層パターン
２８ａの残存した部分で第二電極膜２８ｂを形成し、第
１図（Ｃ）に示したような構造のウェハを得る。After that, using the resist layer 27 as a mask, the nichrome layer pattern 2f protruding outside the area of this resist layer 27 is
3a is selectively removed, and a second electrode film 28b is formed using the remaining portion of the nichrome layer pattern 28a, thereby obtaining a wafer having the structure shown in FIG. 1(C).
この第二電極膜２８ｂの加工形成後に、レジストｆｉ２
７を除去し、続いて第一電極１１ｇ２２上に形成された
受光部２８及び及び第二電極膜２６ｂを覆うようにウェ
ハ全面に絶縁膜からなる保護膜２９を被着形成する。こ
の保ｖ１膜２３は、例えば、グロー放電法によりアルゴ
ンで希釈されたシランガスと笑気ガスとにより、シリコ
ン酸化膜を堆積させ、ホトリソ工程で第二電極１１２ｅ
ｂの表面の一部分を露出させるようにエツチング除去し
て形成する。その後に、第二電極膜２８ａと接触する外
部取り出し用導体３０例えば金を電子ビーム蒸着法又は
その他の方法を用いて形成し、続いてこの導体３０をホ
トリソエツチングにより加工して第１図（ロ）に示すよ
うな構造の光センサ素子を完成する。尚、この構造の光
センサ素子の動作は前述した従来の場合と同様に行われ
るので、その説明を省略する。After processing and forming this second electrode film 28b, resist fi2
Then, a protective film 29 made of an insulating film is formed on the entire surface of the wafer so as to cover the light receiving part 28 formed on the first electrode 11g22 and the second electrode film 26b. This V1 film 23 is formed by depositing a silicon oxide film on the second electrode 112e in a photolithography process using, for example, silane gas diluted with argon and laughing gas using a glow discharge method.
It is formed by etching away so as to expose a part of the surface of b. Thereafter, a conductor 30 for external extraction that contacts the second electrode film 28a is formed using an electron beam evaporation method or other method, and then this conductor 30 is processed by photolithography as shown in FIG. A photosensor element having the structure shown in b) is completed. It should be noted that the operation of the optical sensor element having this structure is performed in the same manner as in the conventional case described above, so the explanation thereof will be omitted.
乳二里１１
次に、この発明の第二実施例につき第２図を参照して説
明する。Milk Erli 11 Next, a second embodiment of the present invention will be described with reference to FIG. 2.
この第２図に示す実施例は、第一実施例の構造において
、第二導電型（この実施例ではｎ型）ａ−９ｉ層２５の
、第二電極膜２８ｂと接触していない部分を除去し、光
応答速度を一層速める構造を得ようとするものである。In the embodiment shown in FIG. 2, in the structure of the first embodiment, a portion of the second conductivity type (n-type in this embodiment) a-9i layer 25 that is not in contact with the second electrode film 28b is removed. The aim is to obtain a structure that further increases the light response speed.
その原理を簡単に説明する。第１図（Ｄ）に示す構造に
おいて、第二電極膜２ｆｉｂとｎ型ａ−Ｓｉ層２５との
間に接触していない望域があると、この非接触領域と接
するｉ型ａ−９ｉ層２４に印加される第一電極膜２２及
び第二電極膜２Ｂｂ間の逆バイアス電圧は非常に弱い、
従って、この非接触領域と接するｉ型ａ−９ｉ層２４の
部分で受光して発生した電子・正孔が第一電極膜２２及
び第二電極膜２８ｂに達するのに時間がかかり、このた
め、照明光のオン・オフに対する光応答速度が遅くなる
。従って、光応答速度を速めたい場合には、第二電極膜
２８ｂと接しないｎ型ａ−５ｉ層２５の部分を除去した
構造とするのが良い。The principle will be briefly explained. In the structure shown in FIG. 1(D), if there is a non-contact region between the second electrode film 2fib and the n-type a-Si layer 25, the i-type a-9i layer is in contact with this non-contact region. The reverse bias voltage applied between the first electrode film 22 and the second electrode film 2Bb is very weak.
Therefore, it takes time for electrons and holes generated by receiving light in the part of the i-type a-9i layer 24 that is in contact with this non-contact area to reach the first electrode film 22 and the second electrode film 28b. The light response speed to turning on and off the illumination light becomes slow. Therefore, if it is desired to increase the optical response speed, it is preferable to adopt a structure in which the portion of the n-type a-5i layer 25 that is not in contact with the second electrode film 28b is removed.
このためこの、実施例では、前述した第−実施列の第１
図（Ｃ）に示したウェハ構造を得た後に。Therefore, in this embodiment, the first
After obtaining the wafer structure shown in Figure (C).
レジスト層２７及び第二電極膜２８ｂをエツチングマス
クとして用いて１例えばＣＦ４によるプラズマエツチン
グ法により、少なくともｎ型ａ−Ｓｉ層２５の、この第
二電極膜２ｅｂと接触していない部分の下側の全ての領
域をｉ型ａ−Ｓｉ層２４に達する深さまでエツチング除
去する。第２図において、このようなエツチングにより
残存形成された第二導電型ａｓ＋Ｉｌｉ＃（この場合に
はｎ型ａ−Ｓ ｉ ＠ ）を２５ａで示す、その後の工
程は第１図（Ｃ）につき説明したと同様な工程で光セン
サ素子を形成する。このようにして得られた構造の光セ
ンサ素子は前述と同様に動作するが、光応答速度は第一
実施例の構造の場合よりも速くなる。Using the resist layer 27 and the second electrode film 28b as an etching mask, at least the lower part of the n-type a-Si layer 25 that is not in contact with the second electrode film 2eb is etched by plasma etching using CF4, for example. All regions are etched to a depth that reaches the i-type a-Si layer 24. In FIG. 2, the second conductivity type as+Ili# (in this case, n-type a-Si@) remaining by such etching is shown as 25a, and the subsequent steps will be explained with reference to FIG. 1(C). A photosensor element is formed in the same process as above. The optical sensor element having the structure thus obtained operates in the same manner as described above, but the optical response speed is faster than that of the structure of the first embodiment.
この発明は上述した実施例にのみ限定されるものではな
い。The invention is not limited to the embodiments described above.
例えば、上述した実施例では、レジスト層２７を形成し
た後、各ａ−９ｉ層をエツチングして受光部２８を形成
したが、受光部２８の形成後に金属膜２１３ａをエツチ
ングするためのレジスト層２７を形成しても良い。For example, in the above embodiment, after forming the resist layer 27, each a-9i layer is etched to form the light receiving part 28. However, after forming the light receiving part 28, the resist layer 27 is may be formed.
さらに、基板としてガラス以外のポリイミドや石英ガラ
スを用いても良い。Furthermore, polyimide or quartz glass other than glass may be used as the substrate.
さらに、第一電極膜として金その他の導電材料で形成す
ることも出来る。Furthermore, the first electrode film can also be formed of gold or other conductive material.
さらに、第二電極膜をクロムで形成しても良い。Furthermore, the second electrode film may be made of chromium.
さらに、上述した実施例では第一導電型をｐ型とし、第
二導電型をｎ型としたが、それぞれの導電型を反対導電
型とすることも出来る。Further, in the above-described embodiments, the first conductivity type is the p-type and the second conductivity type is the n-type, but the respective conductivity types may be opposite conductivity types.
さらに、上述した実施例では保護膜を笑気ガスと、アル
ゴンで希釈したシランガスとから形成したシリコン酸化
膜を用いたが、笑気ガスの代わりに二酸化炭素を用いて
形成したシリコン酸化膜や、笑気ガスの代°わりにアン
モニアを用いて形成したシリコン窒化膜を用いても良い
。Furthermore, in the above embodiments, a silicon oxide film formed from laughing gas and silane gas diluted with argon was used as the protective film, but a silicon oxide film formed using carbon dioxide instead of laughing gas, A silicon nitride film formed using ammonia instead of laughing gas may be used.
（発明の効果）
上述した説明からも明らかなように、この発明の光セン
サ素子の製造方法によれば、第一導電型、ｉ型及び第二
導電型非晶質シリコン層をプラズマエツチング法によっ
て分離して受光部を形成する場合、第二導電膜のみをマ
スクとするか或い′は第二導電膜とレジスト層との両者
をマスクとして用いることが出来るので、受光部にピン
ホールが発生するのを防ぐことが出来、従って第−電極
膜及び第二電極膜間で短絡を起すことが無く、結局は従
来よりも光センサ素子の製造歩留まりを向上させること
が出来る。(Effects of the Invention) As is clear from the above description, according to the method for manufacturing a photosensor element of the present invention, the first conductivity type, i-type, and second conductivity type amorphous silicon layers are etched by plasma etching. When forming the light-receiving part separately, it is possible to use only the second conductive film as a mask, or to use both the second conductive film and the resist layer as masks, so that pinholes are not generated in the light-receiving part. Therefore, there is no short circuit between the first electrode film and the second electrode film, and as a result, the manufacturing yield of the optical sensor element can be improved compared to the conventional method.
さらに、第二電極膜をニクロムとかクロムとかその他の
均一エツチングの容易な導電材料で形成することが出来
るので、第二電極膜の形状、寸法及び位置を正確に規制
出来、従って、従来の方法により得られた光センサ素子
よりもこの発明により得られた素子の方が出力のバラツ
キを低く抑えることが出来る。Furthermore, since the second electrode film can be formed of nichrome, chromium, or other conductive material that can be easily uniformly etched, the shape, size, and position of the second electrode film can be precisely regulated, and therefore can be etched using conventional methods. The element obtained according to the present invention can suppress variations in output lower than the obtained optical sensor element.
さらに、第二電極の形成を保護膜の形成の前に行ってい
るので、光応答を速める方法すなわち第二電極膜と接し
ていない第二導電型非晶質シリコン層の部分の除去方法
を取り入れることが出来る。Furthermore, since the formation of the second electrode is performed before the formation of the protective film, a method for speeding up the photoresponse, that is, a method for removing the portion of the second conductivity type amorphous silicon layer that is not in contact with the second electrode film, is adopted. I can do it.
第１図（Ａ）〜（Ｄ）はこの発明の光センサ素子の製造
方法の一実施例を説明するための製造工程図、
第２図はこの発明の他の実施例を説明するための光セン
サ素子の一部分を概略的に示す断面図、
第３図は従来の光センサ素子の製造方法の説明に供する
光センサ素子の一部分を概略的に示す断面図である。
２１・・・絶縁性透明基板、 ２２・・・第一電極ｎ
り２３ ・・・第一導電型ａ−５ｉ層、２４−・−ｉ型
ａ −３ｉ層２５・・・第二導電型ａ −５ｉ層
２５ａ・・・第二導電型ａ −Ｓｉ層
２Ｂ・・・金属膜（又はニクロム層）
２８ａ・・・金属膜パターン、 ２［１ｂ・・・第二電
極膜２７・・・レジスト層、 ２８・・・受光部
２９・・・保護膜
３０・・・外部取り出し用導体。FIGS. 1(A) to (D) are manufacturing process diagrams for explaining one embodiment of the method for manufacturing an optical sensor element of the present invention, and FIG. 2 is an optical diagram for explaining another embodiment of the invention. FIG. 3 is a cross-sectional view schematically showing a portion of the optical sensor element for explaining a conventional method of manufacturing an optical sensor element. 21... Insulating transparent substrate, 22... First electrode n
23...first conductivity type a-5i layer, 24-...-i type a-3i layer 25...second conductivity type a-5i layer 25a...second conductivity type a-Si layer 2B... ...Metal film (or nichrome layer) 28a...Metal film pattern, 2[1b...Second electrode film 27...Resist layer, 28...Light receiving part 29...Protective film 30... Conductor for external extraction.
Claims (2)
リコン層からなり互いに分離した複数の受光部と、該受
光部上に設けた第二電極膜と、該受光部を保護する保護
膜とを具える光センサ素子を製造するに当り、 前記基板上に前記第一電極膜と、第一導電型、ｉ型及び
第二導電型非晶質シリコン層と、金属層とを順次に被着
する工程と、 該金属層をパターニングした後、得られた金属層パター
ンをマスクとして各非晶質シリコン層をエッチングして
複数の受光部に分離する工程と、 前記金属層パターンをエッチングして第二電極膜を形成
する工程と、 その後に、前記保護膜を形成する工程と を含むことを特徴とする光センサ素子の製造方法。(1) A transparent first electrode film on a transparent insulating substrate, a plurality of light receiving parts separated from each other made of an amorphous silicon layer, a second electrode film provided on the light receiving part, and protecting the light receiving part. In manufacturing an optical sensor element comprising a protective film, the first electrode film, first conductivity type, i-type and second conductivity type amorphous silicon layers, and a metal layer are provided on the substrate. a step of sequentially depositing the metal layer; a step of patterning the metal layer and then etching each amorphous silicon layer using the obtained metal layer pattern as a mask to separate it into a plurality of light receiving parts; and a step of separating the metal layer pattern into a plurality of light receiving parts. A method for manufacturing an optical sensor element, comprising the steps of etching to form a second electrode film, and then forming the protective film.
方法において、前記金属パターンの加工に続いて前記第
二導電型非晶質シリコン層を第二電極膜と同一のパター
ンでエッチングすることを特徴とする光センサ素子の製
造方法。(2) In the method for manufacturing a photosensor element according to claim 1, following the processing of the metal pattern, the second conductivity type amorphous silicon layer is etched in the same pattern as the second electrode film. A method for manufacturing an optical sensor element, characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60041845A JPS61201461A (en) | 1985-03-05 | 1985-03-05 | Manufacture of photosensor element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60041845A JPS61201461A (en) | 1985-03-05 | 1985-03-05 | Manufacture of photosensor element |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61201461A true JPS61201461A (en) | 1986-09-06 |
Family
ID=12619589
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60041845A Pending JPS61201461A (en) | 1985-03-05 | 1985-03-05 | Manufacture of photosensor element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61201461A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5188974A (en) * | 1987-10-31 | 1993-02-23 | Canon Kabushiki Kaisha | Method of manufacturing semiconductor device |
| US5374494A (en) * | 1991-03-13 | 1994-12-20 | Canon Kabushiki Kaisha | Electrophotographic photosensitive member, electrophotographic apparatus, device unit, and facsimile machine employing the same |
-
1985
- 1985-03-05 JP JP60041845A patent/JPS61201461A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5188974A (en) * | 1987-10-31 | 1993-02-23 | Canon Kabushiki Kaisha | Method of manufacturing semiconductor device |
| US5374494A (en) * | 1991-03-13 | 1994-12-20 | Canon Kabushiki Kaisha | Electrophotographic photosensitive member, electrophotographic apparatus, device unit, and facsimile machine employing the same |
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