JPS61199985U - - Google Patents
Info
- Publication number
- JPS61199985U JPS61199985U JP8401285U JP8401285U JPS61199985U JP S61199985 U JPS61199985 U JP S61199985U JP 8401285 U JP8401285 U JP 8401285U JP 8401285 U JP8401285 U JP 8401285U JP S61199985 U JPS61199985 U JP S61199985U
- Authority
- JP
- Japan
- Prior art keywords
- images
- decoder
- transmitted
- output
- driver circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000005540 biological transmission Effects 0.000 claims description 5
- 238000006243 chemical reaction Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Facsimile Transmission Control (AREA)
Description
第1図は本考案の一実施例を示す系統図、第2
図は第1図の映像切替回路の一例を示す回路図、
第3図は第1図及び第2図の動作を示すタイムチ
ヤート、第4図は従来技術のシステム構成の例を
示す図である。
10……映像切替回路、11……AD変換器、
12……メモリ、13……タイミング制御回路、
14……アドレス発生回路、15……伝送制御回
路、21……1/Nカウンタ、22……バイナリ
カウンタ、23……デコーダ、24……ドライバ
、25……切替器、26……リレー回路、27…
…接点回路、101〜105……映像入力端子、
201……データ出力端子、106……映像出力
端子、107……書込み完了信号入力端子。
Fig. 1 is a system diagram showing an embodiment of the present invention;
The figure is a circuit diagram showing an example of the video switching circuit shown in FIG.
FIG. 3 is a time chart showing the operations of FIGS. 1 and 2, and FIG. 4 is a diagram showing an example of the system configuration of the prior art. 10... Video switching circuit, 11... AD converter,
12...Memory, 13...Timing control circuit,
14... Address generation circuit, 15... Transmission control circuit, 21... 1/N counter, 22... Binary counter, 23... Decoder, 24... Driver, 25... Switch, 26... Relay circuit, 27...
...Contact circuit, 101-105...Video input terminal,
201...Data output terminal, 106...Video output terminal, 107...Writing completion signal input terminal.
Claims (1)
像を伝送する静止画像伝送装置において、少なく
ともメモリへの書込み完了を示す信号を複数回計
数するカウンタと、その計数結果を順次計数する
2進カウンタ、該2進カウンタの出力をデコード
するデコーダと、デコーダの出力によつてリレー
等の切替回路を駆動するドライバ回路とを有し、
ドライバ回路によつて選択された映像信号をA/
D変換した後メモリへ蓄積し狭帯域伝送路へ送出
することにより、任意の伝送画像枚数毎に複数の
入力映像信号を自動的に選択し、静止画像化して
遠隔地へ伝送するようにしたことを特徴とする静
止画像伝送装置。 In a still image transmission device that transmits television images using a narrowband transmission path such as a telephone line, a counter that counts at least a signal indicating completion of writing to a memory multiple times, and a binary counter that sequentially counts the counting results. , a decoder that decodes the output of the binary counter, and a driver circuit that drives a switching circuit such as a relay using the output of the decoder,
The video signal selected by the driver circuit is
By storing the signal in memory after D conversion and sending it out to a narrowband transmission line, multiple input video signals are automatically selected for each arbitrary number of images to be transmitted, converted into still images, and transmitted to a remote location. A still image transmission device characterized by:
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8401285U JPS61199985U (en) | 1985-06-04 | 1985-06-04 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8401285U JPS61199985U (en) | 1985-06-04 | 1985-06-04 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS61199985U true JPS61199985U (en) | 1986-12-15 |
Family
ID=30633157
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8401285U Pending JPS61199985U (en) | 1985-06-04 | 1985-06-04 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61199985U (en) |
-
1985
- 1985-06-04 JP JP8401285U patent/JPS61199985U/ja active Pending
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