JPS61196624A - Impulse noise removing processor - Google Patents

Impulse noise removing processor

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Publication number
JPS61196624A
JPS61196624A JP3711085A JP3711085A JPS61196624A JP S61196624 A JPS61196624 A JP S61196624A JP 3711085 A JP3711085 A JP 3711085A JP 3711085 A JP3711085 A JP 3711085A JP S61196624 A JPS61196624 A JP S61196624A
Authority
JP
Japan
Prior art keywords
noise
sample
frequency
low
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3711085A
Other languages
Japanese (ja)
Other versions
JPH0511448B2 (en
Inventor
Sakuo Ueno
上野 朔男
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denso Ten Ltd
Original Assignee
Denso Ten Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Denso Ten Ltd filed Critical Denso Ten Ltd
Priority to JP3711085A priority Critical patent/JPS61196624A/en
Publication of JPS61196624A publication Critical patent/JPS61196624A/en
Publication of JPH0511448B2 publication Critical patent/JPH0511448B2/ja
Granted legal-status Critical Current

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  • Noise Elimination (AREA)

Abstract

PURPOSE:To supply the natural sound without a sense of incompatibility, to remove the impulse noise between discretes by sampling the sound signal and to obtain excellent noise removing processing effects by removing the pulse noise section by using a sampling frequency conversion. CONSTITUTION:A sound signal outputted by a distinguishing device 18 enters through a low-pass filter 34 of the invented circuit 30 to a sampled and hold circuit 36, and sampled at a frequency f1. Respective samples are converted to the digital value at an A/D converter 38, and by a noise detecting output from an impulse noise detecting device 32, the sample for the noise is removed. At a signal processor 40, respective samples which the A/D converter 38 outputs are sampled at a frequency fp again, low-pass filtering is executed for the resampled sample, and the result is resampled at a frequency f2 (here, fp=Mf1= Nf2, and M and N are integers and M, N is obtained). The output of the signal processor 40 is converted to an analog by a D/A converter 50, and through a low-pass filter 52, the analog sound signal, from which the noise is removed, is obtained.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、車載用ラジオ受信機の音声信号に含まれるイ
グニッションノイズやモータノイズなどに起因するイン
パルス性雑音の除去処理器に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a processor for removing impulsive noise caused by ignition noise, motor noise, etc. contained in an audio signal of a vehicle-mounted radio receiver.

〔従来の技術〕[Conventional technology]

インパルス性雑音の除去方法には、パルス雑音開始時を
検出し、信号を一定時間パルス雑音開始以前の値に保持
し、平滑化するという方法がある。
A method for removing impulsive noise includes a method of detecting the start of pulse noise, holding the signal at a value before the start of pulse noise for a certain period of time, and smoothing the signal.

第9図で説明するとTalは雑音が入った信号を示し、
Sは信号、N I” N 3はノイズである。これらの
ノイズを検出し、検出した時点より一定幅toを持つ(
c+の如きゲートパルスを発生し、このゲートパルスの
パルス幅期間中信号の振幅を前の値に保持して(blの
如くノイズを除去した信号を得る。
To explain with Figure 9, Tal indicates a signal with noise,
S is a signal, and N I" N 3 is a noise. These noises are detected, and from the time of detection they have a constant width to (
A gate pulse such as c+ is generated and the amplitude of the signal is held at the previous value during the pulse width of this gate pulse (a signal from which noise has been removed such as bl is obtained).

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

しかしこの方法ではゲートパルス幅toは一定であるか
ら、N2の如き広い幅の雑音は除去し切れずに残る部分
が生じ、これを回避すべくゲートパルスの幅toを大に
すると、雑音を除いた部分に生じる平坦部が大になり、
信号波形の歪が大になってノイズ除去がノイズ付加にな
りかねない結果を招く。またゲートパルスは雑音Nl、
N?。
However, in this method, since the gate pulse width to is constant, there will be a portion where a wide noise such as N2 cannot be completely removed, and to avoid this, if the gate pulse width to is increased, the noise can be removed. The flat area that appears in the area becomes larger,
The distortion of the signal waveform becomes large, resulting in the possibility that noise removal becomes noise addition. Also, the gate pulse has noise Nl,
N? .

・・・・・・とその発生タイミングが正しく一致する必
・要があり、これがずれると雑音除去不完全が多発し、
また信号のノイズでない部分が切除されて歪を増大する
It is necessary that the timing of occurrence of this happens correctly, and if this happens, incomplete noise removal will occur frequently.
Also, non-noise parts of the signal are removed, increasing distortion.

本発明はデジタル信号処理技術を用いてか\る点を改善
して、車載用受信機特有のイグナイタの動作及びモータ
の整流子の刷子により生じるインパルス性雑音を除去又
は低減し、所望の雑音抑圧特性を得ようとするものであ
る。
The present invention utilizes digital signal processing technology to eliminate or reduce impulsive noise caused by igniter operation and motor commutator brushes specific to automotive receivers, thereby achieving desired noise suppression. It is an attempt to obtain characteristics.

〔問題点を解決するための手段〕[Means for solving problems]

本発明は、音声信号に含まれるインパルス性ノイズの除
去処理器において、該音声信号に含まれるノイズを検出
する検出器と、該音声信号を周波数f1でサンプリング
し、得られた各サンプルをデジタル化し、ノイズに対す
るサンプルは除去する第1の回路と、該回路が出力する
各サンプルを周波数fpで再標本化し、該再標本化サン
プルに対しディジタルローパスフィルタリングし、その
結果を周波数f2で再標本化する(こ\でfp=M’f
1=Nf 2、M、Nは整数でM>N)シグナルプロセ
ッサと、該プロセッサの出力をアナログ変換し、更にロ
ーパスフィルタリングする第2の回路とを備えることを
特徴とするものである。
The present invention provides a processor for removing impulsive noise contained in an audio signal, which includes a detector for detecting noise contained in the audio signal, a detector that samples the audio signal at a frequency f1, and digitizes each obtained sample. , a first circuit that removes samples for noise, resamples each sample output by the circuit at a frequency fp, performs digital low-pass filtering on the resampled sample, and resamples the result at a frequency f2. (here fp=M'f
1=Nf 2, M, N are integers and M>N) This is characterized by comprising a signal processor, and a second circuit that converts the output of the processor into analog and further performs low-pass filtering.

〔作用〕[Effect]

本発明では、音声信号の再標本化、ディジタルローパス
フィルタの出力の間引きなど、標本化周波数の系を変換
する過程で雑音区間を補間し、インパルス性雑音を除去
する。第4図で説明すると、(alは音声信号を周波数
f1でサンプリングした各サンプルを示し、0,1,2
.・・・・・・はその第O1第1.第2.・・・・・・
各サンプルである。本例では第3サンプルが異常であり
、これはノイズNをサンプルしたものである。本発明で
はこのようなサンプルを周波数fpで再標本化する。f
pはflと同期しており、かつfp=Ef+である。こ
\でEは整数で、本例ではE=3である。このような周
波数で再標本化すると(blに示すように、flでのサ
ンプル0.1,2.・・・・・・((b)では0,3,
6゜・・・・・・)とその間の各2つのサンプル1,2
,4゜5、・・・・・・(これらはすべて0)が得られ
る。また別途音声信号をバイパスフィルタに通し、ノイ
ズNを検出し、ノイズNが検出された時点のサンプルは
rpでのサンプルには取り込まず、□この部分のサンプ
ルはその前後のサンプルの平均値として別途発生する。
In the present invention, impulsive noise is removed by interpolating noise intervals in the process of converting the sampling frequency system, such as by resampling the audio signal or thinning out the output of a digital low-pass filter. To explain with Fig. 4, (al indicates each sample obtained by sampling the audio signal at frequency f1, 0, 1, 2
..・・・・・・ is the O1 1st. Second.・・・・・・
Each sample. In this example, the third sample is abnormal, and is a sample of noise N. In the present invention, such samples are resampled at frequency fp. f
p is synchronized with fl, and fp=Ef+. Here, E is an integer, and in this example, E=3. When resampling at such a frequency (as shown in bl, the samples at fl are 0.1, 2... (in (b), 0, 3,
6゜...) and two samples 1 and 2 between each
, 4° 5, ... (all of these are 0) are obtained. Separately, the audio signal is passed through a bypass filter to detect noise N, and the sample at the time when noise N is detected is not taken into the sample at rp, and the sample in this part is separately processed as the average value of the samples before and after it. Occur.

fb)のサンプル9はこの平均値を示す。なおこれは、
信号レベルが低い場合は平均値とせずに単に0としてお
くことも考えられる。
Sample 9 of fb) shows this average value. Furthermore, this is
If the signal level is low, it may be possible to simply set it to 0 instead of using the average value.

次に、(blに示すサンプル列0,1,2,3.・・・
・・・をディジクルローパスフィルタに通し、(C)の
サンプル列を得る。即ちこのフィルタに通すと、通過前
はOであったサンプル1,2,4,5.・・・・・・は
図示のように、サンプル0,3,6.・・・・・・で定
まる低周波中の当該タイミングにおける値に再生される
。またサンプル9のような、音声信号のサンプルでない
サンプルにおいては、該サンプルとその左側および右側
のサンプル列から定まる低周波信号を突き合せたような
形になり、包絡線波形ば不連続になる。このようなサン
プル列を次に周波数f2で再標本化する。周波数f2は
fpと同期しており、そしてf’p=Ff2の関係があ
る。
Next, (sample rows 0, 1, 2, 3, etc. shown in bl)
... is passed through a digital low-pass filter to obtain the sample sequence (C). That is, when passing through this filter, samples 1, 2, 4, 5, etc., which were O before passing through this filter. . . . are samples 0, 3, 6, . . . as shown in the figure. It is reproduced to the value at the relevant timing in the low frequency determined by . In addition, for a sample such as sample 9, which is not a sample of an audio signal, the shape is such that the low frequency signal determined from the sample rows on the left and right sides of the sample are matched, and the envelope waveform is discontinuous. Such a sequence of samples is then resampled at frequency f2. Frequency f2 is synchronized with fp, and there is a relationship f'p=Ff2.

こ−でFは整数で、本例ではF=2である・。どのよう
にすれば、ディジタルローパスフィルタの出力0,1,
2,3.・・・・・・を本例では1つ置きに取出してf
2でめサンプリングを行なうことができ、しかも部分的
に取出して残部は捨てるので(本例では半分は捨てる)
この残部にノイズに対応するサンプルが入れば該サンプ
ル本例では9を取込まないようにすることができる。こ
うして(dlのサンプル列を得、これをアナログローパ
スフィルタに加えるとノイズNを除いた音声信号を得る
ことができる。
Here, F is an integer, and in this example, F=2. How can I set the outputs of the digital low-pass filter to 0, 1,
2, 3. In this example, take out every other one and write f
Sampling can be done in 2 steps, and since only a portion is taken out and the rest is discarded (in this example, half is discarded)
If a sample corresponding to noise is included in the remaining portion, it is possible to prevent the sample 9 from being included in this example. In this way, by obtaining a sample sequence of (dl) and applying it to an analog low-pass filter, it is possible to obtain an audio signal from which noise N has been removed.

第5図はか−る処理をブロック図で示す。音声信号を周
波数fIで標本化し、それを周波数rpで再標本化し、
ディジタルローパスフィルタに通し、羊の出力を周波数
f2で再標本化しこの過程でノイズ除去を行なう。こ−
でrpは f p=Ef + =F f 2   (E>F)  
 ・・・・・・+11つまりflとf2の最小公倍数で
あり、このようにするとf2による標本点が、ディジタ
ル・ローパスフィルタで補間された点と一致させること
ができ、後段階の各サンプルを前段階の各サンプルより
確実に取り込むことができる。f+は例えば40KHz
、、f2は60KHz、、fpば120KHzである。
FIG. 5 shows a block diagram of this process. Sample the audio signal at frequency fI, resample it at frequency rp,
The sheep output is resampled at frequency f2 through a digital low-pass filter, and noise is removed in this process. This
So rp is f p=Ef + =F f 2 (E>F)
・・・・・・+11, that is, the least common multiple of fl and f2. In this way, the sample point based on f2 can be matched with the point interpolated by the digital low-pass filter, and each sample in the later stage can be matched with the point interpolated by the digital low-pass filter. Samples at each stage can be captured more reliably. For example, f+ is 40KHz
,, f2 is 60 KHz, and fp is 120 KHz.

60KHzの標本値があればf+/2=20KHzのL
PFで最高20KHzまでの信号を復元できる。
If there is a sample value of 60KHz, f+/2=L of 20KHz
PF can restore signals up to 20KHz.

次にフィルタの説明をするに、一般にディジタルフィル
タの周波数特性H(e”’)は下式で表わされる。
Next, to explain the filter, the frequency characteristic H(e'') of a digital filter is generally expressed by the following formula.

T((ej”)  −Σ h(nl e −””   
     −−(21単位インパルス応答は Sin (ωcn)   ωc   5in(ωcn)
π n       π         ωcnであ
る。これらを第6図に示す。図示の如<(4)式%式%
) fnlに近似する。
T((ej”) −Σ h(nl e −””
--(21 unit impulse response is Sin (ωcn) ωc 5in (ωcn)
π n π ωcn. These are shown in FIG. As shown < (4) formula % formula %
) Approximate to fnl.

h f fn) −h fnl x ω(n)    
      ++ ++ (51(5)式により第7図
fblのn=Qを中心とした左右各□個のディスクリー
ト値を乗算係数とするFIRディジタルフィルタを構成
することを考える。
h f fn) −h fnl x ω(n)
++ ++ (51 Let us consider configuring an FIR digital filter using Equation (5) to have multiplication coefficients of □ discrete values on the left and right sides centered at n=Q in FIG. 7 fbl.

周波数fIの系のディスクリート信号からアナログ信号
へ復元するためのフィルタの遮断周波数はf1/2であ
るから第6図(alにおける遮断周波数ωCは ωC;π            ・・・・・・(7)
であり、また周波数f1の系を周波数fpで標本ωC−
π/E            ・・・・・・(8)で
ある。上記の場合におけるh d (n)はh d (
nl−土×」匪工lE      ・・・・・・(9)
E  nπ/E であり、これを第7図に示す。(9)式におけるnの値
を(6)式の範囲にとったh d (nlを乗算係数と
するFIRディジタルローパスフィルタは第8図の如く
である。今E=3.F=2即ちfp=3f+=2 f 
2.  ωc−rt/3とし、N−13とすると第3図
が得られる。前記ディジタルローパスフィルタとしては
第3図(C)を用いればよい。
Since the cutoff frequency of the filter for restoring the discrete signal of the system with frequency fI to an analog signal is f1/2, the cutoff frequency ωC at al is ωC; π...(7)
, and the system of frequency f1 is sampled ωC− at frequency fp.
π/E (8). h d (n) in the above case is h d (
nl-earth
E nπ/E , which is shown in FIG. The FIR digital low-pass filter in which the value of n in equation (9) is set within the range of equation (6) h d (nl is the multiplication coefficient is as shown in Fig. 8. Now E = 3.F = 2, that is, fp =3f+=2f
2. If ωc-rt/3 and N-13, then FIG. 3 is obtained. As the digital low-pass filter, the one shown in FIG. 3(C) may be used.

〔実施例〕〔Example〕

第2図は本発明が適用される車載用ラジオ受信機の構成
を示し、第1図はその要部つまり本発明の実施例を示す
。AMまたはFMラジオ受信機は第2図に示すように、
高周波増幅器10、混合器12、局部発振器14、中間
周波増幅器16、弁別器(又は検波器)18、音声増幅
器20を有し、アンテナ24で受けた放送波を増幅、選
択、検波、増幅してスピーカ22を鳴動させる。本発明
回路30は弁別器18と音声増幅器20との間に挿入さ
れ、インパルス性ノイズを除去する。このノイズの検出
を検出器32で行なう。この検出器32はバイパスフィ
ルタとその出力を矩形波化する整形回路を備え、パルス
ノイズと同時に発生し該ノイズの継続時間をパルス幅と
する矩形波を生じる。
FIG. 2 shows the configuration of an on-vehicle radio receiver to which the present invention is applied, and FIG. 1 shows the main part thereof, that is, an embodiment of the present invention. An AM or FM radio receiver, as shown in Figure 2,
It has a high frequency amplifier 10, a mixer 12, a local oscillator 14, an intermediate frequency amplifier 16, a discriminator (or detector) 18, and an audio amplifier 20, and amplifies, selects, detects, and amplifies the broadcast waves received by the antenna 24. The speaker 22 is made to sound. The inventive circuit 30 is inserted between the discriminator 18 and the audio amplifier 20 to eliminate impulsive noise. The detector 32 detects this noise. This detector 32 includes a bypass filter and a shaping circuit that converts the output into a rectangular wave, and generates a rectangular wave that is generated simultaneously with the pulse noise and whose pulse width is the duration of the noise.

第1図は本発明回路30の詳細を示し、帯域制限用のア
ナログローパスフィルタ34、サンプルホールド回路3
6、A/D変換器38、シグナルプロセッサ40、D/
A変換器50、補間用のアナログローパスフィルタ52
からなる。弁別器18が出力する音声信号はローパスフ
ィルタ34を通ってサンプルホールド回路36に入り、
こ\で周波数f1でサンプリングされる。各サンプルは
A/D変換器38に入り、こ−でデジタル値に変換され
、かつパルスノイズ検出器32からのノイズ検出出力に
よりノイズに対するサンプルは除去される(Oにされる
)。
FIG. 1 shows details of the circuit 30 of the present invention, including an analog low-pass filter 34 for band limiting, and a sample-hold circuit 3.
6, A/D converter 38, signal processor 40, D/
A converter 50, analog low-pass filter 52 for interpolation
Consisting of The audio signal output from the discriminator 18 passes through a low-pass filter 34 and enters a sample-and-hold circuit 36.
Here, it is sampled at frequency f1. Each sample enters an A/D converter 38, where it is converted to a digital value, and the noise detection output from the pulse noise detector 32 removes the sample for noise (sets it to O).

ディジタル化した各サンプルはシグナルプロセッサ40
で、第4図で説明したように処理する。
Each digitized sample is processed by a signal processor 40.
Then, the process is performed as explained in FIG.

プロセッサ40はRAM (ランダムアクセスメモリ)
42、演算回路44、制御回路46、ROM(読取り専
用メモ1月 48を備え、ディジタルローパスフィルタ
を構成するに必要な係数h d (nlはROM48に
格納しておく。A/D変換器38からの各サンプルは次
々とRAM42に書込まれ、ROM48の係数との積和
が演算回vIr44で求める。第4図を参照しながら説
明すると、A/D変換器38の出力は第4図(alの各
サンプル0,1゜2、・・・・・・であり (但しデジ
タル化されている)、これらがRAM42に逐次書込ま
れる。RAM書込み周波数はfpであり、そして間の各
2つはデータ0として書込みを行ない、0にしたノイズ
対応サンプルはその左右のサンプルの平均値として新た
に発生させ、こうして第4図fblのデータがRAMに
格納される。積和演算は第3図から明らかなように、連
続する13個のサンプル(本例ではN−13とする)と
係数h(−6)、h(−5)・・・・・・h(6)を乗
じ、それら積の和を求め、かつそれを3倍し、か\る処
理を1サンプルのピンチで全体をシフトしながら繰り返
すことにより行なう。
Processor 40 is RAM (Random Access Memory)
42, an arithmetic circuit 44, a control circuit 46, a ROM (read-only memo 48), and coefficients h d (nl) necessary for constructing a digital low-pass filter are stored in the ROM 48. From the A/D converter 38 Each sample is sequentially written to the RAM 42, and the sum of products with the coefficients of the ROM 48 is obtained in the operation circuit vIr44.To explain with reference to FIG. 4, the output of the A/D converter 38 is as shown in FIG. Each sample is 0, 1°2, ... (but digitized), and these are sequentially written into the RAM 42.The RAM write frequency is fp, and each two in between is Data is written as 0, and the noise corresponding sample set to 0 is newly generated as the average value of the left and right samples, and thus the data fbl in Figure 4 is stored in the RAM.The product-sum operation is clear from Figure 3. Multiply 13 consecutive samples (N-13 in this example) by coefficients h(-6), h(-5), h(6), and calculate the sum of these products. is obtained, multiplied by 3, and the above process is repeated while shifting the entire sample by pinching one sample.

即ち第3図のz −jは入力する各サンプルX (n)
相瓦間の時間に相当する遅延を与える回路であり、12
個あるので、連続する13個のサンプルが係数り、、、
、6)、h(−5)、・・・・・・h(6)の乗数器M
へ同時に入力し、1サンプル時間経過後は右端のサンプ
ルは消滅し、左端へは新しいサンプルが入り、全体が1
サンプルだけ右へシフト状態で新13号ンプル群が乗数
器Mへ同時入力し、以下これが繰り返される。演算回路
44がか−る処理を行なうには、連続する13個のデー
タをRAM42から読出し、これらとROM4Bの係数
J−6)、  h(−sl+ ・・・・・・h(6)と
の積をとり、1サンプルシフトした新13個のデータを
RAM42から読出して同様処理を繰り返し、以下これ
を繰り返す。
That is, z −j in FIG. 3 is each input sample X (n)
It is a circuit that provides a delay corresponding to the time between phase tiles, and is 12
Since there are 13 consecutive samples, the coefficient is...
, 6), h(-5), ...... Multiplier M of h(6)
simultaneously, and after one sample time has passed, the rightmost sample disappears, a new sample enters the leftmost sample, and the whole becomes 1.
The new No. 13 sample group is simultaneously input to the multiplier M while shifting the sample to the right, and this process is repeated thereafter. In order for the arithmetic circuit 44 to perform such processing, 13 consecutive pieces of data are read out from the RAM 42, and the combination of these and the coefficients J-6), h(-sl+ . . . h(6)) of the ROM 4B is performed. The product is multiplied, new 13 pieces of data shifted by one sample are read out from the RAM 42, and the same process is repeated, and this process is repeated thereafter.

か−る処理の結果、第4図telの各出力0,1゜2、
・・・・・・が得られ、これらはRAM42へ書込む。
As a result of this processing, each output of tel in Fig. 4 is 0, 1°2,
. . . are obtained, and these are written to the RAM 42.

そしてこのRAM42へ書込んだ積和を1つおきに取出
すと(f2で再標本化すると)第4図+dlが得られ、
これがシグナルプロセッサ40の出力となる。
Then, if we take out every other sum of products written to this RAM 42 (resampling with f2), we get +dl in Figure 4,
This becomes the output of the signal processor 40.

シグナルプロセッサの出力はD/A変換器50でアナロ
グに変換し、第4図(elを得る。これは(dlと外見
は同じであるが、(dlはデジタル信号、(11)はデ
ィスクリート信号である。この第4図(e)即々D/A
変換器50の出力をローパスフィルタ52に通すと、雑
音を除去したアナログ音声信号が得るられる。
The output of the signal processor is converted to analog by the D/A converter 50 to obtain (el) in Figure 4.This looks the same as (dl), but (dl is a digital signal and (11) is a discrete signal. Yes, this figure 4 (e) immediately D/A
When the output of the converter 50 is passed through a low pass filter 52, a noise-free analog audio signal is obtained.

遅延回路54は検出器32の出力でノイズに対するサン
プルの処理が確実に行なえるように、信号の処理タイミ
ングを遅らせるものである。制御回路46は各種の制御
を行なう。
The delay circuit 54 delays the timing of signal processing to ensure that the samples at the output of the detector 32 are processed against noise. The control circuit 46 performs various controls.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明によれば、標本化周波数変換
を利用してパルス性ノイズ区間を除去したので、より違
和感のない、自然な音を提供することができる。また音
声信号の標本化によりディスクリート値開のパルス性ノ
イズもこの処理の段階で除去され、優れたノイズ除去処
理効果が期待できる。
As described above, according to the present invention, since the pulse noise section is removed using sampling frequency conversion, it is possible to provide a more natural and natural sound. Further, by sampling the audio signal, pulse noise of discrete values is also removed at this processing stage, and an excellent noise removal processing effect can be expected.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の実施例を示すブロック図、第2図は本
発明を適用したラジオ受信機の構成を示すブロック図、
第3図はディジタルフィルタの説明図、第4図は動作説
明用波形図、第5図は本発明の処理要領の説明図、第6
図〜第8図はディジタルフィルタの説明図、第9図は従
来のノイズ除去の説明図である。 図面で32はパルスノイズ検出器、36.38は第1の
回路、40はシグナルプロセッサ、50゜52は第2の
回路である。
FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a block diagram showing the configuration of a radio receiver to which the present invention is applied,
FIG. 3 is an explanatory diagram of the digital filter, FIG. 4 is a waveform diagram for explaining the operation, FIG. 5 is an explanatory diagram of the processing procedure of the present invention, and FIG.
8 are explanatory diagrams of digital filters, and FIG. 9 is an explanatory diagram of conventional noise removal. In the drawing, 32 is a pulse noise detector, 36.38 is a first circuit, 40 is a signal processor, and 50.degree. 52 is a second circuit.

Claims (1)

【特許請求の範囲】 音声信号に含まれるインパルス性ノイズの除去処理器に
おいて、 該音声信号に含まれるノイズを検出する検出器と、 該音声信号を周波数f_1でサンプリングし、得られた
各サンプルをデジタル化し、ノイズに対するサンプルは
除去する第1の回路と、 該回路が出力する各サンプルを周波数f_pで再標本化
し、該再標本化サンプルに対しデイジタルローパスフイ
ルタリングし、その結果を周波数f_2で再標本化する
(こゝでf_p=Mf_1=Nf_2、M、Nは整数で
M>N)シグナルプロセツサと、該プロセツサの出力を
アナログ変換し、更にローパスフイルタリングする第2
の回路とを備えることを特徴とするパルス性ノイズ除去
処理器。
[Claims] A processor for removing impulsive noise contained in an audio signal includes: a detector for detecting noise contained in the audio signal; and a detector for sampling the audio signal at a frequency f_1 and each obtained sample a first circuit for digitizing and removing samples for noise; resampling each sample output by the circuit at a frequency f_p; digitally low-pass filtering the resampled samples; and resampling the result at a frequency f_2. A signal processor performs sampling (here f_p=Mf_1=Nf_2, M and N are integers and M>N), and a second signal processor converts the output of the processor into analog and further performs low-pass filtering.
A pulse noise removal processor comprising a circuit.
JP3711085A 1985-02-26 1985-02-26 Impulse noise removing processor Granted JPS61196624A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3711085A JPS61196624A (en) 1985-02-26 1985-02-26 Impulse noise removing processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3711085A JPS61196624A (en) 1985-02-26 1985-02-26 Impulse noise removing processor

Publications (2)

Publication Number Publication Date
JPS61196624A true JPS61196624A (en) 1986-08-30
JPH0511448B2 JPH0511448B2 (en) 1993-02-15

Family

ID=12488459

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3711085A Granted JPS61196624A (en) 1985-02-26 1985-02-26 Impulse noise removing processor

Country Status (1)

Country Link
JP (1) JPS61196624A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002233411A (en) * 2001-02-09 2002-08-20 Tomey Corp Holder for contact lenses
JP2006136480A (en) * 2004-11-11 2006-06-01 Ge Medical Systems Global Technology Co Llc Apparatus, method and program for digital filter processing

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002233411A (en) * 2001-02-09 2002-08-20 Tomey Corp Holder for contact lenses
JP2006136480A (en) * 2004-11-11 2006-06-01 Ge Medical Systems Global Technology Co Llc Apparatus, method and program for digital filter processing

Also Published As

Publication number Publication date
JPH0511448B2 (en) 1993-02-15

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