JPS61193573A - High voltage control circuit of crt display device - Google Patents

High voltage control circuit of crt display device

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Publication number
JPS61193573A
JPS61193573A JP3270985A JP3270985A JPS61193573A JP S61193573 A JPS61193573 A JP S61193573A JP 3270985 A JP3270985 A JP 3270985A JP 3270985 A JP3270985 A JP 3270985A JP S61193573 A JPS61193573 A JP S61193573A
Authority
JP
Japan
Prior art keywords
vertical
high voltage
control circuit
tension
control signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3270985A
Other languages
Japanese (ja)
Other versions
JPH0746829B2 (en
Inventor
Kazuyoshi Sasaki
佐々木　和義
Kikuo Tomita
喜久雄 冨田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP60032709A priority Critical patent/JPH0746829B2/en
Publication of JPS61193573A publication Critical patent/JPS61193573A/en
Publication of JPH0746829B2 publication Critical patent/JPH0746829B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Abstract

PURPOSE:To promote the stabilization of a picture width by a high-tension feedforward control by a vertical cynchronizing signal. CONSTITUTION:So as to negate the drop of an anode voltage caused by an anode load change arising at the moving time from a vertical feedback interval T1 to a vertical scanning interval T2, a high-tension control signal 23 is kept at high level in advance at the moving time from T1 to T2. This high-tension control signal 23 is converted to a control signal 22 that has an appropriate phase delay to the vertical feedback interval T1 at a waveform shaping circuit 20 and a drive circuit 21 by a vertical cynchronizing signal 19. At an amplifier 6, a detection voltage 18 that is obtained from the anode voltage detection resistor 10 of a FBT2 is added and the high-tension control signal 23 is inputted to a high-tension control 1. Thereby, a high-tension change arising from the control delay of a negative feedback from the secondary of the FBT is corrected ad a better picture quality with less distorsion is obtained.

Description

【発明の詳細な説明】 〔発明の利用分野〕 本発明はＣＲＴディスプレイ装置の高圧制御回路に係り
、特に１表示画面幅を一定にするための安定なアノード
電圧を得るのに好適な高圧制御回路に関する。[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to a high-voltage control circuit for a CRT display device, and particularly to a high-voltage control circuit suitable for obtaining a stable anode voltage for making one display screen width constant. Regarding.

〔発明の背景〕[Background of the invention]

ＣＲＴディスプレイ装置の高圧制御回路は、従来第４図
に示すようにＣＲＴのアノード電圧１６′を一定にして
安定な画面を得るために、第３図のフライバックトラン
ス（ＦＢＴ）２の二次側から検出電圧１８を増幅器６を
介して高圧制御回路１へ負帰還することにより制御して
いた。しかし、第４図に示すように、垂直帰線期間Ｔ１
には画面表示１３は行わず帰線消去を行っているために
、垂直帰線期間Ｔ１にはアノード電流１７が少なく、垂
直走査期間Ｔ２にはアノード電流１７が多く流れるため
、アノード負荷１４は垂直走査により急激に変化する。Conventionally, the high-voltage control circuit of a CRT display device is connected to the secondary side of a flyback transformer (FBT) 2 shown in FIG. The detected voltage 18 is negatively fed back to the high voltage control circuit 1 via the amplifier 6, thereby controlling the voltage. However, as shown in FIG. 4, the vertical retrace period T1
Since blanking is performed without displaying the screen display 13, the anode current 17 is small during the vertical blanking period T1, and a large amount of anode current 17 flows during the vertical scanning period T2, so the anode load 14 is Changes rapidly due to scanning.

従って、負帰還制御だけでは制御回路の応答遅れ等によ
りアノード電圧１６′は第４図に示すようにリンギング
等の電圧変動が発生する。この結果、アノード電圧の変
動により、画面幅が変動するため画面上部に画面幅歪を
生じるという問題があった。Therefore, if only negative feedback control is used, voltage fluctuations such as ringing occur in the anode voltage 16' due to delay in response of the control circuit, etc., as shown in FIG. 4. As a result, the screen width fluctuates due to fluctuations in the anode voltage, resulting in a problem in that screen width distortion occurs at the top of the screen.

尚、この種の回路として１例えば、特開昭５６−１４０
７７１、特開昭５７−６３９６８、特開昭５６−６５５
７３号公報があげられるが、いずれも、フィードバック
負帰還制御方式であり、本発明の垂直信号によるフィー
ドフォワード制御方式はみられない。Incidentally, one example of this type of circuit is, for example, Japanese Patent Application Laid-Open No. 56-140.
771, JP-A-57-63968, JP-A-56-655
Publication No. 73 is mentioned, but all of them use a feedback negative feedback control method, and do not include the feedforward control method using vertical signals of the present invention.

〔発明の目的〕[Purpose of the invention]

本発明の目的は、高圧制御回路において垂直同期信号に
よる高圧のフィードフォワード制御により、画面幅を安
定にするために、電圧変動の少ない高圧制御回路を提供
することにある。SUMMARY OF THE INVENTION An object of the present invention is to provide a high-voltage control circuit with less voltage fluctuation in order to stabilize the screen width by high-voltage feedforward control using a vertical synchronization signal in the high-voltage control circuit.

〔発明の概要ゴ 本発明はＣＲＴディスプレイ装置の高圧制御回路に関し
、従来のＦＢＴ二次側からの負帰還制御方式だけでは制
御できなかった垂直走査開始時にも、フィードフォワー
ド制御を行うことにより安定な高圧を得る高圧制御回路
を特徴とする。[Summary of the Invention] The present invention relates to a high-voltage control circuit for a CRT display device, and provides stable feedforward control even at the start of vertical scanning, which could not be controlled using only the conventional negative feedback control method from the FBT secondary side. It features a high voltage control circuit that obtains high voltage.

〔発明の実施例〕[Embodiments of the invention]

以下、本発明の一実施例を説明する。 An embodiment of the present invention will be described below.

第１図は本発明による高圧制御回路構成図で。FIG. 1 is a block diagram of a high voltage control circuit according to the present invention.

従来方式に比べて、垂直同期信号１９からのフィードフ
ォワード制御回路２０．２１を追加したものである。ま
た、第２図は各信号波形を示したものである。Compared to the conventional system, feedforward control circuits 20 and 21 from the vertical synchronization signal 19 are added. Moreover, FIG. 2 shows each signal waveform.

フィードフォワード制御回路において、垂直帰線期間Ｔ
１から垂直走査期間Ｔ２に移行する時に生じるアノード
負荷変動によって起こるアノード電圧の低下を打消すよ
うに、あらかじめＴ１からＴ２の移行時に高圧制御信号
２３を高くしておく。In the feedforward control circuit, the vertical retrace period T
The high voltage control signal 23 is set high in advance at the time of transition from T1 to T2 so as to cancel out the drop in anode voltage caused by the anode load fluctuation that occurs at the time of transition from T1 to T2.

この高圧制御信号２３は、垂直同期信号１９により波形
整形回路２０およびドライブ回路２１で垂直帰線期間Ｔ
１に対し適当な位相遅れをもった制御信号２２に変換さ
れる。増幅器６はＦＢＴ２のアノード電圧検出抵抗１０
によって得られる検出電圧１８と加算し、その高圧制御
信号２３は高圧制御回路１へ入力される。この制御信号
２３は、垂直偏向開始時のアノード電圧１６のリンギン
グ等の歪を吸収し、７ノード電圧１６が垂直走査期間Ｔ
２で一定になるように最適な制御を行うことで画面幅２
４は垂直走査期間Ｔ２で一定幅に保つことができる。な
お１図中７は水平トランジスタ、８は高速スイッチング
用ダイオード、９はコンデンサ、１１は規準電源。This high voltage control signal 23 is transmitted to the waveform shaping circuit 20 and the drive circuit 21 by the vertical synchronizing signal 19 during the vertical retrace period T.
The control signal 22 is converted into a control signal 22 having an appropriate phase delay with respect to 1. Amplifier 6 is an anode voltage detection resistor 10 of FBT2.
The high voltage control signal 23 is added to the detected voltage 18 obtained by the high voltage control circuit 1. This control signal 23 absorbs distortion such as ringing of the anode voltage 16 at the start of vertical deflection, and the 7-node voltage 16 is
By performing optimal control so that the screen width is constant at 2.
4 can be maintained at a constant width during the vertical scanning period T2. In Figure 1, 7 is a horizontal transistor, 8 is a high-speed switching diode, 9 is a capacitor, and 11 is a reference power supply.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、高圧制御回路はＦＢ’Ｔの二次側から
の負帰還の制御遅れによって生じる高圧変動が補正でき
るので１画面幅の歪がない良好な画質が得られる。According to the present invention, the high voltage control circuit can correct high voltage fluctuations caused by control delays of negative feedback from the secondary side of FB'T, so that good image quality without distortion of one screen width can be obtained.

【図面の簡単な説明】[Brief explanation of drawings]

第１図は本発明の一実施例のフィードフォワード方式高
圧制御回路、第２図は第１図の各信号波形図、第３図は
従来の高圧制御回路図、第４図は第３図の各信号波形図
である。 ■・・・高圧制御回路、２・・・ＦＢＴ、１０・・・７
ノード電圧検出抵抗、２０・・・波形整形回路、２１・
・・ドライブ回路。 １１′ 代理人　弁理士　／Ｊ１川勝用。 翳２囚 箭３囚 工Fig. 1 is a feedforward type high voltage control circuit according to an embodiment of the present invention, Fig. 2 is a diagram of each signal waveform of Fig. 1, Fig. 3 is a conventional high voltage control circuit diagram, and Fig. 4 is a diagram of the conventional high voltage control circuit. It is each signal waveform diagram. ■...High voltage control circuit, 2...FBT, 10...7
node voltage detection resistor, 20... waveform shaping circuit, 21.
...Drive circuit. 11' Agent Patent Attorney / J1 Kawakatsuyo. Shadow 2 Prisoner 3 Prisoner

Claims (1)

【特許請求の範囲】 １、ＣＲＴデイスプレイ装置の高圧制御回路において、 負帰還制御方式による制御遅れによつて生じる高圧の変
動を補正して歪のない画面を得るために、垂直同期信号
により高圧発生回路をフイードフオワード制御すること
を特徴とするＣＲＴデイスプレイ装置の高圧制御回路。[Claims] 1. In a high voltage control circuit of a CRT display device, high voltage is generated by a vertical synchronization signal in order to correct high voltage fluctuations caused by control delays due to the negative feedback control method and obtain a distortion-free screen. A high voltage control circuit for a CRT display device, characterized in that the circuit is controlled in a feedforward manner.
JP60032709A 1985-02-22 1985-02-22 High voltage control circuit for CRT display device Expired - Lifetime JPH0746829B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60032709A JPH0746829B2 (en) 1985-02-22 1985-02-22 High voltage control circuit for CRT display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60032709A JPH0746829B2 (en) 1985-02-22 1985-02-22 High voltage control circuit for CRT display device

Publications (2)

Publication Number Publication Date
JPS61193573A true JPS61193573A (en) 1986-08-28
JPH0746829B2 JPH0746829B2 (en) 1995-05-17

Family

ID=12366365

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60032709A Expired - Lifetime JPH0746829B2 (en) 1985-02-22 1985-02-22 High voltage control circuit for CRT display device

Country Status (1)

Country Link
JP (1) JPH0746829B2 (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5176012A (en) * 1974-12-26 1976-07-01 Sony Corp KODENATSUCHOSEIKAIRO
JPS58123673U (en) * 1982-02-15 1983-08-23 株式会社日立製作所 Screen distortion correction circuit for television receivers

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5176012A (en) * 1974-12-26 1976-07-01 Sony Corp KODENATSUCHOSEIKAIRO
JPS58123673U (en) * 1982-02-15 1983-08-23 株式会社日立製作所 Screen distortion correction circuit for television receivers

Also Published As

Publication number Publication date
JPH0746829B2 (en) 1995-05-17

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