JPS61189312U - - Google Patents
Info
- Publication number
- JPS61189312U JPS61189312U JP7312085U JP7312085U JPS61189312U JP S61189312 U JPS61189312 U JP S61189312U JP 7312085 U JP7312085 U JP 7312085U JP 7312085 U JP7312085 U JP 7312085U JP S61189312 U JPS61189312 U JP S61189312U
- Authority
- JP
- Japan
- Prior art keywords
- terminal
- circuit
- output
- voltage dividing
- common terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 6
Landscapes
- Continuous-Control Power Sources That Use Transistors (AREA)
Description
第1図はこの考案の実施例を示す回路図、第2
図は第1図の実施例の電圧、電流、その他のパラ
メータの変動分を示す図、第3図は仮想的ICレ
ギユレータを用いた第1図の等価回路を示す図、
第4図、第5図及び第6図はそれぞれ他の実施例
を示す回路図、第7図は従来のICレギユレータ
を用いた直流定電圧回路の回路図、第8図は第7
図の回路のパラメータの変動分を示す図である。
1:入力端子、2:出力端子、1′,2′:共
通端子、3:被安定化電源、4:負荷、5,7,
7a,7b,8,10:抵抗器、6:ICレギユ
レータ、9:トランジスタ、11:定電圧ダイオ
ード。
Figure 1 is a circuit diagram showing an embodiment of this invention, Figure 2 is a circuit diagram showing an embodiment of this invention.
The figure shows the variation of voltage, current, and other parameters in the embodiment of FIG. 1, and FIG. 3 shows the equivalent circuit of FIG. 1 using a virtual IC regulator.
4, 5, and 6 are circuit diagrams showing other embodiments, FIG. 7 is a circuit diagram of a DC constant voltage circuit using a conventional IC regulator, and FIG. 8 is a circuit diagram of a DC constant voltage circuit using a conventional IC regulator.
FIG. 3 is a diagram showing variations in parameters of the circuit shown in the figure. 1: Input terminal, 2: Output terminal, 1', 2': Common terminal, 3: Stabilized power supply, 4: Load, 5, 7,
7a, 7b, 8, 10: resistor, 6: IC regulator, 9: transistor, 11: constant voltage diode.
Claims (1)
源が接続され、出力端子と共通端子との間に負荷
が接続される定電圧回路において、 上記入力端子と出力端子との間に抵抗器が接続
され、 その出力端と上記共通端子との間にトランジス
タとカソード、アノード及びゲートをもつ並列レ
ギユレータIC素子との直列回路が接続され、 上記出力端子及び共通端子との間に出力電圧分
圧用回路が接続され、 その分圧端が上記IC素子のゲートに接続され
、 上記トランジスタの制御端子にバイアスを与え
る手段が設けられている直流定電圧回路。[Claims for Utility Model Registration] In a constant voltage circuit in which a stabilized DC power supply is connected between an input terminal and a common terminal, and a load is connected between an output terminal and a common terminal, A resistor is connected between the output terminal and the common terminal, and a series circuit of a transistor and a parallel regulator IC element having a cathode, an anode, and a gate is connected between the output terminal and the common terminal. An output voltage voltage dividing circuit is connected between the output voltage dividing circuit, the voltage dividing terminal thereof being connected to the gate of the IC element, and means for applying a bias to the control terminal of the transistor.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7312085U JPS61189312U (en) | 1985-05-17 | 1985-05-17 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7312085U JPS61189312U (en) | 1985-05-17 | 1985-05-17 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS61189312U true JPS61189312U (en) | 1986-11-26 |
Family
ID=30612183
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7312085U Pending JPS61189312U (en) | 1985-05-17 | 1985-05-17 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61189312U (en) |
-
1985
- 1985-05-17 JP JP7312085U patent/JPS61189312U/ja active Pending