JPS61188163A - Recording electric energy controller - Google Patents

Abstract

PURPOSE:To enable a recording to be always conducted with constant density even if a recording voltage largely flucturates, by a method wherein the drive of a recording element is controlled by a comparison signal between an accumulated electric energy and a reference electric energy and by a signal maintaining a phase a half cycle behind that of the sampling cycle of the recording voltage. CONSTITUTION:A drive circuit 12 applies a recording voltage RV to a heating resistance element 11 during a recording pulse PW keeps H level. Both the first clock signal SCLK1 sampling the recording voltage RV and the second clock signal SCLK2 trailing the recording pulse PW have the cycle T, and are offset by a half cycle with each other. Accordingly, in the range of the cycle T, the errors M are produced, respectively caused from the shortage of an electric energy Pt in the former half thereof and the excess of the electric energy Pt in the latter half thereof, against the electric energy supplied to the heating resistance element 11. As the errors M are substantially cancelled each other out, the electric energy essentially identical to the accumlated electric energy SIGMAPt as a whole is supplied to the heating resistance element 11 to perform the recording on a thermal recording medium with the fixed density.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a recording power amount control device in a thermal recording device or the like.

Prior Art FIG. 3 is a block diagram of a conventional thermosensitive recording device. In this figure, 1 is a heating resistor element, 2 is a drive circuit that applies a recording voltage nv to the heating resistor element 1, and 3 is a heating resistor element 1.
An analog/digital converter 6 samples the recording voltage RV applied to the timer 4 with a sampling clock 5cLx' having a period T outputted from the timer 4, quantizes it, and outputs it as a quantized voltage DV. A voltage-to-power converter 6 converts the power into power and outputs it as power pt, and 6 sequentially accumulates the power pt to obtain cumulative power Σ-.
An accumulator outputting as pt, 7 is the cumulative power amount Σpt
and a predetermined reference power amount W input from the terminal 16, and when the cumulative power amount Σpt matches the reference power amount W, a comparator outputs a recording end signal END; 8 is a recorder input from the terminal 9; This is an RS flip-flop that is set by the start signal TRG and reset by the recording end signal END, and outputs a recording pulse PW to the drive circuit 2.

Figure 4 shows the signal waves of each part of the thermal recording device of Figure 3, where a is the recording voltage Rv, b is the sampling clock 5QLIC, c is the recording start signal TRG, d is the recording pulse PW, e is the sampling voltage input DV, f is the power amount Pt, g is the cumulative power amount Σpt, h is the recording end signal RID
It is.

Next, the operation of the conventional thermal recording apparatus will be explained based on FIGS. 3 and 4.

When the recording start signal TRG is input to the RS flip-flop 8, the recording pulse pw rises and energizes the heat generating resistor element 1, and at the same time, the tie "74 starts and generates the sampling clock 5CLK with a period T. This clock 5C
The recording voltage RV is sampled by the analog-to-digital converter 3 in synchronization with LK, and is output as a sampling voltage Dv. The sampling voltage DV is converted by the voltage-power converter 6 into i power pt corresponding to one period of the same phase as the one sampled above, and then accumulated by the accumulator 6 and outputted as the cumulative power ΣPt7.

The power amount pt is given as pt=(muDV), T/R from the quantized voltage input Dv, the period T' of the sampling clock SOLK, and the resistance value R of the thermal resistance element 1, which is the period T. It is approximated as the amount of power supplied to the heating resistor element 1 during this period. (See Figure 4 a, r) The comparator 7 compares each time whether the cumulative power amount ΣPt of the accumulator 6 has reached a predetermined reference power amount WK, and calculates the cumulative power amount Σpt.
When the power reaches the reference power J, a recording end signal END is output and R
Reset the S flip-flop 8 and record the recording pulse 2PW.
is lowered to stop energizing the heating resistor element 1.

As described above, while the recording pulse PW maintains HL/Bell, the drive circuit 2 applies a recording voltage to the heating resistive element 1 to cause the thermal recording device to develop color.

Problems to be Solved by the Invention However, in this type of conventional recording power amount control device, the sampling voltage Dv is converted into the power amount pt, and the accumulator 6 calculates the accumulated power amount ΣPt (!-j- , an error F shown by the shaded area in FIG. 4f occurs between the recording power amount actually supplied to the heating resistor element 1 and the cumulative power amount Σpt, and as a result, density unevenness occurs in the recorded image. As is clear from FIG. 4, this error F becomes larger as the fluctuation of the recording voltage RV becomes larger, and the density unevenness of the recorded image becomes more pronounced.

To solve the above problem, the error F can be reduced by shortening the sampling period T of the recording voltage.

However, in this case, the analog-to-digital converter 3. It is necessary to increase the operating speed of the voltage-to-energy converter 6 and the accumulator 6, which results in a new problem that increases the cost of the device, which is not a suitable solution.

The present invention has been made to solve the above problems.
An object of the present invention is to provide a recording power amount control device that can always record at a stable density even when there are large fluctuations in recording voltage, and that can reduce costs.

Means for Solving the Problems In order to achieve the above object, the present invention provides a recording element, a first clock signal for recording voltage sampling, and a clock signal that has the same period and a half period with respect to the first clock signal. A timer that outputs a second clock signal for timing operation with a different phase; and a timer that samples the recording voltage in synchronization with the first clock signal, and applies this sampling voltage/voltage to the first clock signal.
clock signal.

A means for converting this electric energy into an amount of electric power according to the timing of E, a means for outputting this accumulated electric energy, and a means for outputting the cumulative electric energy according to the timing of E. and means for controlling the driving means in synchronization with the second clock signal based on the second clock signal.

Function The present invention samples the recording voltage applied to the recording element at a predetermined period during the driving period of the recording element, accumulates the amount of electric power calculated based on the sampled recording voltage, and calculates the amount of electric power calculated based on the sampled recording voltage. and a predetermined reference power amount, and based on this comparison signal, the drive of the recording element is controlled in synchronization with a clock signal having a half-cycle phase different from the sampling cycle of the recording voltage. The difference between the cumulative power amount and the recording power amount is canceled within one period of . Therefore, even if there are large fluctuations in the recording voltage, it is possible to supply the recording element with an amount of power that is approximately equal to the reference amount of power.
A stable recording density can always be obtained.

Embodiment FIG. 1 is a block diagram of a recording power amount control device according to an embodiment of the present invention. In this figure, 11 is a heating resistor element which is a recording element, and 12 is a recording voltage RV applied to the heating resistor element 11.
A drive circuit 14, which is a drive means for applying a voltage, is activated by a recording start signal TRG inputted from a terminal 19, and outputs a first clock signal 5CIJ1° for recording voltage sampling and a second clock signal 5CIJ1° for timing operation, which are shifted by a half cycle from each other. 3o is a cumulative power amount output means, and 4o is a drive circuit control means.

The cumulative power output means 30 converts the recording voltage RV applied to the heating resistor element 11 into a first clock signal 5CLK1.
an analog/digital converter 13 that samples the sampling voltage DV and outputs the sampling voltage DV; and a voltage-power converter 13 that calculates and outputs a power amount pt that matches the timing of the first clock signal from the quantized voltage DV. converter 16
and an accumulator 16 that sequentially accumulates the power amount pt and outputs it as a cumulative power amount Σpt.

The drive circuit control means 40 compares the cumulative power amount Σpt with a predetermined reference power amount W input from the terminal 2o, and sets a recording end signal END when the cumulative power amount Σpt matches the reference power amount W. A comparator 17 resets the recording end signal END with a recording start signal TRG inputted from the terminal 19, and a recording start signal T inputted from the terminal 19.
RG, and the output signal F of the AND gate circuit 21
It includes an R8 flip-flop 18 that is reset by IN and outputs a recording pulse PW to the drive circuit 12, and an AND gate circuit 21 that inputs a second clock signal 5CLK2 and a recording end signal ICND and outputs a signal IIN. .

FIG. 2 is a signal waveform diagram of each part of the thermal recording apparatus shown in FIG. 1. In this figure, a is the recording voltage RV, b is the recording start signal TRG, c is the first clock signal 5CLK1, and d is the second clock signal SCLK1 which is shifted by half a period.
clock signal 5CLK2, e is the recording pulse pw, r is the quantization voltage DV, g is the power amount pt, and h is the cumulative power amount Σ
Pt, i is the recording end signal END, and j is the output signal FIN of the AND gate circuit 21.

The operation of the recording power amount control device will be explained based on FIGS. 1 and 2.

When the recording start signal TRG is input to the RS flip-flop 18, the recording pulse pw rises, and the recording end signal END of the comparator 17 is reset.

When the recording pulse PW rises, the drive circuit 12 is turned on,
At the same time as the heating resistor element 11 is energized, the timer 14 is started, and the first clock signal 5CLK1 and the second clock signal 5CL, which are out of phase with each other by half a cycle, are output.
K2 is generated.

The analog/digital converter 13 samples the recording voltage RV using the first clock signal 5CLK1 and outputs it as a sampling voltage DV. The sampling voltage DV is further converted into a power amount pt by a voltage-power converter 16, and then accumulated by an accumulator 16 and output as a cumulative power amount Σpt. In addition, the above power -161p
t is the sampling voltage input DV, the first clock signal S
CI, is given as Pt=(ADV),T/R from the period T of 1 and the resistance value R of the heating resistor 11, which means that during the period T, the heating resistor 11
is considered to be the amount of electricity supplied to (See Figure 2 r and g) The comparator 17 compares whether the cumulative power amount Σpt has reached a predetermined reference power amount W each time, and issues a recording end signal when the cumulative power amount Σpt reaches the reference power amount W. Set END. A
The ND gate circuit 21 outputs the signal FIN when the recording end signal END rises and the first second clock signal 5CLK2 is output, and the ND gate circuit 21 outputs the signal FIN,
8, the recording pulse pw is lowered, and the current supply to the heating resistor element 11 is stopped.

As described above, the drive circuit 12 applies the recording voltage RV to the heating resistor element 11 while the recording pulse PW maintains the H level. At this time, both the first clock signal 5CLK1 for sampling the recording voltage RV and the second clock signal 5CLK2 for decreasing the recording pulse pw have a period T.
, and are shifted by half a cycle from each other. According to FIG. An error M occurs that can be considered insufficient in the second half of the cycle and excessive in the second half of the cycle. Note that this error M almost cancels out each other within the range of the period T. As a result, a total amount of power that is approximately equal to the cumulative amount of power Σpt is supplied to the heating resistive element 11, and recording at a predetermined density is performed on the heat-sensitive recording medium. Even when the recording voltage fluctuates greatly, the insufficient power amount and the excess power amount cancel each other out within the period T, so that recording at a predetermined density can be performed.

Note that the setting of the reference electric energy W input to the comparator 1a is as follows:
The temperature of the thermal head, the temperature of the surrounding atmosphere, and the resistance value and drive cycle of the heat generating resistor element can be taken into account and changed.

Further, the conversion characteristics of the voltage-to-power converter 15 can also be changed by the resistance value of the heating resistor element.

Effects of the Invention According to the present invention, the recording voltage is sampled at predetermined time intervals during the driving period of the recording element, the recording power amount calculated based on the sampling voltage is accumulated, and this accumulated power amount and the predetermined amount are This comparison signal is compared with the reference electric energy, and
Since the driving of the recording element is controlled using a signal whose phase is half a cycle different from the sampling period of the recording voltage, even when the fluctuation of the recording voltage is large, it is possible to supply almost the same amount of power to the recording element as the reference power amount. As a result, stable recording density can always be obtained, and there is no need to intentionally shorten the sampling period.It is equipped with an analog-to-digital converter, a voltage-to-power converter, and an accumulator that operate at high speed.
Since it is not cheap, it has the effect of reducing the cost of the device.

[Brief explanation of drawings]

FIG. 1 is a pro-rough diagram of a thermal recording device according to an embodiment of the present invention, FIG. 2 is a signal waveform diagram of each part in the same figure, FIG. 3 is a block diagram of a conventional thermal recording device, and FIG. 4 is the same figure. FIG. 3 is a signal waveform diagram of each part of FIG. 11...Heating resistance element (recording diode), 12...
...Drive circuit (drive means), 13.Analog-digital converter, 14.Timer, 15.Mountain.
・Voltage-to-energy converter, 16... Accumulator, 17
...Comparator, 18...RS flip-flop, 21...AND gate circuit, 3o...
. . . Cumulative power output means, 4° . . . Drive circuit control means. Name of agent: Patent attorney Toshio Nakao and 1 other person 2nd
figure

Claims (1)

[Claims] A driving means for applying a recording voltage to a recording element, a first clock signal for sampling the recording voltage, and a second clock for timing operation having the same period and a half-cycle phase different from the first clock signal. a timer that outputs a signal; a means for sampling a recording voltage in synchronization with the first clock signal and converting the sampling voltage into an amount of power according to the timing of the first clock signal;
means for accumulating the electric energy and outputting the accumulated electric energy;
A recording power amount control device comprising means for comparing the accumulated power amount with a preset reference power amount and controlling the driving means in synchronization with the second clock signal based on the comparison signal. .