JPH0418552B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a recording power amount control device in a thermal recording device or the like.

Prior Art FIG. 3 is a block diagram of a conventional thermosensitive recording device. In this figure, 1 is a heating resistor element, 2 is a drive circuit that applies a recording voltage RV to the heating resistor element 1, and 3 is a recording voltage applied to the heating resistor element 1.
An analog-to-digital converter samples RV with the sampling clock SCLK of period T output from timer 4, quantizes it, and outputs it as a quantized voltage ADV; 5 converts the quantized voltage ADV into electric energy and converts it into electric energy 6 is an accumulator that sequentially accumulates the above-mentioned power amount Pt and outputs it as cumulative power amount ΣPt; 7 is a predetermined reference power amount inputted from the above-mentioned cumulative power amount ΣPt and terminal 10; A comparator 8 outputs a recording end signal END when the accumulated electric energy ΣPt matches the reference electric energy W, and is set by the recording start signal TRG input from the terminal 9, and outputs the recording end signal END.
This is an RS flip-flop which is reset by the RS flip-flop and outputs a recording pulse PW to the drive circuit 2.

FIG. 4 shows the signal waveforms of each part of the thermal recording device shown in FIG. 3, where a is the recording voltage RV, b is the sampling clock SCLK, and c is the recording start signal.
TRG, d is pulse PW, e is sampling voltage
ADV, f is electric energy pt, g is cumulative electric energy ΣPt, h
is the recording end signal END.

Next, the operation of the conventional thermal recording apparatus will be explained based on FIGS. 3 and 4.

When the recording start signal TRG is input to the RS flip-flop 8, the recording pulse PW rises, energizing the heating resistor element 1, and the timer 4 starts to generate a sampling clock SCLK of period T. Recording voltage RV is synchronized with this clock SCLK.
is sampled by the analog-to-digital converter 3 and output as a sampling voltage ADV. After the sampling voltage ADV is converted by the voltage-to-power converter 5 into a power amount Pt corresponding to the same phase and period as the sampled one,
The accumulator 6 accumulates the power and outputs it as a cumulative power amount ΣPt. Note that the above power amount Pt is the quantization voltage ADV,
From the period T of the sampling clock SCLK and the resistance value R of the heating resistor element 1, it is given as Pt = (ADV) ²・T/R, which is approximated as the amount of power supplied to the heating resistor element 1 during the period T. be done. (See Figures 4e and f) The comparator 7 compares each time whether the cumulative power amount ΣPt of the accumulator 6 has reached the predetermined reference power amount W, and determines whether the cumulative power amount ΣPt has reached the reference power amount W. Then, the recording end signal END is output, the RS flip-flop 8 is reset, the recording pulse PW is lowered, and the heating resistor element 1 is turned off.
Stop energizing.

As described above, while the recording pulse PW maintains the H level, the drive circuit 2 drives the heating resistor element 1.
A recording voltage is applied to cause the thermosensitive recording medium to develop color.

Problems to be Solved by the Invention However, in this type of conventional recording power amount control device, when converting the sampling voltage ADV into the power amount Pt and calculating it as the accumulated power amount ΣPt in the accumulator 6, the heating resistor element is actually used. An error F shown in the shaded area in FIG. 4f occurs between the recording power amount supplied to the recording power source 1 and the cumulative power amount ΣPt, and as a result, density unevenness occurs in the recorded image. As is clear from FIG. 4, this error F becomes larger as the fluctuation of the recording voltage RV becomes larger, and the density unevenness of the recorded image becomes more pronounced.

To solve the above problem, the error F can be reduced by shortening the sampling period T of the recording voltage. However, in this case, it is necessary to increase the operating speed of the analog-to-digital converter 3, the voltage-to-energy converter 5, and the accumulator 6.
As a result, a new problem arises in that the cost of the device increases significantly, and this cannot be an appropriate solution.

The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to provide a recording power amount control device that can always record at a stable density even when there are large fluctuations in recording voltage, and that can reduce costs. With the goal.

Means for Solving the Problems In order to achieve the above object, the present invention provides a recording element, a first clock signal for recording voltage sampling, and a clock signal having the same period and half period with respect to the first clock signal. a timer that outputs a second clock signal for timing operation having different phases;
means for sampling the recording voltage in synchronization with the first clock signal and converting the sampled voltage into a power amount according to the timing of the first clock signal; and means for accumulating this power amount and outputting the accumulated power amount. , means for comparing the accumulated power amount with a preset reference power amount and controlling the driving means in synchronization with the second clock signal based on the comparison signal.

Function The present invention samples the recording voltage applied to the recording element at a predetermined period during the driving period of the recording element, accumulates the amount of electric power calculated based on the sampled recording voltage, and accumulates the amount of electric power calculated based on the sampled recording voltage. and a predetermined reference power amount, and based on this comparison signal,
Since the drive of the recording element is controlled in synchronization with a clock signal having a half-cycle phase different from the sampling cycle of the recording voltage, the difference between the cumulative power amount and the recording power amount is canceled within one sampling period. Ru. Therefore, even if there is a large fluctuation in the recording voltage, it is possible to supply the recording element with an amount of power that is approximately equal to the reference amount of power, and it is possible to always obtain a stable recording density.

Embodiment FIG. 1 is a block diagram of a recording power amount control device according to an embodiment of the present invention. In this figure, 11 is a heating resistance element which is a recording element, 12 is a drive circuit which is a driving means for applying a recording voltage RV to the heating resistance element 11, and 14 is activated by a recording start signal TRG input from a terminal 19. First clock signal SCLK for recording voltage sampling shifted by half a period from each other
1 and a timer that outputs a second clock signal SCLK2 for timing operation, 30 is cumulative power output means, and 40 is drive circuit control means.

The cumulative power output means 30 includes an analog-to-digital converter 13 that samples the recording voltage RV applied to the heating resistive element 11 using the first clock signal SCLK1 and outputs the sampling voltage ADV, and the quantized voltage ADV. a voltage-to-power converter 15 that calculates and outputs the power amount Pt in accordance with the timing of the first clock signal; and an accumulator 16 that sequentially accumulates the power amount Pt and outputs it as a cumulative power amount ΣPt. It is equipped with

The drive circuit control means 40 compares the cumulative power amount ΣPt with a predetermined reference power amount W input from the terminal 20, and sets a recording end signal END when the cumulative power amount ΣPt matches the reference power amount W. The comparator 17 resets the recording end signal END with the recording start signal TRG inputted from the terminal 19, and the comparator 17 resets the recording end signal END with the recording start signal TRG inputted from the terminal 19, and resets it with the output signal FIN of the AND gate circuit 21. , an RS flip-flop 18 that outputs a recording pulse PW to the drive circuit 12, and an AND gate circuit 21 that receives a second clock signal SCLK2 and a recording end signal END and outputs a signal FIN.

FIG. 2 is a signal waveform diagram of each part of the thermal recording apparatus shown in FIG. 1. In this figure, a is the recording voltage
RV, b is the recording start signal TRG, c is the first clock signal SCLK1, d is the first clock signal SCLK
a second clock signal SCLK2 shifted by 1 and a half period;
e is recording pulse PW, f is quantization voltage ADV, g
is the electric power amount Pt, h is the cumulative electric power amount ΣPt, i is the recording end signal END, and j is the output signal of the AND gate circuit 21
It is FIN.

The operation of the recording power amount control device will be explained based on FIGS. 1 and 2.

Recording start signal TRG to RS flip-flop 18
When input, the recording pulse PW rises and the recording end signal END of the comparator 17 is reset.
When the recording pulse PW rises, the drive circuit 12 is activated.
When turned ON, the timer 14 starts and generates a first clock signal SCLK1 and a second clock signal SCLK2 whose phases are shifted by half a period from each other.

The analog-to-digital converter 13 samples the recording voltage RV using the first clock signal SCLK1 and outputs it as a sampling voltage ADV.
After the sampling voltage ADV is further converted into power Pt by the voltage-to-power converter 15,
The accumulator 16 accumulates it and outputs it as a cumulative power amount ΣPt. Note that the above power amount Pt is determined by the sampling voltage ADV and the period T of the first clock signal SCLK1.
and the resistance value R of the heating resistor element 11, it is given as Pt=(ADV) ² ·T/R, and this is regarded as the amount of power supplied to the heating resistor element 11 during the period T. (Second
(See Figures f and g) The comparator 17 compares each time whether the cumulative power amount ΣPt has reached a predetermined reference power amount W, and when the cumulative power amount ΣPt reaches the reference power amount W, it issues a recording end signal.
Set END. The AND gate circuit 21 outputs a signal when the recording end signal END rises and the first second clock signal SCLK2 is output.
It outputs FIN, resets the RS flip-flop 18, lowers the recording pulse PW, and stops energizing the heating resistor element 11.

As described above, while the recording pulse PW maintains the H level, the drive circuit 12 applies the recording voltage RV to the heat generating resistor element 11. At this time, the first clock signal sampling the recording voltage RV
SCLK1 and the second clock signal SCLK2 that lowers the recording pulse PW both have a period T and are shifted by half a period from each other. On the other hand, according to Fig. 2g, the electric power Pt is insufficient in the first half of the cycle, and the error M is considered to be excessive in the second half of the cycle.
occurs. Note that this error M almost cancels out each other within the range of the period T. As a result, a total amount of power that is approximately equal to the cumulative amount of power ΣPt is supplied to the heating resistive element 11, and recording at a predetermined density is performed on the heat-sensitive recording medium. Even when the recording voltage fluctuates greatly, the insufficient power amount and the excess power amount cancel each other out within the period T, so that recording at a predetermined density can be performed.

Note that the setting of the reference power amount W input to the comparator 17 can be changed in consideration of the temperature of the thermal head, the surrounding atmosphere temperature, the resistance value of the heating resistor element, the driving cycle, etc.

Furthermore, the conversion characteristics of the voltage-to-energy converter 15 can also be changed by the resistance value of the heating resistor element.

Effects of the Invention According to the present invention, the recording voltage is sampled at predetermined time intervals during the driving period of the recording element, the recording power amount calculated based on the sampling voltage is accumulated, and the cumulative power amount and the predetermined amount are Since the drive of the recording element is controlled using this comparison signal and a signal whose phase differs by half a cycle from the sampling period of the recording voltage, even when the fluctuation of the recording voltage is large, the reference power It is possible to supply almost the same amount of power to the recording element as the amount of power, which allows stable recording density to be obtained at all times.Also, there is no need to intentionally shorten the sampling period, and analog to digital converters with high operating speed, voltage-to-power converters, etc. Since there is no need to provide a quantity converter and an accumulator, there is an effect that the cost of the device can be reduced.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a thermal recording device according to an embodiment of the present invention, FIG. 2 is a signal waveform diagram of each part in the same figure, and FIG. 3 is a block diagram of a conventional thermal recording device.
FIG. 4 is a signal waveform diagram of each part in the figure. 11...Heating resistance element (recording element), 12...
Drive circuit (drive means), 13... Analog-digital converter, 14... Timer, 15... Voltage -
Energy converter, 16...Accumulator, 17...Comparator, 18...RS flip-flop, 21...
AND gate circuit, 30...cumulative power output means,
40... Drive circuit control means.

Claims (1)

[Claims] 1 a driving means for applying a recording voltage to a recording element;
a timer that outputs a first clock signal for recording voltage sampling and a second clock signal that is output at the same period as the first clock signal but with a half-cycle phase different; and the first clock signal. Sample the recording voltage in synchronization with
cumulative power output means that calculates the power given in the period of the first clock signal based on the sampling voltage and sequentially outputs the cumulative power, and the cumulative power reaches a preset reference power; 1. A recording power amount control device comprising a comparison means for comparing whether or not the recording has been performed, and a control means for controlling the drive means in synchronization with the second clock signal based on the output from the comparison means.