JPS61187227A - Formation of amorphous carbon semiconductor film - Google Patents
Formation of amorphous carbon semiconductor filmInfo
- Publication number
- JPS61187227A JPS61187227A JP2742785A JP2742785A JPS61187227A JP S61187227 A JPS61187227 A JP S61187227A JP 2742785 A JP2742785 A JP 2742785A JP 2742785 A JP2742785 A JP 2742785A JP S61187227 A JPS61187227 A JP S61187227A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02381—Silicon, silicon germanium, germanium
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/0242—Crystalline insulating materials
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02425—Conductive materials, e.g. metallic silicides
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02527—Carbon, e.g. diamond-like carbon
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/0257—Doping during depositing
- H01L21/02573—Conductivity type
- H01L21/02576—N-type
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/0257—Doping during depositing
- H01L21/02573—Conductivity type
- H01L21/02579—P-type
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
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- Materials Engineering (AREA)
- Crystallography & Structural Chemistry (AREA)
- Formation Of Insulating Films (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明はアモルファス炭素半導体膜の形成方法に係わる
。DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to a method for forming an amorphous carbon semiconductor film.
膜状ダイヤモンドは、耐摩耗性及び電気絶縁性にすぐれ
、更に熱伝導度が高いことから、各種機械加工具の刃面
のコーテイング材、或いは大型の半導体集積回路基板、
いわゆるLSI基板の絶縁性放熱体として有望な材料で
ある。Membrane diamond has excellent wear resistance and electrical insulation properties, as well as high thermal conductivity, so it is used as a coating material for the blade surfaces of various machining tools, large semiconductor integrated circuit boards,
It is a promising material as an insulating heat sink for so-called LSI substrates.
この膜状ダイヤモンドを工業的に形成する方法としては
、数Torr以下の水素(H2)をベースとし、これに
メタン(CH4)を数%混合したガスを用いこれを交流
または直流のプラズマ放電を利用して分解し、この分解
によって生成した炭素(C)を、500〜600℃程度
の比較的高い温度に加熱した状態の基板、例えば耐熱性
の金属基板上に多結晶膜として堆積させるという低圧反
応法が開発されている。The method for industrially forming this film-like diamond is to use hydrogen (H2) as a base gas of several Torr or less, mixed with a few percent of methane (CH4), and to use alternating current or direct current plasma discharge. This is a low-pressure reaction in which the carbon (C) produced by this decomposition is deposited as a polycrystalline film on a substrate heated to a relatively high temperature of about 500 to 600°C, such as a heat-resistant metal substrate. laws are being developed.
このような、ソースガスを、膜の形成に必要な炭素の供
給源とした場合、膜の生成過程において、堆積する炭素
は、s p 3結合から成るダイヤモンド構造とs p
2結合から成るグラファイト構造を作り、これらが混在
して堆積する。しかし、充分な水素分圧のもとで、且つ
基体が加熱されている場合には、グラファイト構造は再
び炭素に分解し易いためダイヤモンド構造から成る多結
晶膜として選択的に成長されることが知られている。When such a source gas is used as a source of carbon necessary for film formation, during the film formation process, the deposited carbon has a diamond structure consisting of sp 3 bonds and sp
A graphite structure consisting of two bonds is created, and these are deposited in a mixed manner. However, it is known that under sufficient hydrogen partial pressure and when the substrate is heated, the graphite structure easily decomposes into carbon again, so that a polycrystalline film consisting of a diamond structure is selectively grown. It is being
このようにして形成された膜状ダイヤモンドは、不純物
がソースガスのベースとなっている水素によって還元除
去されることによって前述したように高い絶縁性を示す
。The film-like diamond thus formed exhibits high insulating properties as described above because impurities are reduced and removed by hydrogen, which is the base gas of the source gas.
一方、ダイヤモンドにおいて、キャリアの移動度は、電
子及び正孔の両者に関して同程度の移動度を示すことな
どから、上述した膜状ダイヤモンドの電子装置、特に半
導体装置への適用が期待されるものであり、これがため
、上述の膜状ダイヤモンドに制御された濃度をもって不
純物ドープを行って所要の導電率を有する半導体特性を
持たしめることが要求される。On the other hand, in diamond, the mobility of carriers is similar to that of both electrons and holes, so the above-mentioned film-like diamond is expected to be applied to electronic devices, especially semiconductor devices. Therefore, it is required that the film-like diamond described above be doped with impurities at a controlled concentration to impart semiconductor properties with the required electrical conductivity.
ところが上述の膜状ダイヤモンドにおいては、不純物が
水素で還元除去されることから不純物ドープを行うこと
ができないものであって、半導体特性を呈せしめること
ができない。However, in the film-like diamond described above, since the impurities are reduced and removed by hydrogen, it cannot be doped with impurities and cannot exhibit semiconductor characteristics.
本発明は、再現性よく廉価に、工業的に形成することの
できるアモルファス炭素半導体膜の形成方法を提供する
。The present invention provides a method for forming an amorphous carbon semiconductor film that can be formed industrially with good reproducibility and at low cost.
本発明は、 100%のアセチレンに1%以下の不純物
を含ましめたソースガスを用い、これを例えば0.IT
orrの圧力とし、例えば250 ’C程度以下と□
いう比較的低い温度に加熱された基体表面上、すなわち
基体表面ないしはその掻く近傍で電子ビーム照射によっ
て分解して基体表面に不純物がドープされた、すなわち
、p塑成いはn型の半導体特性を示すアモルファス炭素
半導体膜を形成する。In the present invention, a source gas containing 100% acetylene and 1% or less of impurities is used. IT
orr pressure, for example, about 250'C or less □
Impurities are doped onto the substrate surface by electron beam irradiation at or near the substrate surface heated to a relatively low temperature, i.e., p-plastic or n-type semiconductor characteristics are formed. The amorphous carbon semiconductor film shown in FIG.
尚、このようにして得た膜は、s p 3結合構造を有
し、また半導体特性を有するものであることを確認した
。It was confirmed that the film thus obtained had an sp 3 bond structure and had semiconductor properties.
上述の本発明方法によれば、低い基体温度でs p 3
結合構造の炭素膜を形成することができるのは、ソース
ガスとしてアセチレン(II−CミC−11>をベース
として用いたこと、つまり炭素の3重結合を有するソー
スガスを用い、これを電子ビーム照射によって基体表面
ないしはその極く近傍で分解して、基体表面に炭素膜を
生成させるようにしたことによってs p 3結合の炭
素膜が生じ易い状態が作られたことによると思われる。According to the method of the present invention described above, s p 3 at a low substrate temperature
The carbon film with a bonded structure can be formed by using acetylene (II-CmiC-11> as a base gas), that is, by using a source gas having triple bonds of carbon, and by using this as a source gas with electrons. This is thought to be due to the fact that the beam irradiation decomposes the substrate surface or very close to it to generate a carbon film on the substrate surface, creating a condition in which a carbon film of sp 3 bonds is likely to be formed.
また、本発明方法による場合、n型、或いはp型の不純
物をドープした半導体特性を有する膜の生成が可能にな
ったことば、上述したようにソースガスがアセチレンを
ベースガスとして用いるものであって、水素ガスは不純
物ガスに混入されている程度の微量の水素が存在する程
度としたことによって、不純物の還元排除が生じにくく
なったためと思われる。Furthermore, according to the method of the present invention, it is possible to produce a film doped with n-type or p-type impurities and having semiconductor characteristics. This is probably because the hydrogen gas was set to such a level that a very small amount of hydrogen was mixed in with the impurity gas, making it difficult for the impurities to be removed by reduction.
本発明によるアモルファス炭素半導体膜の形成方法の実
施例を詳細に説明する。Examples of the method for forming an amorphous carbon semiconductor film according to the present invention will be described in detail.
第1図は本発明方法を実施する装置の路線的構成図で、
この場合、真空ポンプに連結されて内部の排気がなされ
る真空容器(1)が設けられる。そして、この容器(1
)内に、表面に目的とする炭素膜の生成を行う基体(2
)を載置し、これを加熱する加熱体(3)を配置する。FIG. 1 is a schematic diagram of an apparatus for carrying out the method of the present invention.
In this case, a vacuum container (1) is provided which is connected to a vacuum pump and whose interior is evacuated. And this container (1
), a substrate (2) on which the desired carbon film is formed on the surface.
), and a heating element (3) for heating this is placed.
この加熱体(3)は、例えば通電加熱ヒータによって構
成される。(4)はそのヒータ電源である、また(5)
は加熱体(3)の温度を検出する熱電対を示す。真空容
器(1)の基体(2)の配置部と対向する部分には窓が
設けられ、ここにメソシュ電極(6)が設けられる。そ
して、このメツシュ電極(6)の配置部を囲んで真空容
器(1)上に絶縁性耐熱周壁(7)によって囲まれた空
間を形成する。周壁(7)の上端には蓋体(8)が載せ
られ、これに、電子ビーム発生源となるフィラメント(
9)が、メツシュ電極(6)を挾んで基体(2)と対向
するように配置される。00)はウェネルト電極である
。(11)は、フィラメント(9)を通電加熱するフィ
ラメント電源で、(12)はフィラメント(9)より発
生させた電子を基体(2)側に所要のエネルギーをもっ
て向わせる電子の加速電源である。また、(13)は、
周壁(7)によって囲まれた空間内にソースガスを送り
込むソースガス導入管を示す。This heating body (3) is constituted by, for example, an energizing heater. (4) is the heater power supply, and (5)
indicates a thermocouple that detects the temperature of the heating element (3). A window is provided in a portion of the vacuum container (1) facing the placement portion of the base (2), and a mesoche electrode (6) is provided here. Then, a space surrounded by an insulating heat-resistant peripheral wall (7) is formed on the vacuum container (1) surrounding the arrangement portion of the mesh electrode (6). A lid (8) is placed on the upper end of the peripheral wall (7), and a filament (8) serving as an electron beam generation source is mounted on this.
9) are arranged to face the base (2) with the mesh electrode (6) in between. 00) is a Wehnelt electrode. (11) is a filament power source that heats the filament (9) with electricity, and (12) is an electron acceleration power source that directs the electrons generated from the filament (9) toward the substrate (2) with the required energy. . Also, (13) is
A source gas introduction pipe is shown that feeds the source gas into the space surrounded by the peripheral wall (7).
この装置において、ソースガス導入管(13)から、
100%のC2H2に、例えばp型不純物源としてのデ
ュボラン(B2H6) 、或いはn型不純源としてのア
ルシン(^S■3)若しくはフォスフイン(PH3)を
添加したソースガスを導入し、このソースガスによる周
壁(7)内の空間の圧力を0.1〜0.05Torrに
保持する。一方、基体(2)の加熱温度Tは、例えば2
50℃前後とし、約200eνの加速電圧で電子ビーム
照射を行う。このようにすると、基体(2)の表面に炭
素膜が生成される。ここに基体(2)は、その加熱温度
が比較的低くて良いことから種々のものを用いることが
でき、MO等の金属、Si等の半導体、SiO2等の絶
縁体等の各種材料の層ないしは基板を用いることができ
る。In this device, from the source gas introduction pipe (13),
A source gas containing, for example, Duvorane (B2H6) as a p-type impurity source, or arsine (^S3) or phosphine (PH3) as an n-type impurity source is introduced into 100% C2H2, and the The pressure in the space within the peripheral wall (7) is maintained at 0.1 to 0.05 Torr. On the other hand, the heating temperature T of the substrate (2) is, for example, 2
Electron beam irradiation is performed at a temperature of about 50° C. and an acceleration voltage of about 200 eν. In this way, a carbon film is generated on the surface of the base (2). Here, the substrate (2) can be made of various materials since the heating temperature thereof is relatively low, and may be a layer of various materials such as a metal such as MO, a semiconductor such as Si, an insulator such as SiO2, etc. A substrate can be used.
上述の方法によって不純物ガスとしてB2O6を用いて
ほう素(B)を2500ppmトープした半導体膜は、
正孔濃度が3〜5 ×1017/ crlで、6〜4c
J/V−secの移動度が得られた。そして、この場合
の膜の成長速度は2〜3人/secであった。The semiconductor film doped with 2500 ppm of boron (B) using B2O6 as an impurity gas by the above method is as follows:
Hole concentration is 3-5 x 1017/crl, 6-4c
A mobility of J/V-sec was obtained. The growth rate of the film in this case was 2 to 3 people/sec.
また、上述の方法において、ソースガスに不純物源を添
加することなく膜生成を行った。この場合、基体(2)
としてSi基板を用い、基体温度を250℃にし、ガス
圧を0. ITorrとし、電子ビームの加速電圧を2
00vとした。このようにして得た膜の赤外線吸収スペ
クトルを第2図に示す。このスペクトルにより5p3C
−11と、5p3C−82の結合を示す波数2915カ
イザーと2855カイザーの強い吸収が確認される。ま
た、このときの膜の抵抗率ρは2 X 1012Ω・c
m、誘電率は2.8、光学的エネルギーギャップは1.
6eVとなったが、この膜の形成時の基体温度を300
“C以上とするときは、生成された膜は、その抵抗率ρ
、並びに光学的エネルギーギヤツブEoが急激に低下し
、5p2G−)1の結合を示す1590カイザーで赤外
線吸収が生じ、膜はグラファイト構造になることが分か
った。今、基体温度を変化させて夫々得られた膜の抵抗
率ρと光学的エネルギーギャップの各測定結果を夫々第
3図及び第4図に示す。Further, in the above method, film formation was performed without adding an impurity source to the source gas. In this case, the substrate (2)
Using a Si substrate, the substrate temperature was set to 250°C, and the gas pressure was set to 0. ITorr, and the acceleration voltage of the electron beam is 2.
It was set to 00v. FIG. 2 shows the infrared absorption spectrum of the film thus obtained. This spectrum shows that 5p3C
-11 and strong absorption at wave numbers 2915 Kaiser and 2855 Kaiser indicating the binding of 5p3C-82. Also, the resistivity ρ of the film at this time is 2 × 1012Ω・c
m, dielectric constant is 2.8, optical energy gap is 1.
6 eV, but the substrate temperature at the time of forming this film was set to 300
“When the resistivity is higher than C, the resistivity of the produced film is ρ
, and the optical energy gear Eo decreased rapidly, and infrared absorption occurred at 1590 Kaiser showing a 5p2G-)1 bond, indicating that the film had a graphite structure. Now, the measurement results of the resistivity ρ and the optical energy gap of the films obtained by varying the substrate temperature are shown in FIGS. 3 and 4, respectively.
第3図のものは、基体として門。基板を用い、ソースガ
スとして不純物を含まないC2H2ガスを0.ITor
rとし、照射する電子ビームの加速電圧を200vとし
た場合、第4図のものは、基体としてガラス板を用い、
同様にソースガスとして不純物を含まないC2H2ガス
をO,1Torr 、加速電圧を200Vとした場合で
、これらによれば基体温度300℃程度以上で著しく光
学的エネルギーギャップ及び抵抗率の低下がみられてい
る。これは、高い基体温度でs p2結合構造、すなわ
ちグラファイト構造が生じてくることによると思われる
。そして、膜中のSρ3cmn結合の存在は、アモルフ
ァスダイヤモンド構造の可能性を示すものであり、その
実在を確認する有力な方法として■族のほう素(B)、
或いは■族の砒素(^S)もしくはりん(P)を不純物
として膜中にドープし、夫々をp型またはn型半導体特
性の発現による実証が考えられるが、前述したように、
膜中に2500ppmドープしたほう素(B)は禁上帯
の下端より0.03〜0.1eVの位置にアクセプタ準
位を形成し、電気的特性を測定した結果、正孔濃度は3
〜5 X 1017/ cJ 、ホール移動度は6〜4
cJ/ V−secとなった。尚、この膜中のBの濃
度は、オージェ電子分光法で確認したものであり、この
ドープ量は、ソースガスに混入したB2O6濃度から予
測した値と極めて良く一致した。このようにして本発明
方法によって得た膜は、アモルファスダイヤモンド膜で
あるとすることができるものである。The one in Figure 3 has a gate as its base. Using a substrate, impurity-free C2H2 gas was used as a source gas at 0. ITor
r, and the acceleration voltage of the irradiated electron beam is 200V, the one in Figure 4 uses a glass plate as the base,
Similarly, when C2H2 gas containing no impurities was used as the source gas at O, 1 Torr and the acceleration voltage was 200V, a significant decrease in the optical energy gap and resistivity was observed when the substrate temperature was about 300°C or higher. There is. This is thought to be due to the formation of an sp2 bond structure, that is, a graphite structure, at a high substrate temperature. The existence of Sρ3cmn bonds in the film indicates the possibility of an amorphous diamond structure, and an effective way to confirm its existence is to use group II boron (B),
Alternatively, it is conceivable to dope group II arsenic (^S) or phosphorus (P) into the film as an impurity, and demonstrate that each exhibits p-type or n-type semiconductor characteristics, but as mentioned above,
Boron (B) doped at 2500 ppm in the film forms an acceptor level at a position 0.03 to 0.1 eV from the lower end of the forbidden band, and as a result of measuring the electrical characteristics, the hole concentration is 3
~5 X 1017/cJ, hole mobility is 6-4
cJ/V-sec. The concentration of B in this film was confirmed by Auger electron spectroscopy, and the doping amount agreed very well with the value predicted from the concentration of B2O6 mixed in the source gas. The film thus obtained by the method of the present invention can be considered to be an amorphous diamond film.
上述したように本発明方法によれば、低い基体温度で、
不純物をドープしたアモルファスダイヤモンド半導体膜
を得ることができるものであり、この膜の再生は、極め
て再現性良く、安定に形成することができるので、その
工業的利益は甚大なものである。As mentioned above, according to the method of the present invention, at a low substrate temperature,
It is possible to obtain an amorphous diamond semiconductor film doped with impurities, and since this film can be regenerated with extremely good reproducibility and can be formed stably, its industrial benefits are enormous.
以下、本発明方法の利点を列挙すると、(i)形成され
た膜のキャリア移動度が例えばアモルファスSi膜のそ
れが高々1c+A/V・sec以下であるに比し、その
数倍以上の高い値を示す。The advantages of the method of the present invention are listed below: (i) The carrier mobility of the formed film is several times higher than that of an amorphous Si film, which is at most 1c+A/V·sec. shows.
(ii )可視光に対して透明
(iii )基体温度を250℃以下で膜形成を行うこ
とができる
( iv )用いるソースガスC2H2は、例えばSi
膜の形成に用いるソースガスの5i84に比し、安価で
、且つ安全であるのでとり扱いが楽になる。(ii) Transparent to visible light (iii) Film formation can be performed at a substrate temperature of 250°C or less (iv) The source gas C2H2 used is, for example, Si
Compared to the source gas 5i84 used for film formation, it is cheaper and safer and easier to handle.
(v)基体温度が低いこと、ソースガス中のとり扱いが
楽であるので、装置が簡単となり、大面積の膜を容易に
作製できる。(v) Since the substrate temperature is low and the source gas is easy to handle, the apparatus is simple and a large-area film can be easily produced.
(vi )添加不純物によって膜の半導体特性を再現性
よく制御できる。(vi) The semiconductor properties of the film can be controlled with good reproducibility by adding impurities.
本発明は一ヒ述した利点を有することから、薄膜トラン
ジスタなどの各種薄膜半導体装置を始めとして大面積化
し、光透過性が望まれる太陽電池、薄膜光センサー、或
いは例えばX−Yマトリックス型の液晶ディスプレーの
ように多数のドライブ用トランジスタを配列する半導体
基板に適用することができ、またそのキャリア移動度が
高いことから、例えば上述の液晶ディスプレーの、より
大面積、多素子化をはかることができるなど、本発明方
法の工業的な利益は極めて大きい。Since the present invention has the above-mentioned advantages, it can be applied to various thin-film semiconductor devices such as thin-film transistors, large-area solar cells, thin-film optical sensors, or, for example, X-Y matrix type liquid crystal displays, where light transparency is desired. It can be applied to semiconductor substrates on which a large number of drive transistors are arranged, and its high carrier mobility makes it possible, for example, to increase the area and multi-element of the above-mentioned liquid crystal display. , the industrial benefits of the method of the invention are extremely large.
第1図は本発明によるアモルファス炭素半導体膜の形成
方法を実施する装置の一例の路線的構成図、第2図は本
発明方法によって得た膜の赤外線吸収スペクトル図、第
3図及び第4図は夫々本発明方法の説明に供する基体温
度と抵抗率及び光学的エネルギーギャップの測定結果を
示す図である。
(1)は真空容器、(2)は基体、(3ンはその加熱体
、(9)は電子ビーム発生源のフィラメント、(13)
はソースガスの導入管である。FIG. 1 is a schematic diagram of an example of an apparatus for carrying out the method of forming an amorphous carbon semiconductor film according to the present invention, FIG. 2 is an infrared absorption spectrum diagram of the film obtained by the method of the present invention, and FIGS. 3 and 4 2A and 2B are diagrams showing measurement results of substrate temperature, resistivity, and optical energy gap, respectively, which are used to explain the method of the present invention. (1) is the vacuum vessel, (2) is the substrate, (3) is the heating element, (9) is the filament of the electron beam source, (13)
is the source gas introduction pipe.
Claims (1)
ソースガスを用い、これを比較的低温に加熱した基体表
面上で電子線照射によって分解して上記不純物がドープ
されたアモルファス炭素半導体膜を上記基板上に形成す
ることを特徴とするアモルファス炭素半導体膜の形成方
法。Using a source gas containing 100% acetylene mixed with 1% or less impurities, this is decomposed by electron beam irradiation on the substrate surface heated to a relatively low temperature to form an amorphous carbon semiconductor film doped with the impurities on the substrate. 1. A method for forming an amorphous carbon semiconductor film, the method comprising: forming an amorphous carbon semiconductor film on an amorphous carbon semiconductor film.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2742785A JPS61187227A (en) | 1985-02-14 | 1985-02-14 | Formation of amorphous carbon semiconductor film |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2742785A JPS61187227A (en) | 1985-02-14 | 1985-02-14 | Formation of amorphous carbon semiconductor film |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS61187227A true JPS61187227A (en) | 1986-08-20 |
Family
ID=12220808
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2742785A Pending JPS61187227A (en) | 1985-02-14 | 1985-02-14 | Formation of amorphous carbon semiconductor film |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61187227A (en) |
-
1985
- 1985-02-14 JP JP2742785A patent/JPS61187227A/en active Pending
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