JPS61187075A - Electronic counter - Google Patents

Abstract

PURPOSE:To provide an upper limit for the number of accesses by recording the counted value of errors and the number of times of reset in a PROM and setting a limit to the number of times of reset and storing the number of accesses of disqualified persons. CONSTITUTION:An electronic device, for example, an IC card 1 incorporates a control element MPU2 constituted into an IC ship and a data memory PROM3 constituted into an IC chip, and the MPU2 is connected electrically to an external card reader/writer through a connecting part 4 formed on the surface of the card. The area of the PROM3 is divided to an attribute area prescribing the attribute of the electronic counter and a counter area. The counted value of errors and the number of times of reset are recorded in prescribed areas of the PROM3 by the electronic counter consisting of the MPU2 and the PROM3, and a limit is set to the number of times of reset.

Description

[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to a so-called IC having a built-in IC chip, for example.
The present invention relates to an electronic counter that records the number of mismatches in PIN numbers in a PIN verification method for cards, etc.

[Technical Background of the Invention and its Problems] At present, magnetic stripe cards are widely used as ID cards used in automatic teller machines, for example.

In this magnetic stripe type card, if the PIN number entered by the cardholder does not match, a magnetic mark is placed on a part of the magnetic stripe under certain conditions.
Such cards cannot be reused unless they are reset by the financial institution's equipment. However, with this method, the mark can be erased relatively easily, and the number of resets is not recorded on the card, so it can be reset as many times as you like.
There was a problem in that the number of incorrect password inputs could not be adequately managed.

[Purpose of the Invention] The present invention was made in view of the above circumstances, and its purpose is to reduce the number of accesses when an unqualified person accesses a device that cannot be accessed without a certain qualification. An object of the present invention is to provide an electronic counter that records the number of accesses and sets an upper limit on the number of accesses.

[Summary of the Invention] In order to achieve the above object, the present invention utilizes an MPU (micro block unit) and a PROM (programmable unit).
An electronic counter (read-only memory) is used to record error count values and the number of resets in a predetermined area within the PROM, and to set a limit on the number of resets.

[Embodiment of the Invention] Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

FIG. 1 shows an IC card 1 as an example of an electronic device according to the present invention, which includes an MPU 2 as a control element formed into an IC chip, and a data memory formed into an IC chip electrically connected to the MPU 2. Each card has a built-in PROM 3, and the MPU 2 is electrically connected to an external card reader/writer (not shown) via a connector 4 formed on the card surface. As shown in FIG. 2, the PROM 3 is divided into an attribute area 5 that defines the attributes of the electronic counter and a counter area 6 that records count values. Attribute area 5 above
consists of 8 bits (1 byte) as shown in Figure 3, and the upper 4 bits indicate the number of counters (N), and the lower 4 bits indicate the number of counters (N).
The size of the counter (S bytes) can be specified in binary numbers using bits. In addition, the above counter area 6
As shown in FIG. 2, the counter consists of the first to Nth counters, and when the counter size (S) is 1 byte, the configuration of the counter is as shown in FIG. 4, with a 1-bit reset flag and It consists of a 7-bit count section. Furthermore, the configuration of the counter when the counter size (S) is 2 bytes is as shown in FIG.

Next, the electronic counter of the present invention having the above configuration will be explained with reference to the flowchart shown in FIG. Now, for example, if the number of counters N is specified as "3" and the counter size S is specified as "1", before using the counter (
The bit states of the attribute area 5 and counter area 6 in the initial state) are as shown in FIG. In this state, when the IC card 1 receives a counter registration command from the card reader/writer, the MPU 2 decodes the registration command (step 81), reads the data in the attribute area 5 located at the counter top address of the PROM 3, Store it in the register in MPU 2 (step 82>. Then, the MPU
Step 2 searches for valid counters that can be registered (step 8).
3). If the first bit of the first counter is "1",
It judges that the counter is valid and writes "
0”. If all bits up to the 8th bit are rOJ, the MPU 2 determines that counter registration is impossible and sends a registration impossible response to the card reader/writer (step S5). When the setting of "0" to the register is completed in this way, the data is written to PROM3 (step S
6). Thereafter, a registered response is sent to the card reader/writer (step 87). If the above step S
3, if the first to Nth counters are all invalid, an unusable response is sent (step 84).
).

Next, a refresh operation for invalidating a counter that cannot be registered and validating the next counter will be explained with reference to the flowchart shown in FIG. Now, I
When the C card 1 receives a refresh command from the card reader/writer, the MPU 2 decodes the refresh command (step S8), reads the data in the attribute area 5 of the PROM 3, and stores it in a register within the MPU 2 (step S9). Next, MPLI2 searches for a valid counter (step 510), and if there is a valid counter, writes rOJ to the first bit of the counter (step 812>) and sends a refreshed response (step $13). Refreshing of the counter is completed by the operation.If in step 810 above,
All 1st to Nth counters are invalid (refreshed)
If so, a non-refreshable response is sent (step 511). The bit status of the counter that cannot be refreshed is as shown in FIG.

In this way, the electronic counter composed of the MPU and the PROM records the error count value and the number of resets in a predetermined area in the PROM, and also sets a limit on the number of resets. Therefore, it is difficult to erase or tamper with the count data, and it is extremely safe.

Further, since the number of counters and the upper limit of count of each counter can be freely set, various counters can be realized depending on the purpose. Furthermore, it can be easily and inexpensively incorporated into an electronic device having an MPU and a PROM.

In the above embodiment, the counter size is set to at least 7 bits, but if a smaller size than this is required, 21 bits are required.
It is sufficient to set the surplus bit in the count section to "0" in advance. Furthermore, if it is necessary to set a limit on the possible number of refreshes, the number of counters may be set equal to the possible number of refreshes. Furthermore, since the PROM as a counter storage element usually has a maximum capacity of 10 KB or more, it can be used not only as a counter but also for other functions.

[Effects of the Invention] As detailed above, according to the present invention, when an unqualified person accesses a device that cannot be accessed without a certain qualification, the number of accesses is recorded, and
An electronic counter with an upper limit on the number of accesses can be provided.

[Brief explanation of the drawing]

The figures show one embodiment of the present invention; Fig. 1 is a perspective view of an IC card, Fig. 2 is a diagram showing an example of PROM recording, and Fig. 3 is a perspective view of an IC card.
The figure shows the recorded contents of the PROM attribute area, FIGS. 4 and 5 show the recorded contents of the PROM counter area, FIG. 6 shows an example of bit writing to PROM, and FIG. 7 shows the recorded contents of the PROM counter area. FIG. 8 is a flowchart for explaining the register operation, and FIG. 9 is a flowchart for explaining the refresh operation. 1...IC card (electronic device), 2...
・MPU, 3...PROM, 4...Connection section, 5...Attribute area, 6...
counter area. Applicant's agent Patent attorney Takehikoshi Suzue 1 revision? -53ry with 32 figures! J'zo47. 6 Figure 2r'E7i7 8th D

Claims (6)

[Claims] (1) In an electronic device having a control element and a data memory, data pre-recorded in the data memory and data given from the outside are compared, and if there is no predetermined relationship between the two data, the data stored in the data memory is means for recording an error trail in a predetermined area of the controller, means for electrically resetting the recorded error trail based on an external command, and means for limiting the number of resets to a predetermined number of times. An electronic counter that is characterized by: (2) The control element is an MPU (microprocessor).
The electronic counter according to claim 1, which is a unit). (3) The data memory is a PROM (programmable
The electronic counter according to claim 1, which is a read-only memory. (4) The electronic counter according to claim 1, wherein the electronic device is a so-called IC card. (5) The electronic counter according to claim 1, wherein the data is a personal identification number. (6) The electronic counter according to claim 1, wherein the error trail is the number of errors.