JPS61182580A - Sweep data processor - Google Patents

Abstract

PURPOSE:To simplify a device by providing an output register, input register, timer, data memory, program memory, and a microcontroller for executing control in accordance with the contents stored in the program memory. CONSTITUTION:The microcontroller 21 outputs tuning frequency 4 through the output register 19 in accordance with a program in the program memory 22, makes the timer 14 output a strobe signal 13, inputs input level data 5 through the input register 6, and while storing the maximum value out of quantized values in one address of the data memory 7, advances the tuning frequency up to the sweep end value. In this case, a sweep start value, the seep end value, a memory start address, quantized values, and a sweep updating time value are set up in the program of the program memory 22. Since the control circuit is constituted of the microcontroller 21 and the program, the number of arts can be reduced, the device can be simplified and the reliability can be improved.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a sweep data collection and processing device for sequentially storing continuous data in a memory while processing it, and particularly to microprogramming thereof.

[Conventional technology]

Conventionally, as this type of data collection and processing device, the one shown in FIG. 3 has rarely been used. In the figure, 1 is a sweep counter that sweeps the tuning frequency at-sweep, 2 is a sweep start value that determines the initial value of the sweep range of sweep counter 1, 3 is a sweep end value that determines the final value of the sweep range of sweep counter 1, and 4 is the tuning frequency data output from the sweep counter 1, and 5 is the tuning frequency data output from the receiver (
6 is an input register that temporarily holds the input level data 5, 7 is a data memory that stores the input level data 5, and 8 is a data memory 7 for inputting data to and from the jfCI register. 9 is an address counter that creates an address for the data memory 7. 1G is a comparison circuit that compares the input level data 5 with the input level data 5 held in the data memory 7 and sends the input level data 5 to the data memory 7. 11 is a quantization value that determines which address of the input level data 5 is stored in one address of the data memory 7, 12 is a tuning frequency 4t-update The sweep update time value 13 is a strobe that determines the time to update the sweep, counts the sweep counter 1, and inputs the input level data 5t- to the input register 6.
This signal indicates to the receiver (not shown) that the tuned frequency data has been determined, and is used to synchronize the update of the address of the address counter 9, etc. Further, a timer 15 outputs the strobe 13 according to the 14 Jd sweep update time value 12, and divides the frequency of the strobe 13 inputted from the timer 14 according to the quantization value 11.

Address counter 9t - a frequency divider for counting, 16 is a strobe 1 which is input when the address is updated by the frequency divider 15
3, the data memory 7, the comparison circuit 8t, a control circuit that controls the data memory 7, and 17 a memory address.

18 is an address counter 9 which detects that the sweep end value 3 and the tuning frequency data 4 from the sweep counter 1 match, and sets the sweep start value 21'E in the sweep counter 1.
This is a comparator that sets the memory start address 10t.

The operation will be explained by taking as an example the case where the maximum value of the input level data 5 is stored for each sweep of the conventional device having the above configuration. The timer 14 periodically outputs the strobe 13 according to the sweep update time value 12. To start the sweep, first set the sweep start value 2t minus the sweep counter 1, and then set the memory start address 10 in the address counter 9. As shown in the time chart of FIG. 4, the tuning frequency data 4 output from the sweep counter 1 is updated at the falling edge of the strobe 13, and the receiver (not shown) is updated with the tuning frequency data 4 at the rising edge of the strobe 13. 4) and sends new input level data 5. The input level data 5 is taken into the input register 6 at the rising edge of the strobe 13 and sent to the comparator circuit 8. The comparator circuit 8 compares the data read from the data memory 7 with the data from the input register 6, informs the control circuit 16 which one is larger, and sends the input level data 5t to the data memory 7. In the divider 15, when the quantization value is 11tn-1, the frequency is divided by the strobe 13t-n, and the maximum value of n pieces of input level data 5 is stored in one address of the data memory T. Advance address counter 9.

The control circuit 16 increments the address counter 9 from the frequency divider 15, and when it learns that the memory address 11 has been updated rL7t, it updates the new memory address 17t-m as shown in FIG.
Then, the size is compared with this address n, and the data processing is performed until the first data and the second input level data 5 of the n pieces of input level data 5 to be stored are taken into the input register 6. The data memory 7 and the comparison circuit 8t are controlled so that the data is stored at the address m of the data memory T during the time T''j'', that is, the sweep update time value 12.

Also.

The control circuit 16 compares the size with the address m of the data memory 7, as shown in FIG. 4, when the frequency divider 15 does not advance the address counter 9 and the memory address 17 is constant at m.
When the input register 6 takes in the second to nth data of the n pieces of input level data 5 to be stored, the comparison circuit 8 compares the data at the address m of the data memory 7 with the data from the input register 6. , data from input register 6.

In other words, if the new input level data 5 is larger, this new input level data 5f! : Stored at address m of data memory T, conversely, data in data memory 7 is greater than input level data 5, -1! ri is equal n
For example, the data at address m in data memory T is left as is.

In this way, the tuning frequency data 4 is updated n times.

The control circuit 16 operates to take in n input level data 5 and store the maximum value among them in one address of the data memory 70, and the frequency divider 15 inputs the input level data 5.
Every time n pieces of &C are input, the address counter 9 is incremented by one.

On the other hand, the comparator 1B compares the tuning frequency data 4 and the sweep end value, and if they match, sets the sweep start value 2 to the sweep counter 1 in order to perform the other sweep again from the beginning.
is caused to set the memory start address 10e in the address counter 9.

[Problems that the invention helps solve]

The conventional sweep data processing device configured in this manner has problems such as complicated hardware control, a large number of parts, and reduced reliability. This invention solves the above problems. The sweep data is designed to solve this problem, and by updating the tuning frequency data and processing the input level data using a microcontroller and program, hardware control is simplified, the number of parts is reduced, and reliability is increased. The purpose is to obtain processing equipment.

[Means for solving problems]

The sweep data processing device according to the present invention is provided with a microcontroller, and includes a comparator circuit 8 and a comparator 1 in FIG.
8. All functions of the control circuit 16 are replaced with software programs, those parts are eliminated, a program memory is provided in place of the program memory, and a sweep counter and branch unit 15. The address counter 9 is set to zero < L, and the register inside the microcontroller is used instead to perform these functions, and an external timer 4t is provided to know the time to update the tuning frequency data. , sweep start value 2, etc., in the program memory.

[Effect]

The microcontroller in this invention has operations determined by the contents of the program memory and controls other hardware circuits.The same microcontroller can be used even if the objects to be controlled are different, and it is highly reliable. As a result, the registers within this microcontroller can replace the role of an external circuit that was required in the conventional method, reducing the number of external components and simplifying the circuit configuration.

〔Example〕

Hereinafter, one embodiment of the invention will be described with reference to the drawings.

In FIG. 1, 4 is tuning frequency data, 5 is input level data, 13 is a strobe for inputting the tuning frequency data into the receiver, 6 is an input register for inputting input level data 5, and 19 is tuning frequency data 4 Output register 14 outputs strobe 13 every sweep update time.
20 is a time-up status signal output from the timer; 7 is a data memory in which input level data 5 is processed and stored; 21 is an input register 6. Data memory 7, timer 14, output register 1st - A microcontroller that controls and processes input level data 5 %22 is a program memory that stores a program that determines the operation of the entire device by determining the operation of the microcontroller 21. It is.

FIG. 2 is a flowchart showing the operation of the microcontroller 21. In the figure, 23 is a starting point for starting the processing of the microcontroller 21, and 24
is the initial setting process, which sets the sweep start value 2 to the sweep register 21a and output register 19 in the microcontroller 21, sets the memory start address 10t to the address register 21b in the microcontroller 21, and sets the quantization value 11 to the microcontroller 21. Set the quantization register 21c in 21 and set the sweep update time 1.
2 is set in the timer 14.

Furthermore, 25 is a time-up determination process for checking the time-up status 20 from the timer 14 and determining whether it is time to update the tuning frequency data 4tl;
is the sweep register 21a of the microcontroller 21
27 updates the sweep register 21m of the microcontroller 21.

Output register 19t - Tuning frequency data update processing to set, 28 refers to quantization register 21ct in the microcontroller 21, new data comparison, quantization start judgment processing to determine whether to start quantization %29 is input register 6 is a data comparison process that compares the input level data 5 taken in with the data in the data memory T, 30 is a new data storage process that stores the data in the input register 6 in the data memory 7, and 31 is a check to see if quantization has been completed. 32 is a quantization register setting process for newly setting the quantization value 11 in the t child register 21c in the microcontroller 21; 33 is updating the address register 21b' in the microcontroller 21; The address update process % 34 is a quantization register update process in which the quantization register 21c in the microcontroller 21 is decreased by 1.

As an uninvented embodiment having the above configuration, the input level data 5 is input for each sweep as in the operation of the prior art.
The operation will be explained by taking as an example the case where the maximum value of is stored.

In FIG. 2, the microcontroller 21 first inputs a sweep start value 2, a memory start address 10, and a quantization value 11 to a sweep register 21a and an address register 21b, respectively, in accordance with the program in the program memory 22.

Initial setting process 2 that sets the quantization register 21c [and also sets the sweep start value 2 to the output register 19, and sets the sweep update time 12 to the timer 14]
4t-, the timer 14 is started, and the output of the strobe 13 shown in FIG. 1 is started. Next, the microcontroller 21 looks at the time-up status 2 (l) shown in FIG. Proceed to secondary processing.

In the second sweep end determination process 26, the value of the sweep register 21a in the microcontroller 21 and the sweep end value 3 are compared. If these values match, initial setting process 24
Start the sweep again from the beginning, and if it matches,
Since the sweep has not been completed, the process proceeds to the tuning frequency data update process 27, and the microcontroller 2
1 in the sweep register 21at-+1, and sets this value in the output register 19 in FIG. 1 to update the tuning frequency data 4. In the long quantization start determination process 28, when the number of input level data 5 to be quantized is n, the quantization value 11 is set to n-1, and the microcontroller 21 sets the value of the quantization register to n of the quantization value 11. Check whether it is equal to -1 or 5, and if it is equal to 1, quantize it.The first of n input level data 5 is taken into the input register 6 in FIG.
When it is determined that the data has been stored, the process proceeds to new data storage processing 30. here,
The input register 6 in FIG.
At the same time, the time-up status of 20 will appear. This time-up status 20 controls the timer 14 after the time-up determination process 25 is completed, rather than immediately dropping it in the sweep end determination process 26. ! 7t, It is determined that the quantization register 21e in the microcontroller 21 is not equal to n-1 of the quantization value 11 in the step processing 28 to start childization.
If so, the process proceeds to data comparison processing 29, in which the input level data 5 stored in the input register 60 in FIG. The process proceeds to data storage processing 30, and if the data in the data memory 7 is larger or equal, the contents of the data memory T are set as the mother, and the process proceeds to quantization end determination processing 31. In the new data storage process 30, new input level data 5 of the input register 6 shown in FIG. 1 is stored at the address specified by the address register 21b of the microcontroller 21 of the data memory T. In the quantization end determination process 31, it is checked whether the doji conversion register 21c in the microcontroller 21 is set to OVc, and if it is set to 0, the n input level data 5 determined by the quantization value 11 are determined by the quantization value 11. The maximum value is found: rL7
At t7t, in order to find the maximum value again from the next n input level data 5, the process proceeds to the quantization register setting process 32 in which n-1ft of quantization value 11 is set in the quantization register 21c in the microcontroller 21, and then In order to increment the address of the data memory 7 by 1, the process advances to address update processing 33.

At this time, if n is not 0, it is 1. Input level data 5
Since n pieces have not been taken in 1r, the process advances to quantization register update processing 34 in which only the quantization register is decremented by 1 without updating the memory address. When the address update process 33 or the quantization register (-1) 34 is completed, the process returns to the time-up determination process 25 again, and the processes from the start 23 to the quantization register (-1) 34 are repeated.

In this way, according to the program shown in FIG. 2 and with the configuration shown in FIG. 1, the microcontroller 21 outputs the tuning frequency data 4 through all the output registers 19, outputs the strobe 13 from the timer 14, and sends the input level data 5 to the input register 6. input level data 5 to quantized value 11
The tuning frequency data 4 is advanced up to the sweep end value 3 while storing the maximum value among the numbers indicated by in one address of the data memory 7.

Note that the sweep start value is 2, the sweep end value is 3, the memory start address is 1G, and the quantization value is 11. Swive update time value 1
2 is set in the program of the program memory 22.

In the above embodiment, the tuning frequency data is incremented by +1 in the tuning frequency data update process 27 and swept upward, but it is changed to -1 and at the same time, the address register is incremented by %-1 in the address update process 33, and the sweep is performed. End value 3
may be replaced, and the same effect as in the above embodiment can be obtained.

Further, in the above embodiment, a case has been described in which the frequency is swept, but it is also possible to store the intensity of the reflected wave with respect to the azimuth in the memory from the radar sum, and the same effect as in the above embodiment can be obtained.

〔Effect of the invention〕

As described above, according to the present invention, since the control circuit is composed of a microcontroller and a program, the number of parts is reduced, the hardware configuration is simplified, the device can be made inexpensive, and the device is highly reliable. In addition to obtaining information, data processing can be done with a program, such as not only finding the maximum value but also finding the average value, and free processing of the data is possible! O'Exf''''*VCHL
ALr'jluN&cftr+-* (See the effect.

)

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a sweep data processing device according to an embodiment of the present invention, FIG. 2 is a flowchart showing a program for controlling the sweep data processing device according to an embodiment of the invention, and FIG. 3 is a conventional sweep data processing FIG. 4 is a block diagram showing the device, and is a timing chart showing changes in tuning frequency data, strobe, input level data, and memory address of a conventional sweep data processing device. In the figure, 4 is tuning frequency data, 5 is input level data, 6 is input register, T is data memory, 12 is sweep update time value, 13 is strobe %, 14 is timer, 19 is output register, 20 is time-up status , 21 is a microcontroller, and 22 is a program memory. In each figure, the same reference numerals indicate the same or similar parts.

Claims (1)

[Claims] A sweep data processing device that sweeps a constant frequency band and collects and processes received input level data, including an output register for holding and outputting the tuned frequency data for said sweeping, and an input for taking in said received input level data. and a time-up status indicating that the strobe and sweep update time has elapsed to inform an external receiver that the tuned frequency data from the output register has been determined and to take in the received input level data to the input register. a timer for outputting, a data memory for storing the received input level data, a program memory for storing in advance a control procedure for collecting the received input level data and frequency band sweep, and the contents stored in the program memory. 1. A sweep data processing device comprising: a microcontroller that performs control.