JPS61182383A - Slow reproduction device of video tape recorder - Google Patents

Abstract

PURPOSE:To obtain a slow reproducing picture without noise by writing a video signal for one field in a field memory at tape stop state during intermittent drive and reading the signal at driving state. CONSTITUTION:A signal from a head at tape stopping is written in a memory and the signal written in the memory is read at tape carrying to attain noiseless reproduction. That is, the stop state of a tape 4 during intermittent drive is detected by using the output of a delay circuit 14 and the output signal is synchronized by a synchronizing circuit 15 by using the output of the digital PLL circuit 12 locked to the reference pulse of a servo circuit 11 to obtain a write timing signal corresponding to the write period of the signal for one field of the video signal.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a slow playback device for a video tape recorder.

[Technical background of the invention and its problems]

When performing slow playback in a video tape recorder (hereinafter referred to as VTR), the following method has conventionally been used.

(1) Simply slow down the rotation of the capstan motor to perform slow playback. In this case, noise often occurs.

(2) The capstan motor is driven intermittently and a special reproduction head is used to perform slow reproduction without noise.

(3) The rotation of the capstan motor is slowed down, and noise-free slow playback is performed using a head that is disposed on a piezoelectric element and is movable in the width direction of the recording track.

Methods (2) and (3) above can provide a noise-free slow playback screen, but require a head for special playback or a device for head displacement.

[Purpose of the invention]

The present invention has been made in view of the above-mentioned problems, and it is an object of the present invention to provide a slow playback device for a video tape recorder that does not require a special playback head or the like.

[Summary of the invention]

The present invention drives a magnetic tape intermittently, writes video signals for one field into a field memory in a tape stop state during intermittent drive, and reads out the written signals from the field memory in a drive state during intermittent drive. [Embodiment of the Invention] Hereinafter, a first embodiment of the V'r slow playback device according to the present invention will be described. The explanation will be made based on the block diagram shown in the figure and FIG. 2 which is a timing chart of the apparatus shown in FIG.

In Figure 1, (1) is a magnetic head (2), (3
) is a rotating disk on which is placed, and (4) is a magnetic tape. (5) is a control head that records and reproduces control signals on the side edge of the magnetic tape (4), and (6) is a control head that records and reproduces control signals on the side edge of the magnetic tape (4), and (6) is a control head that records and reproduces control signals on the side edge of the magnetic tape (4).
This is the capstan that drives the transport. In addition, (8) is a capstan motor that moves the capstan (6) t-, 11, (9) is a capstan motor servo circuit that controls the intermittent drive of this capstan motor (8), and α [is an intermittent slow This is an intermittent slow speed designation circuit that designates the tape speed. Further, αυ is a cylinder servo circuit that controls the rotation of the rotating disk (1), and a'a is a phase locked loop (PLL) circuit. (13 is an amplifier circuit, I is a delay circuit, a is a synchronization circuit, (LI19 is a memory control circuit, SWI is a head (2+,
(17)
is a reproduced video signal processing circuit connected to the output terminal of switch SW1, α& is an A/D converter, and 11 is field memo I.
J, (21 is a value converter, SW2 is a switch, and (2B is an output terminal.

This will be explained with reference to the yard.

When the VTR enters slow playback mode, the capstan motor servo circuit (9) rotates the capstan motor intermittently, and the capstan motor (6) and the pinch roller <1) V
The tape (4) held between C and C is driven intermittently. The speed of slow playback is controlled by changing the stop time of the tape (4) (that is, by changing the drive speed interval to the capstan motor (8)), and the longer the stop time, the slower the slow playback speed becomes. It turns out. The above control is performed by a signal from the intermittent slow speed designation circuit Ql. Further, the tape (4) is stopped in the following manner during intermittent driving. That is, when the tape (4) is in a moving state during intermittent slow playback (movement of one frame).

A control signal recorded on the side edge of the tape (4) is reproduced from the control head (5) (see FIG. 2(b)). The tape (4) is stopped by appropriately delaying this control signal amplified by the amplifier circuit to obtain the stop timing.

In this case, when the tape (4) is stopped (when stopped during intermittent driving), the tape (4) is stopped at a position where the largest possible reproduction output can be obtained from the head (2) or (3). Note that the tape moving speed is shown in FIG. 2(C).

In the present invention, noiseless playback is performed by writing a signal from the head when the tape is stopped into a memory, and reading the signal written into the memory when the tape is moving. That is, in this embodiment, the stop state of the tape (4) during intermittent drive can be detected by the output of the delay circuit α4, and this output signal is used as the reference pulse of the servo circuit αJ (see FIG. 2 (F)). Synchronization is achieved by the output of the K-locked digital PLL circuit α2 (the phase of which is different from the head switching pulse) (this output has approximately the same phase and timing as the head switching pulse, and preferably has no fluctuation). When synchronized by the circuit a9, a write timing signal (see FIG. 2(e)) corresponding to the write period of the signal for one field of the video signal is obtained.

Writing to the memory σ value using this write timing signal will be explained below. The recorded image signals on the tape (4) reproduced by the heads (2) and (3) are alternately taken out by the switch SW1 and input to the reproduced video signal processing circuit αη (this during intermittent driving The envelope waveform of the input signal is shown in FIG. 2(f)).

In addition, switching of switch SW1 is performed by cylinder servo circuit O.
This is performed using a head switching pulse supplied from B. In the reproduced video signal processing circuit αη, the luminance signal is separated from the reproduced signal and FM demodulated, the chrominance signal is similarly separated and inversely converted in frequency, and these two signals are added and output as an output analog signal. Then A/D
The signal is input to a converter and converted into a digital signal. When a write timing signal is given from the synchronization circuit (15) to the memory control circuit αe, a write command is issued from the control circuit ae to the memory (19), and the A/D
The output of converter hitting is memory σIFC! It gets sucked in. As mentioned above, the write timing signal is for one field period K.
Since g is given, it will be written to the image signal memory α for field 1.

The write address to the memory [11] is given from the memory control circuit αe. Note that when writing to a new memory αl (writing video signals for the next one field), the address is first cleared and the first write address is specified (address clear). )0 This address clearing is also performed when reading from memory address j, which will be described later. That is, after one field's worth of image signals are read out, the address is read again for the first time. The address clear signal (see FIG. 2 (ω)) is supplied from the PLL circuit σ2 to the memory control circuit oQ.

Reading from memory αl is performed by memory control circuit α
This is performed based on the read timing signal given to E9. In this case, the write timing signal and the read timing signal are distinguished by voltage level, and when the signal is at H level, reading is performed, and when it is at L level, writing is performed. Memory CI! The signal read from J is sent to switch SW2
(The switching is controlled by the write timing signal from the synchronization circuit a9, and it is connected to the terminal a side during reading.) It is input to the IJ/A converter ■, where it is converted from a digital signal to an analog signal. Ru. Then, it is output as a video signal to the output terminal circle (the video output at this time is shown in FIG. 2(h)). Note that when writing the video signal to the memory α9, the switch SW2 is connected to the terminal side, and the signal written to the memory α1 is simultaneously input to the converter ■ via the switch SW2. . Therefore,
Even when writing to the memory αj, the output signal from the terminal 121) is not interrupted.

As mentioned above, when the tape (4) is moved (the playback output from the head is If K is read out continuously and used as a playback output, a noise-free slow playback image can be obtained.

Note that in the above embodiment, the head switching pulse is not directly used to create the write timing signal, but this is for the following reason. That is, when the tape is intermittently fed, the rotating disk (1) is photographed by the tape (4), and the normal head switching pulses generated by detecting the rotation of the disk (1) have timing fluctuations. This causes a fluctuation in the timing of initializing the address of the memory di (address clearing), and the readout image becomes unstable. In order to solve this problem, this embodiment does not use head switching pulses.

Generally, during intermittent tape feeding, the relative speed between the tape and the head changes, so the horizontal synchronization frequency changes. Therefore, in order to compensate for this frequency fluctuation, the rotation speed of the rotating disk +1) is increased to increase the playback horizontal synchronization frequency. Efforts are being made to bring it closer to normal. However, in this embodiment, it is better not to perform this correction. This is because such correction may cause a discrepancy between the disk rotation period and the field memory read period.

Furthermore, writing to the memory ■ is performed when the intermittent feeding of the tape (4) has almost stopped to prevent noise in the reproduced image, to stabilize the number of horizontal scanning lines in one vertical period, and to stabilize the horizontal synchronization phase of reading and writing. This is to satisfy the continuity etc.

In this case, if the driving force of the cylinder motor 18) is sufficient and no adverse effects of intermittent driving occur, the write signal may be created using head switching pulses.
The PLL circuit (I) is no longer required. Also, in this embodiment, a digital PLL circuit α2 is used, but it may be an analog type.

〔Effect of the invention〕

As described above, according to the present invention, it is possible to obtain a noise-free slow playback image.Since intermittent drive is performed, the control signal can be played back even in the case of super slow playback, and the tape player is continuously driven. There is no problem unlike when you do it. Furthermore, even if noise occurs during intermittent feeding of the tape, there is no problem and there is no need to strictly control the feeding.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of a slow playback device for a video tape recorder according to the present invention, and FIG. 2 is a timing chart of FIG. 1.
4...Tape. 6... Capstan, 7... Pinch roller. 8... Capstan motor, 9... Capstan servo circuit, 16... Memory control circuit, 17... Playback video signal processing circuit, 18... A/D converter, 19... Field Memory, addition...D/A converter. Agent: Patent attorney Noriyuki Chika (and 1 other person) Figure 1

Claims (1)

[Claims] Among the video signals reproduced from the magnetic tape, the brightness signal is F.
M demodulation and frequency inverse conversion of the color signal, means for adding and outputting both signals, an A/D converter for converting the output analog signal of this means into a digital signal, and an A/D converter for converting the output of the A/D converter into a digital signal. A means for writing into a field memory, a means for reading a digital signal from the memory, a D/A converter for converting the output digital signal of the reading means into an analog signal, and an intermittent drive means for intermittently driving the magnetic tape. The magnetic tape is intermittently driven during slow playback, the output of the A/D converter is written in the memory when the tape is stopped during the intermittent drive, and the write signal is read from the memory when the tape is in the moving state during the intermittent drive. A slow playback device for a video tape recorder, characterized in that it is configured to obtain a playback signal.