JPS61182344A - Transmission system of synchronizing clock - Google Patents

Abstract

PURPOSE:To improve the cost required for a transmission line and the reliability of the transmission line by multiplexing plural synchronizing clocks to decrease the total number of transmission lines for data subjected to time division and multiplex. CONSTITUTION:When a multi-frame clock MFC and a frame clock FC are transmitted from a network 11, multiplexed as MFC/FC by a timing generator TG 13 in the network and they are divided into the MFC and the FC when the signal is received by a line trunk shelf 12. Thus, number of transmission lines between the network and the line trunk is decreased more than a conven tional system and the cost for the transmission lines and the reliability of the transmission lines are improved.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a synchronous clock transmission system, and more particularly to data transmission between a time division multiplexed switching network (NW) and a line trunk (L/T) shelf. This relates to a synchronization clock transmission system that is necessary for this purpose.

[Conventional technology]

Data transmitted between a network of exchanges that perform time division multiplexing and a line trunk shelf must always be synchronized at regular intervals.

Conventional synchronous clock transmission systems use a transmission line for each required synchronous clock.

FIG. 7 shows an example of a configuration between a conventional time division multiplexing switch network and a line trunk shelf.

In the figure, 1 indicates a network, and 2 indicates a line trunk shelf, and both devices transmit and receive communication data using clocks MFC and FC. Note that in the figure, 8M is a serial interface clock. FIG. 8 shows the timing chart of FIG. 7. - The period during which subscribers communicate is called a time slot (TS). The frame clock for every 32 time slots (TS) is the frame clock (FC), and the 32 frame clock (FC) is the multiframe clock (FC).
MFC). The frame clock (FC) is used to control subscriber calls, and the multi-frame clock (MFC) is 32FC.
Synchronize communication throughout the system.

[Problem that the invention seeks to solve]

As shown in the system of FIG. 7, the conventional synchronization clock transmission system uses a transmission line for each required synchronization clock. Especially in communication between the network and line trunk shelves, when there are a large number of line trunk shelves, this method has problems because it is better to have as few transmission paths as possible, considering the cost of the transmission paths and the reliability of the communication. .

[Means for solving problems]

The present invention provides a synchronized clock transmission method that solves the above problems and improves cost and reliability. In a communication system that synchronizes transmitted data using synchronization signals, the plurality of synchronization signals are multiplexed and transmitted, and on the receiving side, the multiplexed synchronization signals are returned to the original synchronization signals and transmitted. This is done using a synchronous clock transmission method that synchronizes the data transmitted.

[For production]

According to the present invention, by multiplexing a plurality of synchronous clocks, the total number of transmission paths for time-division multiplexed data can be reduced, and the cost required for the transmission path and the reliability of the transmission path can be improved.

〔Example〕

Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 1 is a block diagram of a system according to an embodiment of the present invention, and FIG. 2 is a timing chart thereof. In FIG. 1, 11 represents a network, and I2 represents a line trunk shelf. The feature of FIG. 1 is that when the multi-frame clock (MFC) and frame clock (PC) are sent out from the network 11, the timing generator (
TG) 13 with the MFC/FC and received at the line trunk shelf 12.
It is divided into C. Figure 2 shows M F C/F C and M
The mutual relationship between FC and FC has been clarified.

Next, a circuit for separating the synchronization signals multiplexed by the timing generator (TG) 13 in FIG. 11 will be explained.

FIG. 3 shows a circuit for separating FC in the line trunk shelf 12, and FIG. 4 shows its timing chart.

In FIG. 3, reference numerals 14 and 15 are flip-flop circuits, and the input FC/MFC clock is input to the D input terminal of the flip-flop circuit 14, and the clock D is input to the clock terminal. As a result, a waveform like τ in FIG.
The waveform shown in FIG. 4B is obtained as the output. The waveform shown in FIG. 4B is input to the flip-flop circuit 15, and a frame clock FC is obtained from the TV clock applied to its CK terminal. In addition, in the circuit of FIG. 3, TV, ! : Delay is taken into consideration for all signals other than FC/MFC.

FIG. 5 shows a circuit for extracting an MFC from a multiplexed synchronization signal, and is comprised of flip-flops 21, 22.23 and gates 24, 25.

First, the input signal FC/MFC is input to the flip-flop circuit 21.
, the sixth clock is input to its output by the clock TV.
An output as shown in Figure A appears. The output A is further delayed by the flip-flop circuit 22 and has a waveform as shown in FIG. 6B. This waveform B is input to the gate 25 together with the MFC/FC clock, and an output as shown in FIG. 6C is obtained as the output. This output C is the flip-flop circuit 2
3, and the multi-frame clock MFC' as shown in FIG. 6 MFC' is obtained by the clock T'J input to the circuit.

In the line trunk shelf, communication data is processed using the frame clock (FC) and multiframe clock (NFC) obtained separately as shown in FIGS. 3 and 4.

〔Effect of the invention〕

As described in detail above, according to the present invention, the number of transmission paths between a network and a line trunk is reduced compared to the conventional method, and the cost required for the transmission path and the reliability of the transmission path can be improved.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of a synchronization clock transmission system according to the present invention, FIG. 2 is a time chart showing the relationship between communication frames and synchronization signals in FIG. 1, and FIG.
The figure is a circuit diagram for separating the FC clock from the multiplexed synchronization signal in Figure 1, Figure 4 is a timing chart showing the waveforms of each part, and Figure 5 is a circuit diagram for separating the MFC clock from the MFC/FC synchronization clock. 6 is a timing chart showing waveforms of various parts thereof, FIG. 7 is a block diagram showing an example of a conventional system, and FIG. 8 is a timing chart explaining the operation of FIG. 7. In the drawing, 11 is a network, 12 is a line trunk shelf, 13 is a timing generator, 14, 1
5, 21, 22.23 is a free knob flop, 16.2
4.25 is a gate, FC is a frame clock, MFC is a multi-frame clock, and MFC/FC is a multiplexed clock.

Claims (1)

[Claims] In a communication system that transmits data using a plurality of synchronization signals and synchronizes the transmitted data using the plurality of synchronization signals on the receiving side, the plurality of synchronization signals are multiplexed and transmitted, and the receiving side A synchronous clock transmission method characterized in that the multiplexed synchronous signal is returned to the original synchronous signal to synchronize the transmitted data.