JPS61182130U - - Google Patents

Info

Publication number
JPS61182130U
JPS61182130U JP1985066163U JP6616385U JPS61182130U JP S61182130 U JPS61182130 U JP S61182130U JP 1985066163 U JP1985066163 U JP 1985066163U JP 6616385 U JP6616385 U JP 6616385U JP S61182130 U JPS61182130 U JP S61182130U
Authority
JP
Japan
Prior art keywords
signal
output signals
control signal
level
bandpass filter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1985066163U
Other languages
Japanese (ja)
Other versions
JPH0510427Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1985066163U priority Critical patent/JPH0510427Y2/ja
Publication of JPS61182130U publication Critical patent/JPS61182130U/ja
Application granted granted Critical
Publication of JPH0510427Y2 publication Critical patent/JPH0510427Y2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Noise Elimination (AREA)
  • Stereo-Broadcasting Methods (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、本考案の実施例を示すブロツク図、
第2図は従来例を示す回路図、第3図A〜Cは、
バツフアアンプ20及び21から出力されるコン
ポジツト信号及び雑音の周波数スペクトラムを示
す図である。 主要部分の符号の説明、2……FMフロントエ
ンド、3……IFアンプ、5……検波回路、6…
…周波数特性コントロール回路、7……ステレオ
復調回路、20,21……バツフアアンプ、22
……バンドパスフイルタ、25……比較回路、2
6……時定数回路。
FIG. 1 is a block diagram showing an embodiment of the present invention;
Fig. 2 is a circuit diagram showing a conventional example, and Figs. 3 A to C are
2 is a diagram showing frequency spectra of composite signals and noise output from buffer amplifiers 20 and 21. FIG. Explanation of symbols of main parts, 2...FM front end, 3...IF amplifier, 5...detection circuit, 6...
... Frequency characteristic control circuit, 7 ... Stereo demodulation circuit, 20, 21 ... Buffer amplifier, 22
... Bandpass filter, 25 ... Comparison circuit, 2
6...Time constant circuit.

Claims (1)

【実用新案登録請求の範囲】 (1) 受信FM高周波信号から変調信号を抽出し
て、供給される制御信号に応じたレベルにて該変
調信号を出力するFM検波部と、前記制御信号に
応じた周波数特性及びステレオ分離度にて前記変
調信号から左右復調出力信号を得る復調部とを含
むFMステレオチユーナであつて、前記左右復調
出力信号の所定周波数帯域の信号が基準レベルを
越えたとき前記制御信号を出力する制御信号発生
手段を有することを特徴とするFMステレオチユ
ーナ。 (2) 前記制御手段は、前記左右復調出力信号を
入力とするバツフアアンプと、このバツフアアン
プの出力信号のうち前記所定周波数帯域の信号の
みを通過するバンドパスフイルタと、該バンドパ
スフイルタの出力を検波する検波回路と、この検
波回路の出力レベルが前記基準レベルを越えたと
き差信号を前記制御信号として出力する差動回路
とを備えることを特徴とするFMステレオチユー
ナ。
[Claims for Utility Model Registration] (1) An FM detector that extracts a modulated signal from a received FM high-frequency signal and outputs the modulated signal at a level that corresponds to a supplied control signal; and a demodulator that obtains left and right demodulated output signals from the modulated signal with frequency characteristics and stereo separation, and when a signal in a predetermined frequency band of the left and right demodulated output signals exceeds a reference level. An FM stereo tuner comprising control signal generating means for outputting the control signal. (2) The control means includes a buffer amplifier that receives the left and right demodulated output signals as input, a bandpass filter that passes only signals in the predetermined frequency band among the output signals of the buffer amplifier, and detects the output of the bandpass filter. and a differential circuit that outputs a difference signal as the control signal when the output level of the detection circuit exceeds the reference level.
JP1985066163U 1985-05-02 1985-05-02 Expired - Lifetime JPH0510427Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1985066163U JPH0510427Y2 (en) 1985-05-02 1985-05-02

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1985066163U JPH0510427Y2 (en) 1985-05-02 1985-05-02

Publications (2)

Publication Number Publication Date
JPS61182130U true JPS61182130U (en) 1986-11-13
JPH0510427Y2 JPH0510427Y2 (en) 1993-03-15

Family

ID=30598805

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1985066163U Expired - Lifetime JPH0510427Y2 (en) 1985-05-02 1985-05-02

Country Status (1)

Country Link
JP (1) JPH0510427Y2 (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58101544A (en) * 1981-12-14 1983-06-16 Toshiba Corp Transmission test circuit for input and output device
JPS58106919A (en) * 1981-12-18 1983-06-25 Sharp Corp Noise reducing circuit in fm tuner

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58101544A (en) * 1981-12-14 1983-06-16 Toshiba Corp Transmission test circuit for input and output device
JPS58106919A (en) * 1981-12-18 1983-06-25 Sharp Corp Noise reducing circuit in fm tuner

Also Published As

Publication number Publication date
JPH0510427Y2 (en) 1993-03-15

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