JPS61180934A - Optical recording and reproducing device - Google Patents

Abstract

PURPOSE:To avoid a case where a track address signal emerges in a reproduced voice as a noise by recording voices after compressing the time base so as to avoid the overlap between the voices and the track address signal part recorded previously and expanding the time base for output of voices in a reproduction mode. CONSTITUTION:A sound signal of the length L is divided into three sections L1, L2 and L3. In this case, the sections L1 and L2 overlap each other at a part DELTAL. While the sections L2 and L3 overlap each other at a part DELTAL respec tively. the time base is compressed for each section and therefore the sections L1, L2 and L3 and the overlap part L are compressed into l1, l2, l3 and DELTAlrespectively. Then the blank periods DELTAS are produced among sections 1l-l3 after compression. Here the recording is carried out so that the correspondence is secured between the periods DELTAS and the address recording part as well as sections l1-l3 and the signal recording part respectively. When the time base is expanded after reproduction, the DELTAl belonging to the l1 or the DELTAl belonging to the l2 is disused. Then the other DELTAl is used for reproduction of the time base.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention provides a method for storing one image and an audio signal on an information recording track formed spirally or concentrically on a disk-shaped recording medium (hereinafter sometimes abbreviated as a disk). The present invention relates to an optical recording and reproducing device for optically recording and reproducing information, and more specifically, a track address recording section for recording a track address signal is provided in a part of the information recording track, and an audio signal is recorded in the track address recording section. This invention relates to an optical recording and reproducing apparatus that records and reproduces information on an information recording track in such a way that the information is avoided.

[Background of the invention]

Conventionally, for example, as described in Japanese Patent Application Laid-Open No. 57-147139, there is an optical recording system in which information is recorded and reproduced on a disk on which a track address signal is previously recorded in its guide groove (track). A playback device is known. FIG. 9 is an enlarged perspective view showing the structure of a disk used in such an apparatus.

In the figure, a guide groove (track) 3 and a track address signal section 4 are provided on the surface of a base material 2 of a disk 1 by means of irregularities. The recording layer 5 on the surface of the disk 1 is heated by thermal energy by high-intensity laser beam irradiation.

Energy causes state changes such as phase transition, and optical properties change.

Information is recorded by irradiating the surface of the disk 1 with the laser beam whose intensity is modulated by the signal to be recorded, and reproduction is performed by using the reflected light from the disk when the laser beam of a constant intensity is irradiated. Alternatively, this can be done by detecting changes in the intensity of transmitted light. The laser beam is controlled to irradiate onto the guide groove 6 by well-known tracking control means and focus control means. The numbers recorded in the track address signal section 4 correspond to the guide grooves 3 on a one-to-one basis.

In general, there are various methods for recording video signals on the above-mentioned discs, such as die reflex (FM), color signal low frequency conversion, and veridical subcarrier.Here, we will explain using the color signal low frequency conversion method as an example. Let's do it.

FIG. 10 is a block diagram showing an example of the configuration of the main parts of a conventional optical recording and reproducing apparatus for recording and reproducing video signals on the disc.

In the figure, a color video signal according to the NTSC system applied to an input terminal 10 is filtered through a bypass filter (HPF).
) 11 extracts the luminance signal component, and an FM modulator 12 performs FM modulation on the carrier. On the other hand, the bandpass filter (B
PF) 15 extracts the color signal component from the input signal, and converts it into a frequency conversion circuit 14 consisting of a balanced modulator, etc.
It is converted to a low frequency color signal with a lower frequency than the M carrier,
The adder 15 adds the signal to the FM signal.

The adder output is applied to the optical modulator 16 and the semiconductor laser 17
A signal is recorded on the disc 1 by modulating the output laser light from the disc 1. During signal reproduction, the reflected or transmitted light of the laser beam irradiated onto the disk 1 from the semiconductor laser 17 is detected by the photodetector 18 and converted into an electrical signal.

FIG. 10 shows an example of transmitted light. The reproduced signal is separated into an FM signal and a low-pass color signal by a bypass filter 19 and a low-pass filter (LPF) 20, respectively.

The FM signal passes through a limiter 21 and is demodulated into a luminance signal by an FM demodulator 22. The low frequency color signal is converted to the original frequency by a frequency conversion circuit 23, added to the luminance signal by an adder 24, and outputted from an output terminal 25.

A marker 6 provided on the disk 1 is used to control the rotation of the disk 10, and a signal generated by a change in the amount of light incident on the photosensor 26 when the marker 6 passes in front of the photosensor 26 is separated by a synchronization separation circuit 27. The phase of the frame synchronization signal of the input video signal is determined by the motor control circuit 2.
A phase comparator (not shown) in 8 compares the address signal portion 4 provided at a certain relative angle with the marker 6 to fall within the vertical retrace period or overscan period of the video signal. Recording is done in this way.5.
A motor control circuit 28 controls a motor 29.

At this time, one frame of the video signal is transferred to the disk 101.
Since the frames are recorded rotationally (on one track) and the frame numbers of recorded frames and track addresses correspond one-to-one, high-speed retrieval of frame images from the disc 1 can be easily performed.

The recording format of the address signal is, for example, Japanese Patent Laid-Open No. 57-14713.
Publication No. 9 attempts to coexist with the FM signal by recording an address using a signal having a low frequency outside the frequency band of the FM signal and allowing frequency separation using a filter.

However, the address signal is PE (Phase Encodin).
g) and MFM (Modified Frequency)
It is a rectangular wave signal because it is a rectangular wave signal due to digital modulation such as y Modulation) and is recorded unevenly on the disk at a low frequency.
It mainly contains odd-order harmonic components.

Therefore, from the perspective of the FM signal, interference from the address signal cannot be completely removed by a filter. This interference does not affect the playback quality because the address signal is during the vertical retrace or overscan period of the video signal and does not appear on the screen, and the interference is not large enough to disturb the synchronization of the demodulated video signal. does not affect

On the other hand, since the frequency bands of the low-pass chrominance signal and the address signal are the same, they cannot be separated by a filter, and not only does the address become a major interference with the chrominance signal, but when added to the reproduced luminance signal, the synchronization signal is also There is a risk of disturbing it.

Regarding this interference, for example, Japanese Patent Application Laid-Open No. 57-142094
As described in the above publication, this problem can be eliminated by stopping the color demodulation output only during the period when the address signal is being reproduced. In this case as well, the stoppage of color output does not appear on the screen.

When recording moving images with the above-described optical recording/reproducing apparatus, it is desirable to simultaneously record accompanying audio, such as in television broadcasting, for example. As a recording method for audio signals, frequency multiplexing recording using FM modulation, which is performed in playback-only video disk players, is generally used.

However, when trying to record FM multiplexed audio using a conventional device, the following problems arose.

First, the carrier frequency of the audio FM is usually lower than that of the Eirin FM signal, and in the case of the color signal low frequency conversion method, it is set higher or lower than the color signal.

Due to the characteristics of the medium, it is difficult to make the signal higher than the video FM signal. At this time, it is impossible or very difficult to communicate the voice FM signal and the address.

Furthermore, since the level of the audio FM signal needs to be sufficiently low (for example, -20 dB) with respect to the video FM signal in consideration of cross-modulation interference, the amount of interference from the address signal becomes large.

Furthermore, since audio is normally a continuous signal, if the reproduction output is stopped during the address signal period, the effect will appear on the reproduced sound. The address signal period is usually about 200 μs, which is about the 5HC horizontal period of a video signal, and it always exists once every π or π seconds, so if the audio output is stopped each time, it will have a frequency component of 5 KHz or more. The audio was completely dropped, 60E [z or 30
The playback quality deteriorates significantly due to periodic noise.

[Purpose of the invention]

The present invention has been made in order to solve the problems of the prior art as described above, and an object of the present invention is to record track addresses on a portion of a spiral or concentric track formed on a disc-shaped recording medium. In an optical recording and reproducing apparatus that records and reproduces information optically as a section, even when audio signals are recorded by FM multiplexing, the consecutively reproduced audio signals are not adversely affected by the address recording section. To provide an optical recording and reproducing device which does not cause deterioration of reproduced sound quality.

[Summary of the invention]

In order to achieve the above object, the present invention divides the continuous length of an audio signal to be recorded on a track into a certain range, and then compresses the time axis for each division. The address recording section on the disk corresponds to the blank period between each section caused by time axis compression, so that the audio signal spanning each section after time axis compression will fit into the remaining part excluding the address recording section. , the audio signal after time axis compression is recorded on a track. At the time of playback, the original audio signal is restored by performing the reverse process, that is, time-axis expansion for time-axis compression, and interference with the audio signal by the address recording section is eliminated.

Note that when dividing the audio signal into certain ranges, the division is performed so that adjacent ends of each division contain overlapping audio signals with the same content, and then time axis compression is performed.
When expanding the time axis, the overlapping audio signal portions at the ends of each section are discarded, as they may have poor transient response and contain noise due to the band limitation by the filter in the recording/playback circuit. It is best to use the rest to extend the time axis.

FIG. 11 clearly shows the above.

FIG. 11 is a detailed explanatory diagram of the present invention. Assume an audio signal of length L as shown in FIG.

As shown in (b), this is divided into three parts, Ll, Ll, and L5. At this time, Ll and Ll overlap each other at ΔL, and between Ll and L3, , are divided so that they overlap each other at a portion of ΔL.

After that, when the time axis is compressed for each segment, as seen in ()・), Ll becomes tl, Ll becomes t2, and L3 becomes 15V.
c, and the overlapping portion ΔL is compressed as Δt, and each segment t1.c after compression is compressed. t2. During t3, there is a blank period ΔS. Therefore, the blank period ΔS corresponds to the address recording section, and the section t1. Recording is made so that t2° and t3 correspond to the signal recording section.

After playback, when extending the time axis, for example, Δt belonging to tl
and Δt belonging to t2 (the one that includes noise)
is discarded and the rest is used for time-axis reproduction, so the original audio signal as shown in (a) can be obtained.

The above is the operating principle of the present invention.

By the way, as a means for time-base compression and expansion of audio signals, it is technically difficult to compress and expand the analog signals as they are, so the speed and speed of digitizing the audio analog signals and writing them into memory as digital quantities is important. Five methods are used to compress and expand the time axis by changing the readout speed, and after compression and expansion of the time axis, digital/analog conversion is performed again into an audio analog signal.

[Embodiments of the invention]

FIG. 1 is a block diagram showing the configuration of an audio signal recording circuit in one embodiment of the present invention. Further, FIG. 2 is a waveform diagram showing signal waveforms of each part in FIG. 1, and the symbols a and cxi correspond in both figures.

The configuration in FIG. 1 can be roughly divided into a signal path section extending from the upper left to the lower right via the upper right in the figure, and a timing control section occupying the lower left in the figure.

The signal path section includes an input terminal 301 and a low-pass filter 302
, A/D converter 303, and buffer 504a.

304b, RAM 305a, 305b, data selector 306, D/A converter 307, low pass filter 30
8, FM modulator 309, adder 310, output terminal 311
The timing control section includes an input terminal 312.31t5, a frequency multiplier circuit 313, and a branching unit 31.
4,515, counter 317, decoder 318, D-flip-flop 319, OR circuit 320a, 320
b, switches 321a, 321b, counter 32
2a, 322b.

The operation of each part will be explained below with reference to FIGS. 1 and 2.

The audio signal (h) input from the input terminal 301 is band-limited to less than half the sampling frequency by the low-pass filter 502, and converted into a digital signal by the human/D converter 303 according to the sampling clock generated by the divider 314. is converted to The digital signal is transmitted to the RAM 305a through buffers 304a and 304b whose output is turned on and off according to (g).
Alternatively, it is applied to the input terminal of 505b and written to each RAM according to a write clock synchronized with the sampling clock.

The RAMs 305a and 505b are in a write state when the respective RAM switching signals (f) and (g) are Hi () and A), and are in a read state when they are Lo (low). Data writing is performed alternately between the two RAMs 305a and 305b, with periods in which writing is performed simultaneously in both RAMs 305a and 305b.

- From the 10,000 RAM 505a and 305b, the branch unit 315
Data is read out according to a read clock whose cycle is shorter than that of the sampling clock generated by.

The data selector 306 is switched by the RAM switching signal (f) and sends the data read from the RAMs 305a and 305b to the D/A converter 307.

The D/A converter 307 restores the input digital data to an analog signal according to the read clock. Since the read clock frequency is higher than the write clock frequency, the restored analog signal is more compressed on the time axis than the signal (h) input to the terminal 301.

After the clock component is removed from the analog signal output from the A/D converter 607 by the halo-pass filter 308, the signal becomes signal (i), and the carrier is FM-modulated by the FM modulator 309. In the adder 310, the output of the FM modulator 309 and
For example, a luminance FM signal and a low-frequency color signal modulated by a video signal processing circuit (not shown) are added together, and outputted from a terminal 511 as a recording signal to a medium (disc) (not shown).

The timing control section generates a write clock and a read clock as described below.

A horizontal synchronizing signal separated by a known separation means from a video signal input to the device is applied to a terminal 312, and after being multiplied by n in a frequency multiplier circuit 313 using a known technology such as a PLL circuit, the signal is divided by a counter circuit. Frequency dividers 314, 31 each with a ratio of ffllpm2
The frequency is divided by 5 to obtain a write clock (sampling clock) and a read clock.

The write clock frequency fW is the vertical frequency fv of the video signal.
It is an integer multiple of , so setting it to 5 is convenient for the following explanation.

- As an example, if n-160, m1=56, ......(1), which satisfies the above and satisfies the audible range of the audio signal.

As mentioned above, the rotation of the disk is controlled so that the position of the address signal is within the vertical blanking or overscan period of the recorded video signal. ) and the track address signal (bl).

Counter 517 is cleared by the vertical synchronization signal input from terminal 616 and counts write clocks. The decoder 318 outputs Hi only when the binary output value of the counter 317 is a predetermined value, and can be realized by a combination of logic gates. Decoder 6
At 18, consecutive values of the counter 317 are detected, and an address gate of 5 is created as shown in FIG. 2(c)K.

At this time, since the write clock frequency is an integral multiple of the vertical frequency, both the two gate widths are clearly an integral multiple of the write clock cycle. The gate width is usually 3, which is the length of the address signal.
H2 (200 μs), for example, 1 m5), in order to eliminate fluctuations in the address period due to errors in the mounting position of the marker detector and distortions in the reproduced output caused by the response of a low-pass filter, which will be described later.

(c) tf, , D-7 lip-flop 3
The logical sum of the outputs Q (d) and Q (e) and the address gate (C) is calculated by the OR circuits 520a and 320b and the RAM switching signal (f
) and (g). Counters 322a and 322b write to or read from RAMs 505m and 505b, respectively, and provide address 5. Counter 522a
, 322b has a RAM switching signal (f) at its clock input.
.

The switches 321a and 321b, which are switched according to (g), apply a write clock when writing, and a read clock when writing continuously.

The interval between the start of writing in the RAM 305a and the start of writing in the RAM 305b is exactly one vertical scanning period if the writing clock frequency is an integral multiple of the vertical frequency, so the interval between the start of writing in the RAM 305a and the writing in the RAM 305b is exactly one vertical scanning period, which is equal to the gate period. The number of samples within a write period is an integer value that is the same even during the write period, and a fraction is produced, which is advantageous in terms of device design.

Regarding the read clock frequency fR, as shown in FIG.
), if we choose so that , we get m−4.
9, fR-514 becomes -, and at this time, TX-
11 ms, and the number of samples during the gate period is 50, and the total number of samples during the write period is 800.

The counters 322a and 322b are normal binary counters, and when the output value is -1 (2's complement representation, the same applies hereinafter), the carry output becomes Hi, and when the load input becomes Hi, the preset input value is will be loaded5
It has become. The preset value may be -N, where N is the number of samples within the writing period.

The operation will be explained below according to the above example. At the start of writing -
After being preset to 800, the write clock is counted and a carry is output with an output value of -1. At the same time, R
The AM switching signal (g) or (g) switches to readout, is preset to -800 again, and counts the readout clock. When the count advances to -1, a carry is output and R
AM switching becomes a write operation, -800 is loaded, a write operation starts again, and this process is repeated thereafter.

For convenience of explanation, the timing of carry, load, and RAM switching is assumed to be the same, but the number of clock pulses during writing and reading are both equal to the number of samples, and if this is matched with the preset value of the counter, writing Since the counter values match each other from the start to the end and from the start to the end of reading, the carry and load and RA
It is not necessary to switch M at the same time. Therefore, the configuration can be as simple as 5 as shown in FIG.

FIG. 2(h) shows the input waveform of the terminal 301, and FIG. 2(1) shows the output waveform of the low-pass filter 308.
In waveforms (h) and (1), A-F corresponds to A' to F'. Since the divider 315 is cleared by the address gate (C), no read clock is generated during this time (TI) and the output of the D/A converter 307 is muted.

In addition, the AB and CD periods in the input audio waveform (h) are written to both RAMs simultaneously, and when read out, the 5 times seen in the waveform (i) before and after the mute period (silent period).
Then, they are output redundantly as A/B/ and C/D/.

FIG. 3 is a block diagram showing an example of the configuration of an audio signal reproducing circuit in an embodiment of the present invention. Also, Figure 4 shows the 3rd
The signal waveforms of each part in the figure are shown, and the symbols a, c, and Jn correspond to each other in both figures.

In the configuration of FIG. 6, the portion from the upper left to the lower right via the upper right is the signal path section, and the lower part from the left to the center of the figure is the timing control section.

The signal path section includes an input terminal 501 and a bandpass filter 5.
02, FM demodulator 503, low pass filter 504, A
/D converter 505, buffer 506a.

506b1 RAM 507a, 507b, data selector 508, D/A converter 509, low pass filter 51
0, an output terminal 511, and the timing control section includes input terminals 512, 51.5, and a frequency multiplier circuit 513.
, frequency dividers 514, 515, counters 517, 520, decoders 518, 521, D-7 lip-flop 519,
It consists of an AND circuit 522, switches 525a, 523b, and counters 524a, 524b.

The operation of each part will be explained below.

A band pass filter 5 is applied to a reproduced signal reproduced from a disk (not shown) as a medium and inputted to a terminal 501.
At step 02, the audio FM signal is extracted.

The audio signal demodulated by the FM demodulator 503 is band-limited by the low-pass filter 504 and then converted into a digital signal by the A/D converter 505 in accordance with the write clock output from the divider 514.

A digital signal consists of two mutually opposite waveforms whose waveforms are shown in Figure 4.
The output is turned on by the RAM switching signal (S, (E)) of 11,
Through the buffers 506a and 506b that are turned off, R
It is written alternately to AM507a and 507b. In this case, the reproduced signal immediately after the muted period according to the address gate (C) during recording is band-limited by the filter in the recording circuit and the reproduction circuit, as shown by ■ in Fig. 4 (j). 5. Poor transient response.

If this part is used when restoring (expanding) the time axis, it will be output as noise in the playback output.

Therefore, when writing to the RAM, the signal (■) immediately after the mute period is avoided. As mentioned in 5 above, when recording, the same signal is recorded redundantly before and after the mute period, so if you play back using the part before muting, there will be no problem even if the later signal is not used. do not have.

On the other hand, digital signals are read out alternately from the RAMs 507a and 507b according to the RAM switching signal (4, (m),
The data selector 508 selects the output data of the FLAM on the read side, and the D/A converter 509 restores it to an analog signal according to the read clock.

At this time, the time axis compressed by the recording circuit is expanded again and returned to its original state. The analog signal output from the D/A converter 509 has a clock component removed by a low-pass filter 510.
It is output from the terminal 511 as a reproduced audio signal (n).

The RAM write clock and read clock are generated in the same way as in the recording circuit, after multiplying the horizontal synchronizing signal input to the terminal 512 by the frequency multiplier circuit 513 and then by the frequency divider 514.
It is obtained by dividing the frequency by 515.

During recording and reproduction, the writing and reading frequencies are reversed to restore (expand) the time axis. Counter 517 and decoder 51 that count read clocks
8, an address gate (7) synchronized with the vertical synchronizing signal (a) inputted to the terminal 516 is generated as in the case of recording.

Also, for the RAM switching signal, the address gate) (c) is D-
The output obtained in addition to the clock input of the flip-flop 519 (power and (E)) is used as is.

The write clock divider 514 is reset by the address gate (C), the counter 520 counts the write clock, and the decoder 521 detects that the binary output value of the counter 520 has exceeded a certain value. to obtain the write gate (k).

The function of this write gate (k) and the AND circuit 222 prevents the write clock from being applied to the counters 524a and 524b until the period in which the muted signals are overlapped ends. The clocks of counters 524a and 524b are R
According to AM switching signals (2) and (c), switch 52
5a and 525b, respectively. Since the write clock is gated by write gate (k), the number of write clock pulses and the number of read clock pulses applied to counters 524a, 524b match each other.

Therefore, if the preset values of the counters 524a and 524b are matched with the number of clock pulses, the cycle state of the counter output values during writing and reading will be the same as during recording, so there is no need to particularly consider the preset timing. Tomo RAM
Write and read operations are performed correctly.

As mentioned above, according to this embodiment, the signal processing during recording records audio on the disc while avoiding the period including the track address signal, and the signal of this period is not used during playback, so that the disc Audio can be recorded and played back without interference from address signals.

A further advantage is that the transient response of the filter to the sharp rise of the signal immediately after the mute period does not appear in the reproduced signal.

Furthermore, since the mute period can be made longer than the address signal period, no problem occurs even if the address signal position is slightly shifted due to an error in marker position detection.

In the above embodiment, the video signal processing method is color low-pass conversion, but the present invention is also effective for direct FM methods and buried subcarrier methods.

Furthermore, if the FM signal is muted using an address gate during recording, the address signal can be read stably because the audio FM does not interfere with the address signal.

In the above embodiment, the recording circuit and the reproducing circuit are separate, but the portion from the first low-pass filter to the second low-pass filter in the signal path section, the multiplier circuit, the divider, the counter, etc. in the timing control section are It is also possible to use it for both recording and playback.

Next, a method for recording and reproducing two channels of audio according to the present invention will be described.

In order to record and reproduce two channels of audio, two sets of signal paths from the input terminal to the output terminal are provided in the circuits shown in Figures 1 and 3, and two audio FM channels are connected to the disk.
You can record your career. In this case, the operation is the same as that described in the previous example except that there are two sets of signal paths.

Another method is to unify the FM carriers for two channels.

FIG. 5 shows the configuration of an audio recording circuit which is an embodiment of the present invention in this case. Moreover, FIG. 6 shows the operating waveforms of each part in FIG. 5, and the respective symbols 0 to V correspond in both figures.

In FIG. 5, it is divided into a signal path section extending from the upper left to the lower right via the upper right of the figure, and a timing control section occupying the lower part of the center from the left of the figure. The operation will be explained below.

The horizontal synchronization signal input to the terminal 713 is sent to the frequency multiplier circuit 7.
14, frequency divided by a divider 715 to become a write clock (0), and frequency divided by a divider 716 to become a read clock. The write clock (0) is frequency-divided by two by a D-flip-flop 724, and becomes an audio channel switching signal (p) at the time of writing.

1st. The audio signal of the second channel is connected to the terminal 701.
a and 701b, and low pass filter 702
After the band is limited by a and 702b, it is switched by the switch 703 according to the channel switching signal (p) and the A/D
Converter 704 is added.

In this way, in the A/D converter 704, the first . The audio on the second channel is alternately converted into a digital signal. The digital signals pass through buffers 705a and 705b whose outputs are turned on and off by RAM switching signals (u) and (v), which will be described later, and are transferred to RAMs 706a and 705b.
Selectively written to 06b. One of the address inputs of each FLAM is used for switching the audio signal channel, and a switch 725a is used for writing.

Channel switching signal (p
) to switch.

As described above, the digital signals of the first channel and the second channel are alternately written into the RAMs 706a and 706b at every write clock cycle.

The FLAM channel switching signal at the time of reading is generated by a counter 718 that counts the write clock and a decoder 719 that detects the output value of the counter 718, and is an address synchronized with the vertical synchronization signal (q) input from the terminal 717. gate (r), D-flip-flop 72
The output (1) obtained by dividing the frequency by 1 is used.

In addition, the RAM switching signal is the channel switching signal (1
) is divided by the D-7 lip-flop 722, and
The OR circuit 723a performs the logical sum with the address gate (r),
723b to obtain the signals shown in FIGS. 6(u) and (V), which are used. The RAM switching signal (u) is slightly longer than one frame of the video signal due to each of the above signals.
, over the period when M is Hi, the first . The audio of the second channel is written alternately to 5 as described above, and the length of the next frame is less than one frame ['LAM switching signal (U).

During the readout period in which (v) is Lo, the first field receives the audio of the first channel, and the next field receives the audio of the second channel according to the readout clock cleared by the address gate (r). Avoid reading.

The clock inputs of the counters 727a and 727b are switched between writing and reading using switches 726a and 726b.
The output values of the counters 727a and 727b circulate once in one write cycle and twice in one read cycle.

Note that the D-flip-flop 721 is reset by the frame synchronization signal (3) from the terminal 720, and the first .
5 so that the reading of the 2nd field and the 1st and 2nd channel audio always correspond.

The data read from the ELAMs 706a and 706b passes through a data selector 707 and is restored by an A/D converter 708 into a time-base compressed analog signal according to a read clock. The restored analog signal is passed through a low-pass filter 7
At step 09, the clock component is removed, and the FM modulator 710 generates an audio FM signal.The adder 711 adds the clock component to the video signal modulated by a video signal processing circuit (not shown), and outputs the signal to the terminal 71.
2 is output as a recording signal to the disc.

FIG. 7 is a block diagram showing the configuration of a two-channel audio reproduction circuit in another embodiment of the present invention. Also the 8th
The figure shows the operating waveforms of each part in FIG. 7, and the symbols 3 and W-2 correspond in both figures.

In Fig. 7, the part facing upward from left to right is the signal path section,
The timing control section is at the bottom.

The operation will be explained below.

An audio FM signal is extracted by a bandpass filter 902 from a playback signal input from the disc to a terminal 901,
It is demodulated by an FM demodulator 903.

The demodulated signal is band-limited by a low-pass filter 904, then converted to a digital signal by an A/D converter 90-5 according to the write clock, and then sent to buffers 906a and 906.
The data is written to the RAMs 907a and 907b via the RAM 907a and 907b.

The write clock is generated by multiplying the horizontal synchronizing signal input from the terminal 913 by a frequency multiplier circuit 914, and then multiplying the horizontal synchronizing signal by a frequency multiplier circuit 914.
Divide the frequency by . The address gate (s
), the write clock is counted and the decoder 91
8, it is detected that the value of the counter 917 has exceeded a certain value, and the AND circuit 919 calculates the AND of the output (b) of the decoder 918 and the write clock, and The signal is supplied as a clock to the A/D converter 905 and counters 929a and 929b, so that the portion where the signal immediately after the mute period is overlapped is not used for reproduction.

On the other hand, a read clock is generated by a branching unit 916. In addition, an address gate (s) is created by a counter 921 and a decoder 922 from the read clock and the vertical synchronization signal input to the terminal 920, and the frequency is divided by a D-flip-flop 923 to switch the channels of RAMs 907a and 907b during writing. Let it be signal (X).

Similar to the recording circuit, the D-7 lip-flop 923 is cleared by a frame pulse from the terminal 924.

The RAM switching signal is the output (y) obtained by dividing the output of the D-flip-flop 923 by the D-flip-flop 925.
, (z) is used. RAM switching signals (y) and (Z
), the switches 927a and 927b output the RAM channel switching signal, and the switches 928a and 928b output the counter 929a, ? The clock input of 29b is switched to write and read, respectively.

The clocks of the counters 929a and 929b at the time of reading are:
The output of the divider 916 is divided into two by a D-7 lip-flop 926.
The frequency is divided.

The output values of counters 929a and 929b are 2 within the write period.
times, and once within the read period. Further, the output of the D-7 lip-flop 926 is used as the RAM channel switching signal during reading.

Under the above five operations, the first . The audio signal of the second channel is written to the RAM in the order of the first channel and the second channel within a write period equal to the length of one frame, and reading is performed in the order of the first channel and the second channel every read clock cycle.
．． The second channel is alternately performed.

The data read from the RAM passes through a data selector 908 and is restored to an analog signal by a D/A converter 909. 1 output from the D-7 lip-flop 926.
Gate pulses with a phase difference of 80 degrees open analog gates 910a and 910b alternately, and the D/A converter 9
The two channels of signals alternately output from 09 are distributed. The distributed signals are each passed through a low-pass filter 911a.

The clock component is removed at 911b, and the terminals 912a, 91
2b is output as a reproduced audio signal.

As explained above, according to this embodiment, two channels of audio can be time-base compressed and recorded without using the address signal portion of the disc. At this time, since only one FM signal carrier is required, it is effective to reduce the cross-modulation interference imparted to the video signal.

[Effects of the Invention] According to the present invention, the audio accompanying the video is recorded by compressing the time axis so that it does not overlap with the track address signal portion recorded in advance on the disk, and the audio is expanded in the time axis during playback. Since the original audio is restored and output, the track address signal does not appear as noise in the reproduced audio. Furthermore, since the same signal is recorded redundantly before and after the mute period including the address signal portion, it is possible to prevent transient response distortion of the filter that occurs immediately after the mute period from appearing in the reproduced output.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing the configuration of an audio recording circuit in an embodiment of the present invention, Fig. 2 is a waveform diagram showing signal waveforms of each part in Fig. 1, and Fig. 3 is an embodiment of the invention. 4 is a block diagram showing the configuration of the audio reproduction circuit in FIG. 6. FIG. 4 is a waveform diagram showing the signal waveforms of each part in FIG. 6. FIG. 6 is a waveform diagram showing the signal waveforms of each part in FIG. 5, FIG. 7 is a block diagram showing a two-channel audio reproduction circuit in another embodiment of the present invention, and FIG. Waveform diagram showing signal waveforms of each part,
FIG. 9 is an enlarged perspective view showing the structure of a disk commonly used in optical recording and reproducing devices, FIG. 10 is a block diagram showing an example of the configuration of the main parts of a conventional optical recording and reproducing device, and FIG. 11 is a detailed explanatory diagram of the present invention. Code explanation 1...Disc, 2...Base material, 3...
...Guide groove, 4...Track address signal section,
5...Recording layer, 3゜2...Low pass filter, 303...A/D converter, 304a
, 504b--Buffer, 305a, 305b...
...RAM, 30 (S...data selector,
307...D/A conversion! , 308...
Low-pass filter, 309...FM modulator, 6
10... Adder, 313... Frequency multiplier circuit, 514, 515... frequency divider,
317...Counter, 318...Decoder, 619...Flip-flop, 321a
, 321b...Switch, 322a, 322b
... Counter, 502 ... Band pass filter, 503 ... FM demodulator, 504 ...
...Low pass filter, 505...A/D
Converter, 506a t506b...Buffer, 507a, 507b--RAM. 508...Data selector, 509...
・D/A conversion i, 510...Low pass filter, 513...Frequency multiplier circuit, 514, 515
... Frequency divider, 517... Counter, 518.
...Decoder, 519...D-flip-flop, 520...Counter, 521...
...Decoder, 523a, 523b--Switch, 524a. 524b...Counter,

Claims (1)

[Claims] 1) Optical recording in which a track address recording section is provided in a part of a spiral or concentric track formed on a disk-shaped recording medium, and image and audio signals are optically recorded and reproduced on the track. In the playback device, when the input audio signal to be recorded on the track is divided into certain ranges, the input audio signals are divided so that adjacent end portions of each division contain duplicate audio signals of the same content. and a time axis compression means for compressing the time axis for each section, and a time axis compression means for compressing the time axis for each section, so that the audio signal over each section after time axis compression is contained in the remaining portion of the track excluding the track address recording section, The track address recording unit includes recording means for recording the time-base compressed audio signal on the track so that the blank periods between the respective parts caused by the time-base compression correspond to each other; a reproduction means for reproducing the audio signal, and a time axis expansion of the reproduced audio signal to obtain the original audio signal;
With respect to the overlapping audio signal portions at the ends of each section, time axis expansion means obtains the original audio signal by discarding the signal portion containing more noise and using the remaining portion to expand the time axis;
An optical recording/reproducing device comprising: