JPS6117442Y2 - - Google Patents

Description

[Detailed Description of the Invention] This invention relates to an improvement of an abnormal state monitoring canceling device.

An automatic insertion device for integrated circuit (hereinafter referred to as IC) components includes a plurality of component feeding sections and a plurality of monitoring sections that monitor whether or not components are being fed as essential components. As shown in Fig. 1, each component feeding section has a magazine 2 which stores a large number of IC components 1 arranged in a vertical direction, a magazine 2 arranged in a horizontal direction, and a magazine 2 arranged in a row in the last column of this magazine row. Spring mechanism 4 for pressing it and positioning it so that the lower end opening of the magazine in the front row communicates with the chute 8
, a gate mechanism 5 which is rotated counterclockwise around a fulcrum 5a by a control unit (not shown) to allow the passage of the IC components 1 one by one, and a gate mechanism 5 provided corresponding to the magazine in the front row. an ejection mechanism 6 for kicking out the magazine in the front direction on the paper by using an L-shaped lever 6b that rotates when the rod 6a is pulled up in the axial direction by a solenoid 7, which will be described later; and a monitoring section, which will be described later. The solenoid 7 is energized by the output of the solenoid 7. Further, the monitoring section includes a photo sensor 8 provided at the magazine connection side entrance of the chute 3.

When the photo sensor 8 detects a non-feeding state of parts, the solenoid 7 and the ejecting mechanism 6 are activated to kick out the empty magazine so that the magazine in the next row corresponds to the chute 3. , which enables continuous feeding of IC components. By the way, in this device, if no parts are fed within a predetermined time after detection by the sensor (for example, if the magazine in the last row is kicked out), each indicator attached to each feeding section is activated. , a control circuit is provided to remind the operator to replenish IC parts. In conventional devices, this control circuit is individually provided in each component feeding section. For this reason, as the number of component feeding sections increases, the size of the device increases.

From the above point of view, this invention aims to simplify the structure by sharing the signal processing section between a large number of abnormality detection sensors and an abnormal state release control section in order to effectively apply it to an automatic IC component insertion device. With,
It is an object of the present invention to provide a novel abnormal state monitoring/cancellation device which allows a detection signal to be input to an abnormal state cancellation control section even when abnormality is detected in a large number of sensors. Briefly stated, this invention includes a plurality of abnormality detection sensors provided respectively for a plurality of component storage magazines, and an abnormality release control section that controls kicking out the magazine with no components based on the detection of non-feeding of components by the sensor. An abnormal state monitoring and canceling device comprising: a plurality of abnormal state monitoring and canceling devices, each of which has an output terminal inputted from each of the abnormality detection sensors to one input terminal, and whose output terminals are connected to a common OR circuit; an exclusive OR circuit, a drive circuit that drives a magazine kicking means corresponding to a magazine without components by the output of the common OR circuit and the output of the abnormality detection sensor group, and a drive circuit that drives a magazine kicking means corresponding to a magazine without components, and a drive circuit that drives a magazine kick-out means corresponding to a magazine without components, and a drive circuit that drives a magazine kick-out means corresponding to a magazine without parts by the output of the common OR circuit and the non-feeding of components by the output of the OR circuit. a timer circuit for detecting a state; a flip-flop circuit having a control input terminal for inputting the output of the exclusive OR circuit; and an output terminal connected to the other input terminal of the exclusive OR circuit; and a circuit for inputting the clock signal to the clock terminal of the flip-flop circuit.

Hereinafter, an embodiment in which this invention is applied to an automatic IC component insertion device will be described in detail with reference to the drawings. In FIG. 2, 11a to 11n are input terminals connected to each photo sensor shown in the first diagram, 12a to 12n are exclusive OR circuits, and each input terminal has the input terminals 11a to 11n connected to each other.
The Q output terminals of JK type flip-flop circuits (hereinafter referred to as FF circuits) 13a to 13n are respectively connected to the second input terminal, and the output terminals thereof are respectively connected to a plurality of input terminals a to n of the OR circuit 14. ing. Each K terminal of the FF circuits 13a to 13n is grounded, the J terminal is connected to the output terminal of the exclusive OR circuit 12a to 12n, the reset terminal R is connected to the input terminal 11a to 11n, and the clock terminal CK is connected to the output terminal of the exclusive OR circuit 12a to 12n. is designed to receive a clock pulse, which will be described later. This FF circuit and exclusive OR circuit constitute a matching circuit.

On the other hand, the output of the OR circuit 14 is input to the first monostable circuit 15 as an interrupt signal. The pulse output of the first monostable circuit 15 is branched, one being supplied to a solenoid drive circuit 16 and the other being supplied to a timer circuit 17. The drive circuit 16 is an AND circuit group 161 that takes the AND of the outputs of the exclusive OR circuits 12a to 12n and the pulse output.
a to 161n, and transistor groups 162a to 162n that control energization of the solenoids 18a to 18n by these circuits. These solenoids 18a to 18n correspond to the solenoid 7 shown in the first diagram.

The timer circuit 17 continues to output a positive pulse for a predetermined period of time and supplies it to the second monostable circuit 19 . This monostable circuit 19 outputs a positive pulse in response to the fall of the timer output, and outputs a positive pulse to one of the first NAND circuits 201 of the clock pulse passage control circuit 20.
Supplied to the input terminal. A clock pulse is input to the other input terminal of the first NAND circuit 201.
And its output terminal is connected to the second NAND circuit 202. The output terminal of the second NAND circuit is
They are connected to n clock terminals CK of FF circuits 13a to 13, respectively. In addition, 21a-21n is a display part, and is comprised from NAND circuit 211a-211n and light emitting diode 212a-212n.

Regarding the above configuration, an example of operation will be described next. The photo sensor currently connected to the input terminal 11a is
Assume that a non-feeding state of IC components is detected. Then, a high level H signal is generated at the input terminal 11a, and the exclusive OR circuit 12a outputs the H signal.
As a result, the output of the OR circuit 14 becomes an H signal, and the first monostable circuit 15 outputs a positive pulse. AND circuit 16 in drive circuit 16
1a generates an H signal by receiving the H signal from the exclusive OR circuit 12a and the positive pulse, so the solenoid 18a is energized by turning on the corresponding transistor 162a.
As a result, as described above, the empty magazine in the corresponding component feeding section is kicked out.

On the other hand, in parallel with this movement of kicking out the magazine,
The timer circuit 17 is activated by the pulse output of the first monostable circuit 15 and outputs a positive pulse for a predetermined period of time. The second monostable circuit 19 outputs a positive pulse at the falling edge of this pulse. The first NAND circuit 201 of the clock pulse passage control circuit 20 opens its gate in response to this pulse output to allow the passage of the clock pulse, and the passed clock pulse is inverted by the second NAND circuit 202 and sent to the next FF circuit 12a. Supplied to clock terminal CK.

At this time, the non-feeding state of parts continues based on the above-mentioned reason, and the input terminal 1
If a is an H signal, the FF circuit 12a generates an H signal from the Q output terminal since the J terminal is in the H state and the K terminal is in the L (low level) state. As a result, the output of the exclusive OR circuit 12a becomes an L signal.
Therefore, since the output interrupt signal of the OR circuit 14 becomes an L signal, subsequent interrupt signals generated for the next-stage monostable circuit 15 and the like become valid, enabling the same control operation as described above. In this case, since the light emitting diode 212a of the display section 21a continues to light up, the operator can know from this light emission that IC parts need to be replenished.

When the feeding state of the IC component is detected and the input terminal 11a becomes an L signal, the FF circuit 1
3a is reset to produce an L signal output, and as a result, exclusive OR circuit 12a outputs an L signal. Therefore, similar to the above, it is possible to process other interrupt signals.

As is clear from the above explanation, according to this invention, by providing a matching circuit consisting of an exclusive OR circuit and an FF circuit in the output signal processing circuits of a large number of abnormality detection sensors, Since the control section can be shared by each system, the device can be downsized. Further, even when a large number of abnormality detection states occur, there is a great advantage that all of the signal processing can be performed without any problem. Therefore, it would be extremely advantageous to apply this invention to an automatic IC component insertion device or the like.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the main parts of an automatic IC component insertion device, and FIG. 2 is a circuit diagram showing one embodiment of this invention. 1: IC parts, 2: Magazine, 3: Shoot,
4: Spring mechanism, 5: Gate mechanism, 6: Discharge mechanism, 7 and 18a to 18n: Solenoid,
8: Photo sensor, 11a to 11n: Input terminal,
12a-12n: exclusive OR circuit, 13a-13
n: flip-flop circuit, 14: OR circuit, 1
5 and 19: monostable circuit, 16: drive circuit, 1
7: Timer circuit, 20: Clock pulse passage control circuit, 21: Display section.

Claims (1)

[Scope of utility model registration request] An abnormal state monitoring and canceling device consisting of a plurality of abnormality detection sensors provided corresponding to a plurality of component storage magazines, and an abnormal state canceling control unit that controls kicking out the magazine without parts based on the sensor's detection of non-feeding of parts. The abnormal state release control unit includes a plurality of exclusive OR circuits each inputting the output of each of the abnormality detection sensors individually to one input terminal and connecting the output terminals to a common OR circuit; A drive circuit that drives a magazine kick-out means corresponding to a magazine without components using the output of a common OR circuit and the output of a group of abnormality detection sensors, and a timer circuit that detects a non-feeding state of components based on the output of the OR circuit. a flip-flop circuit having a control input terminal into which the output of the exclusive OR circuit is input, and an output terminal connected to the other input terminal of the OR circuit; and a flip-flop circuit that supplies a clock pulse to the clock terminal of the flip-flop circuit based on the output of the timer circuit. An abnormal state monitoring and canceling device comprising: an input circuit;