JPS61163758A - Transmitting information assigning system to time slot, and its transmitting information assigning device - Google Patents

Abstract

PURPOSE:To determine an address of information to be sent out without waiting for a processing of other loop, and to insert the information to be sent out of the own node to all loops, into an idle time slot without excess or shortage, by monitoring idle/busy states of a time slot independently at every loop, and storing the quantity of a data which has been sent out. CONSTITUTION:When a time slot is inputted to a receiving loop interface (R-L IF)10 from a loop 1, and it is analyzed that idle/busy (I/B) information is I, or an incoming node bit DA is the own node, idle information I information) is sent out to I/B analyzing parts 20, 21 and 22 corresponding to each loop. Address counters 40, 41 and 42 which have received already transmitted time slot numbers TN1, TN2 and TN3 stored in time slot number memories 30, 31 and 32, respectively, from the I/B analyzing parts 20, 21 and 22 calculates an address head of information to be sent out to each loop from TN1, TN2 and TN3, respectively, and sends out simultaneously an address of a one time slot portion from the address head to buffer memories 50, 51 and 52.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention provides a slosotef link (sl) having multiple loops.
The present invention relates to a transmission information assignment method and a transmission information assignment device for allocating information to be transmitted from a self-node to empty time slots of each loop without excess or deficiency in an information communication system based on a otted ring system.

[Prior art]

When constructing a large-capacity communication system using the slotted ring method, a multiple loop configuration may be considered in order to suppress an increase in loop speed.

In this case, if each time slot of multiple loops is logically treated as a time slot of one loop, multiple loops can be used efficiently with various data without using complicated system selection. In that case, each node sends information from its own node to its own node in a logically unified loop or to an empty time slot in order, regardless of the position of the previously used time slot. go. In this method, in order to accommodate the loop speed when multiple loops are logically regarded as one, a buffer memory with the same content is installed for each loop, and a series of data is sent from there to different loops at once. . In this method, in order to execute such a sequence, information is allocated to time slots by checking whether the time slots can transmit information in order from the upper loop and counting the number of time slots that can transmit information one by one. It was something.

Such a conventional information allocation method will be explained with reference to FIGS. 4, 5, and 6.

FIG. 4 is a diagram showing an information string on a loop, FIG. 5 is a diagram for explaining a conventional information allocation method, and FIG. 6 is a timing diagram showing the operation of the method of FIG.

It is assumed that data divided into time slots flows on each loop as shown in FIG. Information flowing through the loop is divided into frames according to the time corresponding to the loop cycle, and at the beginning of each frame there is a bit F indicating the beginning of the frame. The information field surrounded by bit F is divided into a certain number of time slots, and each time slot is free or unused (idle, Idl).
e) I/B bit indicating blockage or use (Busy); DA bit indicating destination node; SA bit indicating originating node; and INF bit, which is information.

In FIG. 5, each loop 1. 2. The loop interface 91.92.93 of No. 3 is used when the time slot currently being viewed is addressed to its own node or is a completely empty time slot, as shown in FIG. 6 (1).

Idle information (l information) as shown in (2) and (3)
is output to the time slot selection unit 101 (1 indicates an empty state, 0 indicates a blocked state). Data transmission control unit 111
When receiving l information from the time slot selection section 101, the l information from each loop is latched by a signal outputted from the counter 120 in which the time slot is divided into the number of loops as shown in FIG. 6(4). , one pulse is output for each empty time slot as shown in FIG. 6(5). Furthermore, when the buffer memories 141, 142, and 143 of each loop are ready to send out the information to be sent, the data sending control unit 111 switches only the loop whose time slot is empty among the switches 121, 122, and 123. Close and output information to the loop. After the address counter 131 is reset by a frame pulse, the address counter 131 is reset as shown in FIG.
It receives a signal like 5) and continues to count the pulses for each frame, counting the number of empty time slots from the beginning of the frame as shown in FIG. 5(6). Furthermore, the buffer memory of the loop indicated by the counter 120 is stored in FIG.
7), the value of the address counter 131 is sent as an address. At that time, the output to the loop that is not empty is set to high impedance (H). Buffer memory 1
41, 142.degree. 143 receives an address from the address counter 131 and holds the address until all loops have the same address. When all the addresses are ready, from the buffer memory 141, 142, 143,
Information is output all at once as shown in (9) and (10). At this time, information is not read from the buffer memory whose address is high impedance. Among the switches 121, 122, and 123, the loop switch through which information is sent out is closed by the data sending control unit 111 as described above, so the information read from the buffer memory is sent as is to the loop interface and sent onto the loop. sent to.

[Problems with conventional technology]

As described above, in the conventional information allocation method, there is only one processing device for each loop, and the processing for all the loops used in sequence must be performed within one time slot. If so, all counter and memory operations must be completed within the time slot length/n, and as n increases, the counter 120, time slot selection unit 101 . Data transmission control unit 111. The processing speed of the transmission information allocation device consisting of the address counter 131 increases. Therefore, the transmission information allocation device must be designed to operate at a speed commensurate with the maximum number of installed loops. However,
In this way, if the number of loops is less than the maximum number of installations,
The transmission information allocation device becomes over-quality. Furthermore, as a matter of course, it is not possible to add more loops than the maximum number of installed loops.

In addition, in the conventional method, data for all loops cannot be sent until the information allocation device finishes processing the last loop and the data comes out from the buffer memory, which results in node delay [Figure 6 (8)] , (9), (
10)) had the disadvantage of becoming large.

[Purpose of the invention]

The purpose of the present invention is to independently monitor the vacant/occluded time slots (1/B) in the same phase of all loops for each loop, and to store the amount of data sent out, so that the processing of other loops can be easily performed. Determines the address of the information to be sent to the own node independently of the loop without waiting for the loop, and inserts the information to be sent from the own node into all loops with the minimum node delay, without over or under empty time slots. The purpose of the present invention is to provide a transmission information allocation method for

Another object of the present invention is to provide a transmission information allocation method in which the operating speed of the transmission information allocation device does not change as the number of loops increases and the number of loops can be easily maintained and expanded.

Still another object of the present invention is to provide a transmission information allocation device used to implement the above information allocation method.

[Structure of the invention]

The first invention connects multiple nodes through multiple loops, provides a frame with a fixed time period on each loop, divides this frame into multiple time slots, and each node transmits information to be transmitted to its own node. In an information communication system in which communication is performed in units of time slots between nodes without duplication of information using arbitrary free time slots on the plurality of loops, the free time of each loop is This is a time slot transmission information allocation method that allocates information to be transmitted from its own node to slots without excess or deficiency, in which each loop corresponding part of each node memorizes already transmitted information that the own node has already transmitted to other nodes. , and monitors the empty/occluded status of time slots in the same phase of all loops, and in a loop in which an empty time slot is detected, the portion corresponding to that loop is equal to the amount of transmitted information and the empty time slot of all loops. /It is characterized in that the node determines the information to be transmitted in an empty time slot of the loop among the information to be transmitted depending on the blockage state.

The second invention connects multiple nodes through multiple loops, provides a frame with a fixed time period on each loop, divides this frame into multiple time slots, and each node transmits information to its own node. In an information communication system in which communication is performed in units of time slots between nodes without duplication of information using arbitrary free time slots 7) on the plurality of loops, It is a time slot transmission information allocation device that is provided for loops and allocates information to be transmitted from its own node to empty time slots of each loop without excess or deficiency.It divides all loops into two loop groups and divides each loop into two groups. a first and second counting circuit that counts the number of free time slots, a memory circuit that stores the amount of transmitted information, and adds the outputs of the first counting circuit and the memory circuit, and calculates the result as a free time slot. A first arithmetic circuit outputs the position of information to be transmitted to a slot, the outputs of the first and second counting circuits, and the memory circuit are added, and the result is stored in the memory circuit as a new amount of transmitted information. and a second arithmetic circuit that receives input as follows.

(Operation and principle of the present invention) In the present invention, the device for allocating transmission information to time slots is made independent for each loop.Then, each device receives and takes free information (■ information) from all loops, and its I information. Divide into two groups depending on whether the loop is higher than the own loop or not. Count the number of I information in each divided group,
Separately, the i information of the loop higher than the own loop is added to the number of already transmitted time slots stored for each loop. This value becomes the head address of the data to be transmitted from the own loop. In addition, the value of the loop below the self-loop is
The information added is the number of transmitted time slots up to the previous time slot. Thus, according to the present invention, the transmission information allocation device of each loop can operate independently (independently) of the transmission information allocation devices of other loops.

〔Example〕

FIG. 1 is a diagram for explaining an embodiment of the transmission information allocation method of the present invention, and shows an independent transmission information allocation device for each loop.

In the slotted ring method, in which multiple loops are provided with a frame with a fixed time period, and the frame is divided into multiple time slots as a unit for transmitting and receiving information, a In this embodiment, the information to be sent from the own node must be allocated to the time slots that can be used by the own node. This section describes the configuration of the time-slow/tohe transmission information allocation method, which performs the following operations independently and in parallel in each loop, and allocates transmission information to empty time slots while maintaining the order of the information to be transmitted. In Figure 1, loop 1. 2
．． 3 (Figure 1 shows the case where there are three loops), and receiving loop interfaces (R-LIF) 10, 11.12 that receive and receive signals from these R-LIFs.
- Idle/busy analysis unit that receives I/B information of time slots of all loops from LIFIo and 11.12 and simultaneously outputs how many empty time slots there are in time slots of the same phase for each loop ( 1/B analysis unit') 20.21.22 and how many free time slots there were in the previous time slot, that is, how much information was sent to the loop using those time slots. Time slot number memories 30, 31.32 receive and store signals from the B analysis units 20.21.22, respectively, and the I/B analysis units 20.21.
Address counters 40, 41, and 42 receive and receive signals from 22 and time slot number memory 30, 31, and 32, respectively, and calculate the address of the information to be sent. Sending buffer memories 50, 51, 52 and R-LI
F.I.O.

Transmission loop interface (T-LIF) 60.61 that transmits information passing through the node from 11.12 and information output from the buffer memory 50.51.52 of its own node in response to time slot (7) [/B .62. In FIG. 1, an I/B analysis section, a time slot number memory, and an address counter constitute a transmission information allocation device.

Next, the operation of this embodiment will be explained.

The information that goes around the loop is the information string explained in FIG. 4, and therefore the explanation again will be omitted. From loop 1, the time slot enters R-LIFIO and R-L I
In F10, if the I/B information is ■ or the destination node bit DA is analyzed to be the own node, R-LIFIO determines that the current time slot is used for transmitting information from the own node. It is recognized that it is available, that is, it is free, and the idle information (I information) is sent to the I/B corresponding to each loop.
It is sent to the analysis section 20.21.22.

R-LIFll, 12 similarly analyzes the incoming time slot, and sends the information (1) to all I/B analysis units 20, 21, and 22 corresponding to each loop.

Each 1/B analysis section 20, 21, 22 is all R-LI
Based on the I information sent from FI0.11.12, it is divided into two groups: loops higher than the own loop (including the own loop) and lower loops, and how many time slots are available for the loops higher than the own loop. Count how many children are struggling. Then, in each loop, the number of transmitted time slots stored in each time slot number memory 30, 31, 32 is added to the number of available time slots, and the value is set to TNl, TN2, .
Let's call it TN3. Furthermore, if the own loop is free, TNl
, TN2. TN3 to address counter 40.41.42
Send to.

Table 1 below shows the values of each part of the transmission information allocation device to the time slot of each loop when there are eight loops.

Table 1 In this table, in loop 2, based on information from the R-LIF, it can be seen that loop 1, which is the upper loop, cannot transmit, and its own loop, which is the upper loop, can transmit. Add 1 to the number of transmitted time slots 5 stored in the slot number memory 31. Then, the value 6 (TN2) is sent to the address counter 41. on the other hand,
Information to be transmitted from each node during one frame is similarly written in triplicate in the buffer memories 50, 51, and 52. Then, TNI, TN2. Address counters 40, 41, and 42 that received TN3 are TNI and TN, respectively.
2. The address head of the information to be sent to each loop is calculated from the TN3, and the addresses for one time slot are simultaneously sent to the buffer memories 50, 51, and 52 from the address head. Then, a loop l is made from the buffer memory 50, 51.52 to each T-LIF 60, 61.62.

The information to be sent to 2.3 is sent. Each T-LIF6
0,61.62 is if the time slot is available.
The information sent from the buffer memories 50, 51, and 52 is sent to the loop, and if it is unavailable, the information is sent to the R-LIFIO,
It receives the time slots passing through its own loop from 11 and 12 and sends them out onto the loop as they are.

The above processing is performed for each loop. For example, in the case of the eight loops shown in Table 1, if the time slot usage status is as shown in the second column of Table 1 (1 indicates that it can be used in the current timesloft), then I/ As shown in the third column of Table 1, the B analysis unit calculates the number of usable time slots in loops higher than the own loop. Adding the time slot number memory value (fourth column) to this gives the buffer memory head address (fifth column), and the next second
As shown in the table, all information is sent out on the loop in order.

Table 2 And finally, we need to know how much information has been sent in the current time slot, so we add one piece of information from a loop below the current loop to the value of the time slot number memory of each loop, and calculate the amount of information sent in the current time slot. Count the timesloft number. Then, the number of transmitted time slots is written again into the time slot number memory of each loop, and the operation for one time slot is completed.

As explained above, in this embodiment, by providing a transmission information allocation device that operates independently for each loop, the processing of each loop is performed in parallel, reducing the operating speed of each transmission information allocation device. can do. Also,
Since all the data to be sent to the loop is collected at once, node delays can be reduced without unnecessary buffering.

Furthermore, according to this embodiment, since there is no device shared between loops, maintenance and expansion can be performed for each loop without affecting other loops.

FIG. 2 is a diagram showing another embodiment of the transmission information allocation device. The node delay when using the information allocation method explained in FIG.
0.21.22, it takes the time from when the information is input until the head address of the information is output from the address counters 40, 41.42. Therefore, a method of configuring a transmission information allocation device that takes a short time from receiving I information to outputting a head address will be described.

FIG. 2 shows a transmission information allocation device for the second loop when there are three loops, and the transmission information allocation device receives the I information output from the R-L IFIo, 11. AND circuits 200, 210, 220 for gating using addition switching signals, and one of the three outputs of the three AND circuits as input.
Read-only memory (ROM) 2 that outputs the number of information
30, a time slot number memory 240 that stores information about whether or not an empty time slot has come to the local node before the current time slot, and a ROM 23.
0 and the output of the time slot number memory 240, and a 3-state buffer 260 that sends the output of the ADD 250 to the address counter 41 shown in FIG. 1 by an addition switching signal. .

Next, the operation of this transmission information allocation device will be explained. FIG. 3 is a timing diagram showing the operation of FIG. 2. Third
The signals shown in Figures (1), (2), (, 3), that is, in the first time slot, loop 1 and loop 3 are in the I state, and in the next time slot, only loop 2 is in the I state. If a signal comes in, the self-loop (loop 2
) In order to count the number of loops in the ■ state in the upper loops, in this case loops 1 and 2, the addition switching signal is set to HIGH as shown in Figure 3 (4), and the ■ information is transferred to the game. and loop 1. Only the I information of loop 2 is input to the ROM 230. As shown in Table 3 below, the ROM 230 is designed to output the number of input states in binary, so in this example, it outputs 1 as shown in Figure 3 (5). .

The output of the third table ROM 230 is added to the value of the time slot number memory 240 by the ADD 250, and the added value is sent to the address counter 41 as a head address indicating the address where the information to be sent to this loop is located. Then, it is further written into the time slot number memory 240. In this example, if 8 is written in the time slot number memory 240, 1 is added and
), 9 is the head address (T N),
The value of the time slot number memory is also 9 as shown in FIG. 3 (7).

Next, in the second half of the time slot, it is necessary to know how much information has been sent in the current time slot, so information of the loops lower than the own loop (loop 2) is input to the ROM 230 by the addition switching signal. . In this example, the ■ information of loop 3 is input to the ROM 230. Then, it will output whether there are any loops in the state below the self-loop. That is, in this case, 1 is output as shown in FIG. 3 (5). This value is also added to the value of the time slot number memory 240 and written to the time slot number memory 240 again.

Therefore, in this example, the number is 10 as shown in FIG. 3 (7). This value becomes the number of time slots for information sent so far, and will be used in the next time slot. In this way, the head address (TN) of the information to be sent by the own loop is sent to the address counter 41 for each time slot.

In this embodiment, ROM230. Time slot number memory 240. The ADD 250 is used in a time-division manner using an addition switching signal, and the head address of information to be transmitted and the number of transmitted time slots are calculated in a time-division manner. In this case, the ROM 230. There is not enough room in the operating speed of the time slot number memory 240 and ADD 250.
Next, the contents of the time slot number memory 240 are read only once within one time slot, and the two ADDs 25 are
By inputting the head address of the information to be transmitted in parallel and the number of already transmitted time slots, it is possible to obtain the head address of the information to be transmitted in parallel and the number of transmitted time slots by inputting the data to both of the ROMs 230 and 230 and summing the outputs of the two ROMs 230.

As explained above, in this embodiment, the idle/busy analysis and time slot number memory are performed using the ROM 230 without using a sequential circuit, and the head address of the information to be output from the own node and the previous time slot are stored. An idler that also has the function of counting sent information.
Realize the busy analysis section. As a result, all processing can be performed in a loop, and ■ From the time the information enters the information allocation device until the head address of the information to be sent out is
It only takes about the time required to read the OM 230 plus the addition time of the ADD 250. Furthermore, the time it takes for information to go out into the loop is only as long as the time it takes for the head address to come out plus the readout time of the buffer memory 51. That is, it is possible to realize a node delay that is sufficiently shorter than the time slot length + α.

Although the present invention has been described in detail above, the present invention is not limited to these embodiments, and it goes without saying that various modifications and changes can be made within the scope of the present invention.

〔Effect of the invention〕

As explained above, according to the present invention, the address of the information to be sent to the own loop is determined independently without waiting for the processing of other loops, and the address of the information to be sent to the own loop is determined without waiting for the processing of other loops. Due to the delay, it is possible to obtain a transmission information allocation method that can insert information to be sent from the own node into all loops. □ According to the transmission information allocation method of the present invention, since there is no device shared between loops, maintenance and expansion of loops can be easily performed.

Further, according to the present invention, it is possible to obtain a transmission information allocation device suitable for use in the above transmission information allocation method.

[Brief explanation of the drawing]

FIG. 1 is a diagram for explaining an embodiment of the transmission information allocation method of the present invention, FIG. 2 is a diagram illustrating an embodiment of the transmission information assignment device of the invention, and FIG. FIG. 4 is a timing diagram showing the operation of the transmission information allocation device shown in FIG. 4. FIG. 4 is a diagram showing the information string on the loop when slotted ring is used. FIG. FIG. 6 is a timing diagram showing the operation of the conventional example shown in FIG. 10.11.12...Receive loop interface 2
0.21.22...I/B analysis section 30.31.32.240・Time slot number memory 4
0.41.42.13 Door address counter 50.51.
52,141,142.143...Buffer memory 60
．． 61.62...Transmission loop interface 90.
91.92...Loop interface 101 ・
...Time slot selection section 111 ...Data transmission control section 120 ...Counter 121, 122.123 - Switch 200.21
0.220 ・AND circuit 230 ...RO
M 250...ADD 260...3-state buffer Figure 1 F: Fray Heme Inu J Ryoki 7t, y Bizuhi SA: J
'(Ai Node IL7r-Henbizuto INF: + IIIf Night Pit (1) Rua l Empty. 4-1-l Time Slot → ←Tuna 4S Life Technique Hour → Fig. 3 Fig. 5

Claims (6)

[Claims] (1) Multiple nodes are connected by multiple loops, a frame with a fixed time period is provided on each loop, this frame is divided into multiple time slots, and each node sends information to each loop within its own node. In an information communication system in which communication is performed in units of time slots between nodes without duplication of information using arbitrary free time slots on the plurality of loops by storing data redundantly in corresponding parts, the own node is stored in the free time slots of each loop. This is a transmission information allocation method to time slots in which information to be transmitted is allocated just the right amount of information to time slots, in which each loop corresponding part of each node memorizes the already transmitted information that the own node has already transmitted to other nodes, and The vacant/occluded states of time slots in the same phase are monitored, and in a loop in which an unoccupied time slot is detected, the portion corresponding to that loop is determined by the amount of previously transmitted information and the vacant/occluded time slots of all the loops. A method for allocating transmission information to time slots, characterized in that, among the information to be transmitted by a loop, information to be transmitted to an empty time slot of the loop is determined. (2) The amount of transmitted information is calculated for each loop by accumulating vacant/occluded state monitoring outputs of the same phase time slots of all the loops. transmission information allocation method to time slots. (3) The information to be transmitted to the vacant time slot is determined by dividing the loops into two groups: loops higher than the self-loop and loops lower than the self-loop in monitoring the vacant/blocked states of time slots in the same phase of all the loops. Claim 1 or 2, characterized in that the time processing is performed by dividing the number of free time slots in the upper loop and adding the already transmitted information amount to the result of calculating the number of free time slots in the upper loop. Transmission information allocation method to slots. (4) Multiple nodes are connected by multiple loops, a frame with a fixed time period is provided on each loop, this frame is divided into multiple time slots, and each node sends information to each loop within its own node. In an information communication system in which communication is performed in units of time slots between nodes without duplication of information by storing redundant information in corresponding portions and using any free time slots on the plurality of loops, , a transmission information allocation device for time slots that allocates information to be transmitted from its own node to empty time slots of each loop without excess or deficiency, the device divides all loops into two loop groups and assigns information to the empty time slots of each group. a first and a second counting circuit that counts the number of times; a memory circuit that stores the amount of transmitted information; the outputs of the first counting circuit and the memory circuit are added; and the result is transmitted to an empty time slot. a first arithmetic circuit that outputs the position of the exponent information, a first arithmetic circuit that adds the outputs of the first and second counting circuits, and the memory circuit, and inputs the result to the memory circuit as a new amount of transmitted information; 1. An apparatus for allocating transmission information to time slots, characterized in that it is comprised of two arithmetic circuits. (5) By counting the number of empty time slots in the two loop groups, and calculating the amount of transmitted information and the position of information to be transmitted in the empty time slots, respectively, in a time-sharing manner,
Claim 4, characterized in that the first and second counting circuits are composed of one counting circuit, and the first and second arithmetic circuits are composed of one arithmetic circuit. Device for allocating transmission information to the time slots described. (6) The apparatus for allocating transmission information to time slots according to claim 5, wherein the one counting circuit is constituted by a read-only memory.