JPS61163740A - Time division multiplex communication device - Google Patents

Abstract

PURPOSE:To execute a time slot switching of a non-bit which is free from out of frame by providing plural multiplexing pattern generating memories for generating each different time slot pattern, and constituting them so that it is synchronized with the other station and brought to a switching control. CONSTITUTION:A use state of each terminal interface 1 is monitored by a control circuit 10, and when switching of a time slot is generated, the contents of pattern generating memories of master and slave station devices are transferred to each other and confirmed, and when the transfer and collation is ended, a switching ready signal is sent out of a switching signal generating circuit 3 of the master station. The slave station receives the switching ready signal sent from the master station, by a converting signal detecting circuit 4, detects its switching timing, and transfers a signal of the same contents to the master station through a switching signal transferring circuit, as soon as the switching operation is prepared. The master station outputs a switching control (request) signal whose phase is phaselocked with a frame synchronization, to a multiplexing pattern switching circuit 7, and switches the multiplexing pattern generating memory 8 of the own station.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a time division multiplex communication device that digitizes telephone, data and image information and transmits the digitalized information using a time division multiplex system.

[Conventional technology]

Figure 2 is an example of a circuit configuration for multiplexing data of terminal equipment in a conventional circuit. In the figure, (1) is a terminal interface circuit for connecting with terminal equipment, (2) is a transmission line interface circuit, and Frame synchronization generation circuit, I9
) is a pattern generation circuit. These (1), +2
1, (61 and 19) constitute one station (master station or its slave station).

Next, the operation will be explained.

Received data from the transmission path is converted from a transmission code (for example, a CMI code) to an NRZ code, and after extracting the frame synchronization of the received data, the frame synchronization generated by the frame synchronization generation circuit (6) is transmitted and received by the device. synchronize data.

The pattern generation circuit 191 fixedly controls time slots for inputting/outputting data sent and received from a plurality of terminal interfaces (11) to and from each transmission/reception bus, and selects a terminal interface (1) corresponding to each time slot.
are sequentially connected to the transmission line via the transmission line interface (21).

[Problem that the invention seeks to solve]

Conventional time-division multiplex communication equipment is configured as described above, so even if a specific terminal interface (terminal device) is unused, that terminal interface occupies a time slot in a specific manner, so the transmission efficiency decreases. Is there a problem with this, such as getting worse and not being able to freely transmit more information at any time?

The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to provide a time division multiplexing system which switches time slots as necessary and has good transmission efficiency.

[Means for resolving gaps]

The time division multiplex communication device according to the present invention is provided with a plurality of multiplex pattern generation memories that generate mutually different time slot patterns, and controls switching as necessary by synchronizing the phase with the synchronization frame between each station. This is used to change the time slot of the terminal interface.

[Effect]

Since the time slot switching control in this invention relatively controls the switching signals between the master station and the slave station, it is possible to switch time slots without any malfunction or lose frame synchronization, and to achieve highly efficient transmission and reception. It becomes possible to realize this.

[Embodiments of the invention]

An embodiment of the present invention will be described below with reference to FIG.

In the figure, (1) is a terminal interface circuit, (2
1 is a transmission line interface circuit, 3) is a switching 1d generation circuit, (4th is a switching signal detection circuit, (5) is a switching signal transfer circuit, (6) is a frame synchronization generation circuit, and (7) is a multiplexing circuit. A pattern switching circuit, (8) a memory for multiplexed pattern generation, and qLl a control circuit.

Next, the operation will be explained.

The usage status of each terminal interface (1) is determined by the control circuit (
1G, and when a time slot switch occurs, the pattern generation memory 1 of the parent and slave stations is monitored.
When the contents of 81 are mutually transferred and confirmed and the transportation verification is completed, a switching ready signal is sent from the switching signal generating circuit (3) of the master station. In the slave station, the switching signal detection circuit +4+ receives the switching ready signal sent from the master station, detects the switching timing, and prepares for switching operation, and at the same time sends a signal with the same content to the master station. ).

At the master station, the switching signal detection circuit (4) receives the switching signal transferred from the slave station, and the slave station equipment prepares for normal switching.
At the same time, in the next step, a switching control (request) signal phase-synchronized with frame synchronization is output to the multiplex pattern switching circuit (7) to switch the multiplex pattern generation memory (8) of the own station. .

On the other hand, the slave station can perform time slot switching without momentary interruption by switching the same memory (8) in subordinate synchronization with the switching control signal of the master station.

In the above embodiment, the master station device and the slave station device are configured separately, but in an actual device, the functions of both the parent station device and the slave station device are configured together.
It can be set and used by the system. Further, even if there are a plurality of master stations and slave stations, the same effect can be achieved.

〔Effect of the invention〕

As described above, according to the present invention, a plurality of multiplex pattern generation memories that generate mutually different time slot patterns are provided, and the switching control is performed in synchronization with the other station, so that there is no frame synchronization. It has the effect of allowing time slot switching without instantaneous interruption and enabling transmission and reception with high transmission efficiency.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block circuit diagram of a time division multiplex communication device according to an embodiment of the present invention, and FIG. 2 is a block circuit diagram of a conventional time division multiplex communication device. (1) is a terminal interface circuit, (2) is a transmission line interface circuit, (3; is a switching signal generation circuit, (4) is a
) is a switching signal detection circuit, +5) is a switching signal transfer circuit, (
6) is a frame synchronization generation circuit, 17+ is a multiplex pattern switching circuit, (8) is a multiplex pattern generation memory, and U■ is a control circuit. Note that the same reference numerals in the figures indicate the same or equivalent parts.

Claims (1)

[Claims] In a multiplex communication device in which each station has a plurality of terminal interfaces, time slots that are phase-synchronized with a synchronization frame of transmitted and received data are assigned to each of these terminal interfaces, and the transmitted and received data of each terminal interface is transmitted in a time division multiplexing method, A plurality of multiplexed pattern generation memories that generate and output mutually different time slot patterns (addresses), a switching circuit that switches and outputs the time slot patterns of these multiplexed pattern generation memories, and a time slot that collates with other stations to be transmitted. 1. A time division multiplex communication device comprising a switching control means for forming a transmission path using the synchronization frame and for controlling switching of the switching circuit in phase synchronization with the synchronization frame.