JPS61163230A - Bonding wire for semiconductor device - Google Patents

Bonding wire for semiconductor device

Info

Publication number
JPS61163230A
JPS61163230A JP60000802A JP80285A JPS61163230A JP S61163230 A JPS61163230 A JP S61163230A JP 60000802 A JP60000802 A JP 60000802A JP 80285 A JP80285 A JP 80285A JP S61163230 A JPS61163230 A JP S61163230A
Authority
JP
Japan
Prior art keywords
bonding
bonding wire
semiconductor device
wire
aluminum
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60000802A
Other languages
Japanese (ja)
Inventor
Michio Sato
道雄 佐藤
Masami Miyauchi
宮内 正視
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP60000802A priority Critical patent/JPS61163230A/en
Publication of JPS61163230A publication Critical patent/JPS61163230A/en
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49579Lead-frames or other flat leads characterised by the materials of the lead frames or layers thereon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/43Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/4501Shape
    • H01L2224/45012Cross-sectional shape
    • H01L2224/45015Cross-sectional shape being circular
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124Aluminium (Al) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/485Material
    • H01L2224/48505Material at the bonding interface
    • H01L2224/4851Morphology of the connecting portion, e.g. grain size distribution
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00011Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01004Beryllium [Be]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To obtain a bonding wire for a semiconductor device having high tensile strength at high temp. and superior thermal fatigue resistance by adding a specified amount of Be to Al. CONSTITUTION:A bonding wire for a semiconductor device is manufactured by adding 0.1-1.5wt% Be to Al. The grains of a precipitated phase is required to be regulated to <=about 0.3mum grain size and to be dispersed at <=about 1mum interval so as to inhibit recrystallization. In order to form such grains, annealing is preferably carried out at about 400-600 deg.C in case of 1hr annealing time.

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明は半導体素子上のアルミニウム電極と外部引出し
用リードフレームのインナーリード部とを、電気的に接
続するために使用するボンディング用リード線に関する
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a bonding lead wire used for electrically connecting an aluminum electrode on a semiconductor element and an inner lead portion of an external lead frame.

〔発明の技術的背景とその問題点〕[Technical background of the invention and its problems]

パワートランジスタのボンディング用リード線には、直
径100〜500μmの高純度アルミニウム線が使用さ
れている。ボンディング方法は、金(Au)線のように
大気中で水素炎や電気トーチによってボールを形成する
ことが難しいため、一般的に超音波ボンディング法が行
なわれている。
High purity aluminum wires with a diameter of 100 to 500 μm are used as bonding lead wires for power transistors. As a bonding method, an ultrasonic bonding method is generally used because it is difficult to form a ball in the atmosphere using a hydrogen flame or an electric torch, unlike gold (Au) wire.

現在、エポキシ樹脂封止型で最も多く使用されているパ
ワートランジスタは、動作中に高温と低温の温度サイク
ルを繰返するため、ボンディング用リード線には繰返し
熱応力が加わって熱疲労による断線不良を起こすことが
ある。シリコン(St )チップ、リードフレームおよ
びモールド樹脂とボンディング用リード線との熱膨張係
数の差による相互間の引張力と圧縮力によって、チップ
側とリードフレーム側のボンディング結合部には繰返し
曲げ荷重が作用する。またボンディング用高純度アルミ
ニウム(99,99%)線の再結晶温度は約200℃と
低いため、動作中の発熱によって再結晶が進行し、アル
ミニウム線の引張強さは大幅に低下する。その結果、特
にチップ中央部から離れているために熱膨張の影響が大
きく、チップ側よりかなり大きな曲げ荷重が作用してい
るリードフレーム側のボンディング部近傍の結晶粒界か
らクラックが発生して断線する。つまりこのような故障
は、トランジスタ部品における熱膨張係数の相異により
発生する繰返し応力とボンディング用アルミニラム線の
組織変化による強度低下に起因する。
Power transistors, which are currently the most commonly used epoxy resin-sealed type, undergo repeated temperature cycles between high and low temperatures during operation, which causes repetitive thermal stress to be applied to the bonding lead wires, which can cause disconnection due to thermal fatigue. It can happen. Due to the tensile and compressive forces between the silicon (St) chip, lead frame, mold resin, and bonding lead wire due to the difference in their thermal expansion coefficients, repeated bending loads are applied to the bonding joint between the chip side and the lead frame side. act. Furthermore, since the recrystallization temperature of high-purity aluminum (99.99%) wire for bonding is as low as about 200° C., recrystallization progresses due to heat generation during operation, and the tensile strength of the aluminum wire is significantly reduced. As a result, cracks occur at the grain boundaries near the bonding area on the lead frame side, which is far from the center of the chip and is therefore subject to a large bending load due to its large bending load, resulting in wire breakage. do. In other words, such failures are caused by repeated stress caused by differences in thermal expansion coefficients in the transistor components and by a decrease in strength due to structural changes in the aluminum bonding wire.

さらに樹脂をモールドする場合、アルミニウム線は再結
晶温度が低いため、ボンディング用アルミニウム線が軟
化によって変形してショートや断線を起こす場合があっ
た。
Furthermore, when resin is molded, since the aluminum wire has a low recrystallization temperature, the aluminum wire for bonding may be softened and deformed, causing short circuits or disconnections.

〔発明の目的〕[Purpose of the invention]

本発明は前記事情に鑑みてなされたもので、高温での引
張強ざが高く、熱疲労に対して十分に耐えられる半導体
素子用ボンディング線を提供するものである。
The present invention has been made in view of the above circumstances, and it is an object of the present invention to provide a bonding wire for semiconductor elements that has high tensile strength at high temperatures and can sufficiently withstand thermal fatigue.

〔発明の概要〕[Summary of the invention]

本発明はアルミニウムにベリリウムを0.1〜1.5重
量%含有せしめたことを特徴とする半導体素子用ボンデ
ィング線である。
The present invention is a bonding wire for semiconductor devices, characterized in that aluminum contains 0.1 to 1.5% by weight of beryllium.

上記べIJ IJウムはその添加量が0.1重量%未満
では高純度アルミニウムと大差なく十分な高温での引張
強ざが得られず、したがって耐熱疲労性は低下する。一
方、ベリリウムが1.5重量%を超えると、ボンディン
グ線が高硬度になって最適なボンディングループ形状が
得られないばかりでなく、ボンディング時の圧接力の増
大によるチップの損傷を起こし易く、かつ電気抵抗が増
大する不具合がある。
If the amount of aluminum added is less than 0.1% by weight, it is not much different from high-purity aluminum, and sufficient tensile strength at high temperatures cannot be obtained, resulting in a decrease in thermal fatigue resistance. On the other hand, if beryllium exceeds 1.5% by weight, the bonding wire becomes so hard that it is not possible to obtain an optimal bonding loop shape, and the chip is likely to be damaged due to an increase in the pressure welding force during bonding. There is a problem that electrical resistance increases.

また再結晶を抑制するためには、析出相の粒子寸法と粒
子間隔がiL賛な因子で、一般に粒子寸法は0.3μm
以下でおり1粒子間隔は1μm以下であることが必要で
ある。そのため、焼鈍時間をth一定とした場合、40
0〜600°0で焼鈍を行なうことが好ましい。この熱
処理によって、析出強化相であるベリリウム相をオスト
ゲアルド成長させ、体積分率を一定に保持したまま粒子
分布を制御することができる。
In addition, in order to suppress recrystallization, the particle size and particle spacing of the precipitated phase are important factors, and the particle size is generally 0.3 μm.
The distance between each particle must be 1 μm or less. Therefore, when the annealing time is constant th, 40
It is preferable to perform annealing at 0 to 600°0. By this heat treatment, the beryllium phase, which is a precipitation-strengthening phase, is allowed to grow by Ostgeald, and the particle distribution can be controlled while keeping the volume fraction constant.

〔発明の効果〕〔Effect of the invention〕

上述した如く本発明によれば、ベリリウムの添加によっ
て再結晶温度が上昇して高温の引張強さが向上し、これ
によって動作中の温度サイクルによる熱疲労に対して十
分に耐えられ、さらに樹脂封止時の熱によるポンディレ
グ用リード線の軟化による変形、断線がなくなるので、
出力の大きいパワートランジスタ等のボンディング線の
断線故障が低減する。
As described above, according to the present invention, the addition of beryllium increases the recrystallization temperature and improves the high-temperature tensile strength. This eliminates deformation and disconnection due to softening of the Pondy leg lead wire due to heat when stopped.
Disconnection failures in bonding wires of power transistors with large outputs are reduced.

〔発明の実施例〕[Embodiments of the invention]

以下において実施例を掲げ、本発明をさらに具体的に説
明する。
The present invention will be described in more detail below with reference to Examples.

実施例1゜ 高純度(99,99%)のアルミニウムに0.5重量%
のぺ+)”+)ラムを溶解鋳造し、直径50朋のビレッ
トを得た。このビレットを400℃で溝ロール加工し、
焼なまし処理を施した後に線引き加工で直径0.2朋の
線材に成形した。さらにこの線材を500℃で1h焼鈍
を施した。得られた線材を化学分析した結果、ベリリウ
ムは0.1重量%であった。また線材を電□子顕微鏡を
用いて、析出したべIJ ’ IJウム相の粒子直径お
よび間隔を測定した結果、それぞれ0.08μm ’ 
+ ”O−2’1μmでめった。
Example 1゜0.5% by weight in high purity (99,99%) aluminum
The ram was melted and cast to obtain a billet with a diameter of 50 mm. This billet was processed into groove rolls at 400°C.
After annealing, it was drawn into a wire rod with a diameter of 0.2 mm. Furthermore, this wire rod was annealed at 500° C. for 1 hour. As a result of chemical analysis of the obtained wire rod, beryllium content was 0.1% by weight. In addition, as a result of measuring the particle diameter and interval of the precipitated beta-IJ' IJ-um phase using an electron microscope, the wire rod was found to be 0.08 μm.
+ "O-2' 1 μm.

上記試料について、常温〜500℃まで引張強さを微小
引張試験機を用いて測定した。なお引張試験は、各加熱
温度で30秒間保持した後に行なった。その結果を第1
図に示す。また従来の高純度(99,99%)アルミニ
ウム線材の引張強さについても併記した。図から明らか
なように、本実施例の試料は、従来材に比べて引張強ざ
が冒<、さらにこの曲線から再結晶温度が高いことが明
らかである。
The tensile strength of the above sample was measured from room temperature to 500°C using a micro tensile tester. Note that the tensile test was conducted after holding each heating temperature for 30 seconds. The result is the first
As shown in the figure. The tensile strength of conventional high-purity (99.99%) aluminum wire is also listed. As is clear from the figure, the sample of this example has a higher tensile strength than the conventional material, and it is also clear from this curve that the recrystallization temperature is higher.

次に試作した疲労試験機を用いて、実施例の試料および
従来の試料について疲労試験を行なった。
Next, a fatigue test was conducted on the sample of the example and the conventional sample using a prototype fatigue tester.

疲労試験は、長さ100111の線材に150gの重り
をつり下げ、赤外線イメージ炉により常温から250 
”Oまでの温度サイクルを加えて、破断するまでの繰返
し数を測定することによって行なった′。
The fatigue test was carried out by suspending a 150g weight on a wire rod with a length of 100111, and heating it from room temperature to 250g using an infrared image furnace.
This was done by applying a temperature cycle to 0 and measuring the number of cycles until it broke.'

その結果を第1表に示す。これより、実施例の試料は従
来試料に比べて耐熱疲労性を有している。
The results are shown in Table 1. From this, the samples of the examples have better thermal fatigue resistance than the conventional samples.

妊らに実施例の試料と従来の試料について超音波ボンデ
ィングを行ない、ループ高さを測定してボンディング性
を判断した。その結果を′M1表に示す。最適なループ
高さは250μm以上寸あり、両者は十分にその要求を
満たしている。
Ultrasonic bonding was performed on the sample of the example and the conventional sample, and the loop height was measured to judge the bonding property. The results are shown in Table 'M1. The optimum loop height is 250 μm or more, and both of them fully meet that requirement.

以下余白 第  1  表 実施例2および3 高純度(99,99%)のアルミニウムに5を討%のベ
リリウムと8重量%のベリリウムを加えた2種類のAl
−Be合金を溶解鋳造し、実施例1と同様な方法により
試料を作製した。得られた実施例2および3のベリリウ
ムを分析した結果、実施例2は1.0垂蓋チ実施例3は
1.5重量%であった。またぺIJ IJウム相の粒子
直径および間隔は、実施例2は0.09 ttmと0.
25.ljmで、実施例3は0.1.ljmと0.27
μmであった〇 実施例2および3の引張試験の結果を第1図に併記する
。また疲労試駆とボンディング試験の結果を第1表に示
す。この結果より、本実施例は実施例1と同様に優れた
特性を有している。
Table 1 Examples 2 and 3 Two types of aluminum made by adding 5% beryllium and 8% beryllium to high purity (99.99%) aluminum.
-Be alloy was melted and cast, and a sample was prepared in the same manner as in Example 1. As a result of analysis of the obtained beryllium of Examples 2 and 3, the amount of beryllium in Example 2 was 1.0% by weight, and the amount in Example 3 was 1.5% by weight. In addition, the particle diameter and spacing of the peIJIJum phase in Example 2 were 0.09 ttm and 0.09 ttm.
25. ljm, Example 3 is 0.1. ljm and 0.27
The tensile test results of Examples 2 and 3 are also shown in FIG. Table 1 also shows the results of the fatigue test and bonding test. From this result, this example has excellent characteristics similar to Example 1.

比較例1および2 上記実施例と同様にしてベリリウムの含有量を変えた場
合を上記実施例と共に第1表に示す。
Comparative Examples 1 and 2 Table 1 shows cases in which the content of beryllium was changed in the same manner as in the above examples, together with the above examples.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は各種線材の引張強さの温度依存性を示す曲線図
である。 代理人 弁理士 則 近 憲 佑 (ほか1名) 手 続 補 正 書(自発)
FIG. 1 is a curve diagram showing the temperature dependence of the tensile strength of various wire rods. Agent Patent attorney Kensuke Chika (and 1 other person) Procedural amendment (voluntary)

Claims (1)

【特許請求の範囲】[Claims] アルミニウム(Al)にベリリウム(Be)を0.1〜
1.5重量%含有せしめたことを特徴とする半導体素子
用ボンディング線。
Adding beryllium (Be) to aluminum (Al) from 0.1 to
A bonding wire for a semiconductor device, characterized in that the bonding wire contains 1.5% by weight.
JP60000802A 1985-01-09 1985-01-09 Bonding wire for semiconductor device Pending JPS61163230A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60000802A JPS61163230A (en) 1985-01-09 1985-01-09 Bonding wire for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60000802A JPS61163230A (en) 1985-01-09 1985-01-09 Bonding wire for semiconductor device

Publications (1)

Publication Number Publication Date
JPS61163230A true JPS61163230A (en) 1986-07-23

Family

ID=11483814

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60000802A Pending JPS61163230A (en) 1985-01-09 1985-01-09 Bonding wire for semiconductor device

Country Status (1)

Country Link
JP (1) JPS61163230A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105220023A (en) * 2015-11-03 2016-01-06 陈薇 A kind of aluminium alloy heat sink material being applicable to LED and preparation method thereof and purposes

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105220023A (en) * 2015-11-03 2016-01-06 陈薇 A kind of aluminium alloy heat sink material being applicable to LED and preparation method thereof and purposes
CN106399763A (en) * 2015-11-03 2017-02-15 安徽鹰龙工业设计有限公司 Aluminum alloy radiating material applicable to LED as well as preparation method thereof and use thereof
CN106636773A (en) * 2015-11-03 2017-05-10 安徽鹰龙工业设计有限公司 Aluminum alloy heat radiating material for LED (light emitting diode) and preparation method and purpose thereof

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