JPS61163109A - Preparation of polycrystalline si film - Google Patents

Preparation of polycrystalline si film

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Publication number
JPS61163109A
JPS61163109A JP182085A JP182085A JPS61163109A JP S61163109 A JPS61163109 A JP S61163109A JP 182085 A JP182085 A JP 182085A JP 182085 A JP182085 A JP 182085A JP S61163109 A JPS61163109 A JP S61163109A
Authority
JP
Japan
Prior art keywords
film
polycrystalline
pattern
crystal
electroconductive substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP182085A
Other languages
Japanese (ja)
Inventor
Hajime Ichiyanagi
一柳 肇
Hiroshi Kawai
弘 川合
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Electric Industries Ltd
Original Assignee
Sumitomo Electric Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Electric Industries Ltd filed Critical Sumitomo Electric Industries Ltd
Priority to JP182085A priority Critical patent/JPS61163109A/en
Publication of JPS61163109A publication Critical patent/JPS61163109A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To prepare polycrystalline Si film useful for semiconductor element, by growing crystal particles utilizing a pattern serving as a seed for the crystal growth provided on an electroconductive substrate in the stage of coagulating Si film which is formed on said substrate by melting and then coagulating. CONSTITUTION:SiO2 film 2 is formed on an electroconductive substrate 1 such as stainless steel plate, etc. Then, a grating pattern is formed by such as reactive ion etching process. After forming polycrystalline Si film 4 by normal pressure CVD process or vapor deposition process, etc., the growth of crystal is proceeded by such as laser melting process, etc. to prepare polycrystalline Si film. When amorphous Si film 5 is formed from the above described polycrystalline Si film by such as plasma CVD process at 250 deg.C, and a transparent electrode 6 is formed at 250 deg.C by ion plating process, an amorphous Si solar cell is obtd. Polycrystalline Si film having large crystal size if formed from a pattern of SiO2 such as fine lines on the electroconductive substrate as crystal seed and the electroconductive substrate serves as rear electrode. Thus, the Si film is useful as semiconductor element.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は、多結晶シリコン(Si)膜の製造方法詳しく
は半導体素子に利用出来る多結晶Si膜の製造方法に関
するものである。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a method of manufacturing a polycrystalline silicon (Si) film, and more particularly to a method of manufacturing a polycrystalline Si film that can be used in semiconductor devices.

(従来技術) この種の多結晶Si膜の製造に於いて、絶縁性基板上で
のSi膜の結晶粒を大きくする努力は従来から例えば次
の様な手段で行われている。
(Prior Art) In manufacturing this type of polycrystalline Si film, efforts have been made to enlarge the crystal grains of the Si film on an insulating substrate, for example, by the following methods.

(1)第4図参照 石英基板(7)に3.8μピツチ(P)、0.1μ深さ
くD)の溝(8)を作り、この上に半導体Si膜膜形後
後レーザーアニール単結晶化する。
(1) Refer to Fig. 4. A groove (8) of 3.8μ pitch (P) and 0.1μ depth (D) is made in the quartz substrate (7), and a semiconductor Si film is formed on the groove (8) after laser annealing single crystal. become

(2)第5図参照 石英基板(7)上に極めて微細な粒径の多結晶Si膜(
4)を作り、その上に更に50μピツチ(Pつで5i0
2膜(2)を帯状に形成し、レーザーアニールする、し
かるときは帯状のS i02膜(2)の下に粒界が集中
し50μピツチの部分は単結晶化する。
(2) Refer to Figure 5. Polycrystalline Si film with extremely fine grain size (
4), and then add another 50μ pitch (5i0 with P).
2 film (2) is formed into a band-like shape and laser annealed. When this happens, the grain boundaries are concentrated under the band-like SiO2 film (2), and the 50 μm pitch portions become single crystals.

(発明が解決しようとする問題点) しかし乍ら上記に於いては、裏面電極がないため半導体
素子に用いることが出来ない。
(Problems to be Solved by the Invention) However, the above method cannot be used for semiconductor devices because there is no back electrode.

上記に鑑み本発明は半導体素子に用いることの出来る多
結晶Si膜の製造方法を提供するものである。
In view of the above, the present invention provides a method for manufacturing a polycrystalline Si film that can be used for semiconductor devices.

(問題点を解決するための手段) 即ち本発明の多結晶Si膜の製造方法の概略は、ステン
レス板等導電性基板上に結晶成長の核となる模様を形成
し、その上に多結晶Siを成膜後レーザー等でSiを溶
かして一方向凝固により階段部を核にして結晶粒成長さ
せ4粒径の大きな多結晶Siを得るものである。
(Means for Solving the Problems) That is, the outline of the method for manufacturing a polycrystalline Si film of the present invention is to form a pattern that will become a nucleus for crystal growth on a conductive substrate such as a stainless steel plate, and then deposit polycrystalline Si on the pattern. After forming a film, the Si is melted using a laser or the like, and crystal grains are grown using the stepped portions as nuclei through unidirectional solidification to obtain polycrystalline Si with four large grain sizes.

(作用) 上記により裏面電極を持った、結晶粒の大きな多結晶S
i膜を作ることが出来る。
(Function) Polycrystalline S with large crystal grains has a back electrode as described above.
i-film can be made.

以・下水発明を例示の第1図について詳細に説明する。The sewage invention will now be described in detail with reference to FIG. 1 as an example.

第1図は多結晶Si薄膜を用いたアモルファスシリコン
太陽電池の製造工程の70−チャートである。
FIG. 1 is a 70-chart of the manufacturing process of an amorphous silicon solar cell using a polycrystalline Si thin film.

(工al)  ステンレス(SUS )基板(1)を準
備する(注) 基板はその他、金属を全面に蒸着したガ
ラス等導電性であればよい。
(English Al) Prepare a stainless steel (SUS) substrate (1) (Note) The substrate may be made of conductive material such as glass with metal deposited on its entire surface.

(工程2) 基板(1)上に5iOz膜(2)を形成す
る。
(Step 2) A 5iOz film (2) is formed on the substrate (1).

(注) その形成法は真空蒸着、イオンプレーテングC
VD、プラズマCVD等何でもよい。膜厚はSi(後述
)の約ユ〜]の厚さが適当である。薄いと効果が ない、即ち粒成長の核とならない。
(Note) The formation method is vacuum evaporation, ion plating C
Any method such as VD or plasma CVD may be used. The appropriate film thickness is approximately 100 mm thick for Si (described later). If it is thin, it is ineffective, that is, it does not become a nucleus for grain growth.

又厚いと後述工程5のあとでSi表面 が平滑にならない、これは電池特性 を悪くする。Also, if it is thick, the Si surface will be removed after step 5 described below. is not smooth, this is due to battery characteristics. make things worse.

(工程3)SiOx膜(2)からなるグレーティングを
形成する。
(Step 3) A grating made of SiOx film (2) is formed.

(注) 例えば反応性イオンエツチングにょる。(Note) For example, reactive ion etching.

グレーティング模様はたて縞状(第 3図(a))、山形状(第3.堕(b))等でよい。上
記の具体的作業は第2図(al、(bl、(C1、(d
lに例示する様に、SO8基板(1)上にSiO2膜(
2)を形成したもの(図(1)参照)の上にレジスト(
3)を作る(図(bl参照)。これはフォトリソグラフ
ィー技術でパターン化したレジ ストを作る。次にCF4ガスでSiO2をドライエツジ
ングする(図fcl参照)。
The grating pattern may be a vertical striped pattern (FIG. 3(a)), a mountain pattern (FIG. 3(b)), or the like. The above concrete work is shown in Figure 2 (al, (bl, (C1, (d)
As illustrated in 1, a SiO2 film (
2) is formed (see figure (1)), and the resist (
3) is made (see figure (bl)). This creates a patterned resist using photolithography technology. Next, SiO2 is dry etched with CF4 gas (see figure fcl).

この後レジスト(3)を除去する(図(dl参照)。After that, the resist (3) is removed (see figure (dl)).

(工程4) 多結晶Si膜(4)を形成する。(Step 4) Form a polycrystalline Si film (4).

(注) 膜厚は例えば咎30μである。膜形成は下記■
、@、θ等による。
(Note) The film thickness is, for example, 30μ. Film formation is as below ■
, @, θ, etc.

■ 常圧CVD SiC/4−1−82+ドーパント(n型にするときP
Hg、P型にするときB2H6)、〜1150℃ @ 蒸着 SiにB又はPを混入した蒸発源を とばす。
■ Normal pressure CVD SiC/4-1-82 + dopant (P when making n-type
When converting to Hg or P type, B2H6), ~1150°C @ evaporation source in which B or P is mixed into vapor-deposited Si is evaporated.

θ 減圧CVD 5iHa+ドーパント(n型にするときPH6、P型に
するときB2H6)、〜700℃。
θ Low pressure CVD 5iHa + dopant (PH6 for n-type, B2H6 for p-type), ~700°C.

上記に於いて膜形成スピードは常圧 が高速、欠陥束の理由でより良い。In the above, the film formation speed is normal pressure. The faster it is, the better it is because of the defect bunch.

(工程5) 結晶粒を成長させる。(Step 5) Growing crystal grains.

(注) 例えばレーザーメルティングによる。(Note) For example, by laser melting.

一方向凝固がポイントであり、レー ザーに限らず電気炉から徐々に引出 す方法もよい。何れもSiを一旦とか す。The key is unidirectional solidification, and Gradually withdrawn from electric furnaces, not limited to Another method is also good. All of them have Si once. vinegar.

(工程6)  アモルファスシリコン膜(5)を形成す
る。
(Step 6) Form an amorphous silicon film (5).

(注) 例えばプラズマCVD、250℃による。(Note) For example, by plasma CVD at 250°C.

アモルファスシリコン膜は例えば a−5i(n(3000A’)/P(300A’)/1
(5000A”)/n(200A”):) (工程7) 透明電極(6)を形成する。
For example, the amorphous silicon film is a-5i(n(3000A')/P(300A')/1
(5000A'')/n(200A''):) (Step 7) Form a transparent electrode (6).

(注) 例えばイオンブレーティング、250℃による
(Note) For example, by ion blating at 250°C.

透明電極は例えば ITO(Indium −Tin −0xide ) 
(6QQA’)上記工程5までが本発明の内容である。
The transparent electrode is, for example, ITO (Indium-Tin-Oxide).
(6QQA') The content of the present invention is up to step 5 above.

(実施例) 以下に本発明の理解を助けるため実施例を述べる。(Example) Examples will be described below to help understand the present invention.

■ ステンレス板に5i02を電子ビーム蒸着した(膜
厚1μ)。
■ 5i02 was electron beam deposited on a stainless steel plate (film thickness: 1μ).

■ フォトレジストをコートし、パターン露光してフォ
トレジストをパターン化した。
■ The photoresist was coated and patterned by pattern exposure.

■ CFaガスで5i02をエツチングした。■ 5i02 was etched with CFa gas.

■ フォトレジストを除去した。■ The photoresist was removed.

■ 常圧CVDでSi膜(膜厚1oμ)形成した(ガス
: SiC/4+H2、温度:1150℃)。粒径は5
μであった。
(2) A Si film (thickness: 1 μm) was formed by atmospheric pressure CVD (gas: SiC/4+H2, temperature: 1150° C.). Particle size is 5
It was μ.

■ レーザー走査で一方向凝固させた(12WのYAG
レーザー使用)。粒径は500μであった。これは太陽
電池として充分使用に耐える値である。
■ Unidirectionally solidified by laser scanning (12W YAG
(using laser). The particle size was 500μ. This value is sufficient to withstand use as a solar cell.

(発明の効果) 以上の様な本発明によると下記の様な効果がある。即ち
導電性基板上に設けた5iOzの微細な筋等模様が粒成
長の核となる。従って安価な基板上に粒径の大きな多結
晶Si膜を得ることが出来る、しかも導電性基板が裏電
極となり、半導体素子としての使用が可能となる。
(Effects of the Invention) The present invention as described above has the following effects. That is, the 5 iOz fine stripes and other patterns provided on the conductive substrate become the nucleus of grain growth. Therefore, a polycrystalline Si film with a large grain size can be obtained on an inexpensive substrate, and the conductive substrate serves as a back electrode, making it possible to use it as a semiconductor element.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明を説明するための図であって、多結晶S
i膜を用いたアモルファスシリコン太陽電池の製造工程
のフローチャート、第2図(al、(bl、(C1、(
d)は第1図のフローチャートの工程3の手順を説明す
る図、第3図体)、(blは第1図のフローチャートの
工程(3)のグレーティング形成模様を示す斜視図、第
4図及び第5図は共に従来の絶縁基板上でSi膜の結晶
粒を大きくする手段を説明する斜視図を夫々例示してい
る。 (1)・・・SUS等の導電性基板、(2)・・・5i
Oz膜、(3)・・・レジスト、(4)・・・多結晶S
i膜、+51・・・アモルファスシリコン膜、(6)・
・・透明電極、(7)・・・石英基板、(8)・・・溝
、fl  図 i2図 (a) (b) (d) オ 3 図 (a)        (b)
FIG. 1 is a diagram for explaining the present invention, in which polycrystalline S
Flowchart of manufacturing process of amorphous silicon solar cell using i-film, FIG. 2 (al, (bl, (C1, (
d) is a diagram explaining the procedure of step 3 in the flowchart in FIG. Figures 5 and 5 each illustrate a perspective view illustrating means for enlarging the crystal grains of a Si film on a conventional insulating substrate. (1) Conductive substrate such as SUS, (2)... 5i
Oz film, (3)...resist, (4)...polycrystalline S
i film, +51... amorphous silicon film, (6)
...Transparent electrode, (7)...Quartz substrate, (8)...Groove, fl Figure i2 (a) (b) (d) O Figure 3 (a) (b)

Claims (8)

【特許請求の範囲】[Claims] (1)結晶成長の核となる模様を形成した導電性基板上
にSiの膜を形成し、このSiを溶かして凝固する過程
で上記模様を利用して粒成長させることを特徴とする多
結晶Si膜の製造方法。
(1) A polycrystalline material characterized by forming a Si film on a conductive substrate with a pattern forming a nucleus for crystal growth, and growing grains using the pattern in the process of melting and solidifying the Si. Method for manufacturing Si film.
(2)導電性基板がステンレスからなる特許請求の範囲
第(1)項記載の多結晶Si膜の製造方法。
(2) The method for manufacturing a polycrystalline Si film according to claim (1), wherein the conductive substrate is made of stainless steel.
(3)導電性基板が金属を全面に蒸着したガラスからな
る特許請求の範囲第(1)項記載の多結晶Si膜の製造
方法。
(3) The method for producing a polycrystalline Si film according to claim (1), wherein the conductive substrate is made of glass on which metal is deposited over the entire surface.
(4)レーザーを用いSiを粒成長させる特許請求の範
囲第(1)項記載の多結晶Si膜の製造方法。
(4) A method for producing a polycrystalline Si film according to claim (1), in which Si grains are grown using a laser.
(5)電気炉を用いSiを粒成長させる特許請求の範囲
第(1)項記載の多結晶Si膜の製造方法。
(5) A method for manufacturing a polycrystalline Si film according to claim (1), in which grains of Si are grown using an electric furnace.
(6)導電性基板上に形成した模様がたて縞状である特
許請求の範囲第(1)項記載の多結晶Si膜の製造方法
(6) The method for manufacturing a polycrystalline Si film according to claim (1), wherein the pattern formed on the conductive substrate is in the form of vertical stripes.
(7)導電性基板上に形成した模様が山形状である特許
請求の範囲第(1)項記載の多結晶Si膜の製造方法。
(7) The method for manufacturing a polycrystalline Si film according to claim (1), wherein the pattern formed on the conductive substrate is in the shape of a mountain.
(8)導電性基板上に形成した結晶成長の核となる模様
がSiO_2の模様である特許請求の範囲第(1)項記
載の多結晶Si膜の製造方法。
(8) The method for producing a polycrystalline Si film according to claim (1), wherein the pattern formed on the conductive substrate and serving as a nucleus for crystal growth is a pattern of SiO_2.
JP182085A 1985-01-08 1985-01-08 Preparation of polycrystalline si film Pending JPS61163109A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP182085A JPS61163109A (en) 1985-01-08 1985-01-08 Preparation of polycrystalline si film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP182085A JPS61163109A (en) 1985-01-08 1985-01-08 Preparation of polycrystalline si film

Publications (1)

Publication Number Publication Date
JPS61163109A true JPS61163109A (en) 1986-07-23

Family

ID=11512196

Family Applications (1)

Application Number Title Priority Date Filing Date
JP182085A Pending JPS61163109A (en) 1985-01-08 1985-01-08 Preparation of polycrystalline si film

Country Status (1)

Country Link
JP (1) JPS61163109A (en)

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