JPS6115822U - AGC circuit - Google Patents

AGC circuit

Info

Publication number
JPS6115822U
JPS6115822U JP10073984U JP10073984U JPS6115822U JP S6115822 U JPS6115822 U JP S6115822U JP 10073984 U JP10073984 U JP 10073984U JP 10073984 U JP10073984 U JP 10073984U JP S6115822 U JPS6115822 U JP S6115822U
Authority
JP
Japan
Prior art keywords
transistors
agc circuit
agc
transistor
supplied
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10073984U
Other languages
Japanese (ja)
Inventor
一己 庄司
Original Assignee
ソニー株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ソニー株式会社 filed Critical ソニー株式会社
Priority to JP10073984U priority Critical patent/JPS6115822U/en
Publication of JPS6115822U publication Critical patent/JPS6115822U/en
Pending legal-status Critical Current

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  • Control Of Amplification And Gain Control (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

図はこの考案の一例の接続図である。 4はAGC電圧形成回路である。 The figure is a connection diagram of an example of this invention. 4 is an AGC voltage forming circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 第1及び第2のトランジスタのエミツタが互(に接続さ
れると共に家電流源に接続され、上記疼1及び第2のト
ランジスタの少なくとも一方にf荷が接続されて差動ア
ンプが構成され、上記第1及ひ第2のトランジスタのベ
ース間に抵抗器力引続され、上記第2のトランジスタの
ベースと接測との間にコンデンサが接続され、上記第1
のトランジスタのベースに入力が供給されると共に、上
記抵抗器よりも十分に大きなインピーダンスを通じてA
GC電圧が供給され、上記負荷に上記AGC電圧により
AGCの行われた出力が取り出されるN℃回路。
The emitters of the first and second transistors are connected to each other and to a current source, and an f load is connected to at least one of the first and second transistors to form a differential amplifier, and A resistor is connected between the bases of the first and second transistors, a capacitor is connected between the base of the second transistor and the ground, and the first
An input is supplied to the base of the transistor, and A
An N°C circuit to which a GC voltage is supplied and an output subjected to AGC using the AGC voltage is taken out to the load.
JP10073984U 1984-07-04 1984-07-04 AGC circuit Pending JPS6115822U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10073984U JPS6115822U (en) 1984-07-04 1984-07-04 AGC circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10073984U JPS6115822U (en) 1984-07-04 1984-07-04 AGC circuit

Publications (1)

Publication Number Publication Date
JPS6115822U true JPS6115822U (en) 1986-01-29

Family

ID=30660184

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10073984U Pending JPS6115822U (en) 1984-07-04 1984-07-04 AGC circuit

Country Status (1)

Country Link
JP (1) JPS6115822U (en)

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