JPS61157039A - Subscriber line transmitter - Google Patents

Abstract

PURPOSE:To attain ease of timing recovery/locking without much hardware of an echo canceller by transmitting a frame pulse, a training pulse and a transmission data in this order from the master side, applying timing recovery/ locking during the training pulse reception period at the slave side and inhibiting the transmission of a signal until the end of the training pulse reception. CONSTITUTION:A control circuit 6 controls a selector 3 to select a frame pulse FP from a frame pulse generator 1, a training pulse TP from a training pulse generator 2 and a transmission data DSI at the master side during one frame period T. Further, a period Td when no signal is transmitted is provided, a U/B converter 4 converts a signal into a bipolar signal and the result is transmitted to the slave side via a hybrid circuit 5. The transmitted signal is received via a hybrid circuit 16, a control circuit 19 controls a timing recovery circuit 20 for timing recovery during the training pulse period, and the frame pulse FP and a transmission data DS2 are selected and transmitted.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention is an echo canceller type device for realizing digital bidirectional transmission using a two-wire transmission line, which is used in Integrated Service Digital W4 (ISDN). This invention relates to improvements in timing regeneration pull-in methods in digital subscriber line transmission equipment.

In this case, the master side has a reference oscillator and supplies the required clock via the clock supply circuit, so
Although it is not necessarily necessary to perform timing regeneration, the slave side needs to perform timing regeneration in order to receive the signal sent from the master side.

When performing this timing regeneration, a timing regeneration pull-in method is desired that can easily perform timing regeneration pull-in without increasing the hardware of the echo canceller.

[Problems to be solved by the prior art and the invention] In order to realize digital bidirectional transmission using a 22-wire transmission line,
In echo canceller-type digital subscriber line transmission equipment, the transmitted signal goes around to the receiving side of the own station as an echo due to impedance mismatch with the 2-wire transmission line of the hybrid circuit that converts 4-wire to 2-wire at the other station. .

Echo cancellers are used to remove interference caused by echoes, but conventionally developed echo cancellers use an algorithm that makes the echo signal zero at each sample point. The peak value of the residual echo correction in other cases may be equal to or larger than the amplitude of the input received signal, and there is a problem in that it is very difficult to pull in timing regeneration.

In order to improve this, it is possible to suppress the peak value that causes this interference to a predetermined value or less, but in order to do this, it is necessary to increase the number of sample points, which causes the problem that the amount of hardware increases. There is.

Measures to solve problem C] The R point between upper Ha is a frame pulse from the master side.

The training pulse and the transmission data are transmitted in this order, and the slave side synchronizes with the frame pulse from the master side, receives the training pulse, and performs timing regeneration pull-in during the training pulse reception period. This problem is solved by the subscriber line transmission device of the present invention, which prohibits signal transmission until reception is complete.

[Effect]

According to the present invention, since the slave side does not transmit a signal until the training pulse reception is completed, no echo of the transmitted signal occurs on the receiving side while the training pulse is being received.

Therefore, if you perform timing regeneration pull-in during this time, you can do it without making the /'1-de amount of the echo canceller true.
Timing regeneration pull-in can be performed easily.

〔Example〕

FIG. 1 is a block diagram showing the circuit configuration of an embodiment of the present invention, in which (A) shows the master side, (B) shows the slave side, and FIG. 2 shows the master (i'j11 and slave side) of FIG. In the time chart of the transmitted signal and received signal, (A) is the transmitted signal on the master side, (B) is the received signal on the master side, (
C) shows the transmitted signal on the slave side, and (D) shows the received signal on the slave side.

In the figure, 1 and 13 are frame pulse generators, 2 is a training pulse generator, 3.14 is a selector, and 4.15 is a unipolar/bipolar converter (hereinafter referred to as a U/B converter).
, 5.16 is a hybrid circuit, 6, 19 is a control circuit,
7 and 17 are echo cancellers, 8 and 21 are identification circuits,
9.22 is a crime, 10.23 is a subtracter, 11 is a reference oscillator, 12 is a clock supply circuit, 18 is a synchronization circuit, 20
indicates a timing recovery circuit.

To explain the transmission operation on the master side using FIG. 1(A) and FIG. 2(A), the control circuit 6
As shown in FIG. 2(A), the frame pulse (FP) from the frame pulse generator 1 and the training pulse (TP) from the training pulse generator 2 are
and transmission data (DSI) with the selector 3, and provide a period Td in which no signal is transmitted, which will be explained later, and the U/
The signal is converted into a bipolar signal by the B converter 4, sent out to the two-wire transmission line via the hybrid circuit 5, and transmitted to the slave side.

It should be noted that the master side has a reference oscillator (original oscillator) 11 and supplies lock to each part as necessary via a clock supply circuit 12, so it is not necessarily necessary to perform timing recovery.

The signal sent from this master side is the master.

After a delay in the transmission delay time between the slaves, the received signal is received as the received signal shown in FIG. 2(D) via the hybrid circuit 16 shown in FIG. The output is outputted through the identification circuit 21, and from this output, the synchronization circuit 2b performs synchronization using a frame pulse (FP), the control circuit 19 sets the training pulse period (TP) as a timing regeneration period, and the timing regeneration circuit 20 sets the timing. After the reproduction, within one frame period T, the selector 1 is controlled by the control circuit 19.
4 is a frame pulse generator 1 as shown in FIG. 2(C).
Frame pulse (FP) and transmission data (DS
2) Select and send.

This signal is sent to the master side, is delayed by the transmission delay time between the master and the slave, is received as the received signal shown in FIG. 2 (B) via the hybrid circuit 5 shown in FIG. 1 (A>), and is echoed. The signal is output through a canceller subtracter 101, an equalizer 9, and an identification circuit 8.

By adopting a frame configuration that includes such a training pulse (TP), the slave side prohibits the transmission of transmission signals during the timing regeneration period of this training pulse period, so it is not affected by echoes and is stable. Timing playback can be performed.

Here, the slave side synchronization circuit 18. The detailed operations of the control circuit 19 and timing recovery circuit 20 will be explained using the drawings.

FIG. 3 shows a synchronization circuit 18 on the slave side according to an embodiment of the present invention.
Control circuit 19. FIG. 4 is a block diagram showing details of the timing reproducing circuit 20, and is a time chart of waveforms of each part in FIG. 3, and (A) to (K) correspond to points a-k in FIG. 3.

In the figure, 24 is a frame pattern detection circuit, 25 is a frame synchronization counter, 26 is a frame synchronization establishment protection circuit, and 27
．． 28 is a comparator, 29 is an OR circuit, 30 is an AND circuit, 31 is a digital PLL circuit, and 32 is an oscillator, and the same reference numerals throughout the drawings indicate the same functions.

FIG. 4 (
When a frame pattern is detected by the frame pattern detection circuit 24 of the synchronization circuit 18, the signal shown in
It outputs a pulse as shown in FIG.
When the circuit counts a predetermined count value, it outputs a pulse as shown in FIG.
6.

If the frame synchronization establishment protection circuit 26 receives a pulse indicating that the frame pattern shown in FIG. 4(B) has been detected several times when this pulse is output,
Assuming that frame synchronization has been established, the fourth
The transmission frame pulse selection signal shown in Fig. (I), the transmission frame pulse selection signal shown in Fig. 4 (
The transmission data selection signal shown in J) and the echo canceller operation period signal shown in FIG.
) are output at predetermined timings as shown in FIG. 1(B), respectively. The signal is transmitted to the echo canceller 17, and the selector 14 selects each signal based on this, so that the signal is not transmitted during the training pulse period.

Further, a clock window having a training pulse period width shown in FIG.

On the other hand, the output shown in FIG. 4(A) of the crime 22 of FIG.
28, and are compared with the identification voltages V+ and V-, respectively, and a pulse as shown in FIG. 4(E) is outputted from the output of the OR circuit 27, and is inputted to the AND circuit 30, as shown in FIG. The clock window shown in FIG.
A clock as shown in FIG. 4(G) synchronized with this is output.

Therefore, the echo canceller 17 shown in FIG. 1(B) can be made smaller than the usual hardware scale.

The reason why the period Td in which no signal is transmitted as shown in FIG. 2(A) is provided is because the echo from the next master side is filtered by the transmission data DS2 transmission of the transmission signal from the slave side shown in FIG. 2(C). Training pulse (TP) of received signal
This is to eliminate the influence on

On the master side, since it has the reference oscillator 11, it is not necessarily necessary to perform timing regeneration, but since there is a period Td in which transmission signals are prohibited, timing regeneration can be performed during this period.

Further, the error 22 in FIG. 1(B) is to compensate for the loss of the subscriber line, but since the influence of echo should be removed even in line equalization, during this training pulse period, By setting constants, stable adaptive line equalization can be performed.

【Effect of the invention〕

As explained in detail above, according to the present invention, there is an effect that timing regeneration pull-in can be easily performed without increasing the hardware level of the echo canceller.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing the circuit configuration of an embodiment of the present invention, Fig. 2 is a time chart of transmission signals and reception signals on the master side and slave side in Fig. 1, and Fig. 3 is a block diagram showing the circuit configuration of an embodiment of the present invention. Slave side synchronous circuit 18,
Control circuit 19. FIG. 4 is a block diagram showing details of the timing regeneration circuit 20. FIG. 4 is a time chart of waveforms of various parts in FIG. In the figure, 13 is a frame pulse generator, 2 is a training pulse generator, 3.14 is a selector, 4.15 is a unipolar-bipolar converter, 5.16 is a hybrid circuit, 6.19 is a control circuit, 7 .17 is an echo canceller, 8.21 is an identification circuit, 9.22 is an aliasing circuit, 10.23 is a subtracter, 11 is a reference oscillator, 12 is a clock supply circuit, 18 is a synchronization circuit, 20 is a timing recovery circuit, 24 is a frame pattern detection circuit, 25 is a frame synchronization counter, 26 is a frame synchronization establishment protection circuit, 27 and 28 are comparators, 29 is an OR circuit, 30 is an AND circuit, 31 is a digital PLL circuit, and 32 is an oscillator.

Claims (1)

[Claims] In subscriber line transmission equipment for realizing digital bidirectional transmission using a two-wire transmission line, the master side transmits frame pulses, training pulses, and transmission data in this order, and the slave side transmits the data from the master side. synchronized by frame pulses and receiving training pulses;
A subscriber line transmission device characterized in that timing regeneration pull-in is performed during the training pulse reception period, and signal transmission is prohibited until the training pulse reception is completed.