JPS61155866A - Reactive power transducer - Google Patents

Reactive power transducer

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Publication number
JPS61155866A
JPS61155866A JP27461284A JP27461284A JPS61155866A JP S61155866 A JPS61155866 A JP S61155866A JP 27461284 A JP27461284 A JP 27461284A JP 27461284 A JP27461284 A JP 27461284A JP S61155866 A JPS61155866 A JP S61155866A
Authority
JP
Japan
Prior art keywords
circuit
voltage signal
signal
voltage
reactive power
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP27461284A
Other languages
Japanese (ja)
Inventor
Ryoji Maruyama
亮司 丸山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP27461284A priority Critical patent/JPS61155866A/en
Publication of JPS61155866A publication Critical patent/JPS61155866A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To perform transducing operation without any influence of a voltage unbalance among voltages of respective phases by providing an integration circuit, variable amplifying circuit, amplification degree control circuit, etc., and using a transfer for both a single-phase system and a polyphase system. CONSTITUTION:The integration circuit 20, variable amplifying circuit 21, amplitude degree limiting circuit 27, etc., are provided. A voltage signal ev to be measured is phase-delayed by 90 deg. through the circuit 20 and sent to the circuit 21, and the signal em1 obtained from the signal ev by smoothing 25 and the signal em2 obtained from the signal ev inputted from the circuit 21 by smoothing 26 and supplied to the circuit 27 to generate the amplification degree control signal ed of the circuit 21, which is supplied to the circuit 21. Then, a voltage signal ec outputted by the circuit 21 multiplied by the voltage signal of a voltage signal ia to be measured to obtain a voltage signal e0 proportional to reactive power. Therefore, the signal e0 is obtained even by the single-mode system. For a polyphase system, transducers are only connected for respective phases. Thus, even if a voltage unbalance among respective phases is generated, an accurate voltage signal of reactive power for each phase is obtained.

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明は、単相系でも使用可能な無効量カドランスデュ
ーサに関する。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to an ineffective quadrature transducer that can be used even in a single-phase system.

〔発明の技術的背景〕[Technical background of the invention]

第3図は従来の三相3線式用無効電カドランスデューサ
の構成図である。周知のように無効電力Qは電圧をe、
電流を■、電圧−電流間の位相差をθすると Q−el・sinθ −e)−CO8(θ−90°) ・・−・−・(1)で
表わされる。よって電圧信号eを90’位相遅延した信
号と電流■とを乗算すれば無効電力Qが求められる。そ
こで第3図に示すトランスデユーサでは、1素子側およ
び3素子側の各電圧信号e1.03を適当な比率で合成
して各電圧信号el。
FIG. 3 is a configuration diagram of a conventional three-phase three-wire reactive quadrupole transducer. As is well known, reactive power Q is expressed as voltage e,
When the current is {circle around (1)} and the phase difference between voltage and current is θ, it is expressed as Q-el·sin θ-e)-CO8(θ-90°) (1). Therefore, the reactive power Q can be obtained by multiplying the voltage signal e with a 90' phase delay by the current ■. Therefore, in the transducer shown in FIG. 3, each voltage signal e1.03 on the 1-element side and the 3-element side is combined at an appropriate ratio to generate each voltage signal el.

e3を位相90°だけ遅延したe IL 、 e 31
電圧信号を作成し、これら電圧信号el’、e3’に対
して対応する電流信号fl、i2を乗算して無効電力を
求める方法を用いる。
e IL , e 31 with a phase delay of e3 of 90°
A method is used in which reactive power is obtained by creating voltage signals and multiplying these voltage signals el' and e3' by corresponding current signals fl and i2.

具体的に説明すると1素子側では増幅器1により電圧入
力端子2から入力される1素子側電圧elを(1/2>
倍し、また3素子側に設けられた増幅器3により電圧入
力端子4から入力される3素子側電圧e3を一1倍して
それぞれ加算回路5に加えて加算する。これにより加算
回路5からは第4図に示すように1素子側電圧e1を9
0°位相遅延した電圧信号eaが出力され乗算回路6に
送られる。また1素子側電流:1は電流−電圧変換回路
(以下、I/V変挽回路と指称する)7によりeiaな
る電圧信号に変換されて乗算回路6に送られる。かくし
て、乗算回路6の出力電圧e1mは el  m−ea  −e  i  a−cos  θ
=e1 ・cos (θ−90)・■1−81 1tl
sinθ となり1素子側の無効電力に比例した電圧信号e17F
Lが得られる。
Specifically, on the 1-element side, the amplifier 1 converts the 1-element side voltage el input from the voltage input terminal 2 into (1/2>
Furthermore, the three-element side voltage e3 inputted from the voltage input terminal 4 is multiplied by 11 by the amplifier 3 provided on the three-element side, and added to the adder circuit 5 and added. As a result, the adder circuit 5 outputs the 1-element side voltage e1 to 9
A voltage signal ea with a 0° phase delay is output and sent to the multiplier circuit 6. Further, the one-element side current: 1 is converted into a voltage signal eia by a current-voltage conversion circuit (hereinafter referred to as an I/V conversion circuit) 7 and sent to a multiplication circuit 6. Thus, the output voltage e1m of the multiplier circuit 6 is el m-ea -e i a-cos θ
= e1 ・cos (θ-90)・■1-81 1tl
sin θ, and the voltage signal e17F is proportional to the reactive power on one element side.
L is obtained.

一方3素子側は、第4図(b)に示すように電圧信号e
3を90度遅延した電圧信号ebを得るために、増幅器
9を一1/2倍の各増幅度に設定すれば、加算回路10
からは90度遅延した電圧信号ebが出力され、この信
号ebとI/V変挽回路11からの電圧信号eibとが
乗算回路12に加えられることにより乗算回路12から
3素子側の無効電力に比例した電圧信号33mが得られ
る。そして、乗算器61乗算器12の各出力電圧信号e
1 m、83 mを加算した後、平滑回路13により平
滑し出力回路14で低インビダンスに変換して出力端子
15から三相3線式の無効電力に対応した電圧信号を出
力している。
On the other hand, on the 3-element side, as shown in FIG. 4(b), the voltage signal e
In order to obtain the voltage signal eb delayed by 90 degrees from the voltage signal eb, the adder circuit 10
A voltage signal eb delayed by 90 degrees is output from the multiplier 12, and this signal eb and the voltage signal eib from the I/V conversion circuit 11 are added to the multiplier circuit 12. A proportional voltage signal 33m is obtained. Then, each output voltage signal e of the multiplier 61 and the multiplier 12
1 m and 83 m are added, smoothed by a smoothing circuit 13, converted to low impedance by an output circuit 14, and outputted from an output terminal 15 as a voltage signal corresponding to three-phase three-wire reactive power.

(背景技術の問題点〕 しかしながら上記トランスデユーサでは、各電圧信号e
1 、e3を90度位相遅延するために他の相、例えば
1素子側では3素子側の電圧信号e3を入力する構成と
なっている。このため、1素子側と3素子側との各電圧
信号レベルが同一すなわち平衡状態になければ正確に9
0度位相遅延ができなくなってしまい、得られた無効電
力の電圧。
(Problems in the background art) However, in the above transducer, each voltage signal e
In order to delay the phase of 1 and e3 by 90 degrees, the voltage signal e3 of the 3-element side is input to the other phase, for example, the 1-element side. Therefore, if the voltage signal levels on the 1st element side and the 3rd element side are the same, that is, not in a balanced state, the accuracy will be 9.
The voltage of the reactive power obtained when 0 degree phase delay is no longer possible.

信号に誤差の含んだものとなってしまう。さらに、他の
相の影響を受けてしまう欠点もある。また、現在の無効
電力用のトランスデユーサは上記構成のように3相(多
相)用のものであって、単相無効電力用のものは無かっ
た。これは電圧信号と90度位相遅延するのに不具合が
あったためで、測定の必要上単相無効電力用のものが要
求されている。
The signal ends up containing errors. Furthermore, it also has the disadvantage of being influenced by other phases. Further, current transducers for reactive power are for three-phase (polyphase) as in the above configuration, and there are no transducers for single-phase reactive power. This is because there was a problem with the phase delay of 90 degrees with the voltage signal, and for measurement purposes, one for single-phase reactive power is required.

〔発明の目的〕[Purpose of the invention]

本発明は上記実情に基づいてなされたもので、その目的
とするところは、単相系であっても使用できるとともに
多相系でも使用でき、かつ各相の電圧不平衡による影響
を受けずに正確に変換し得る無効電カドランスデューサ
を提供することにある。
The present invention was made based on the above-mentioned circumstances, and its purpose is to be able to be used not only in a single-phase system but also in a multi-phase system, without being affected by voltage unbalance of each phase. An object of the present invention is to provide a reactive quadrupole transducer that can accurately convert.

(発明の概要〕 本発明は、被測定電圧信号を積分回路又は微分回路によ
り90度移相して可変増幅回路により所定レベルに可変
増幅し、一方被測定電圧信号の整流信号と可変増幅回路
の出力信号の整流信号とを比較して増幅度制御回路から
増幅度制御信号を可変増幅回路へ与え、もって、この可
変増幅回路の出力信号と被測定電流信号とを乗算して無
効電力信号を得る無効電カドランスデューサである。
(Summary of the Invention) The present invention shifts the phase of a voltage signal under test by 90 degrees using an integrating circuit or a differentiating circuit, and variably amplifies it to a predetermined level using a variable amplifier circuit. The output signal is compared with the rectified signal, and an amplification control signal is given from the amplification control circuit to the variable amplifier circuit, and the output signal of the variable amplifier circuit and the current signal to be measured are multiplied to obtain a reactive power signal. It is a reactive quadrature transducer.

〔発明の実施例〕[Embodiments of the invention]

以下、本発明に係る無効電カドランスデューサの一実施
例について図面を参照して説明する。第1図は本発明の
無効電カドランスデューサの構成図である。同図におい
て20は積分回路であって、これは無効電力を得るため
に被測定電圧信号evの位相を90度だけ遅延するため
のものである。
DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a reactive quadrupole transducer according to the present invention will be described below with reference to the drawings. FIG. 1 is a configuration diagram of a reactive current quadrature transducer according to the present invention. In the figure, reference numeral 20 denotes an integrating circuit, which delays the phase of the voltage signal ev to be measured by 90 degrees in order to obtain reactive power.

具体的には帰還コンデンサC1が接続された演算増幅3
八1および入力抵抗R1から構成されている。21は可
変増幅回路であって、これは積分回路20から出力され
る積分電圧信号esを所定レベル可変増幅して出力する
ものであって、Cdsフォトカプラ等から成る電圧制御
可変抵抗22が帰還ラインに接続された演算増幅器A2
および入力抵抗R2から構成されている。そして、被測
定電圧信号evおよび可変増幅回路21から出力される
電圧信号eCは、それぞれダイオード、演算増幅器から
構成される理想ダイオード回路すなわち整流回路23.
24およびORパッシブ型積分器から成る平滑回路25
.26を通って増幅度制御回路27に送られる構成とな
っている。この増幅度制御回路27は、整流、平滑され
た被測定電圧信号em1と電圧信号em2との差を求め
、さらに積分を行なって前記可変増幅回路21の増幅度
制御信号edを作成するものである。具体的には、帰環
コンデンサC2が接続された演算増幅器A3および入力
抵抗R3から構成されており、具体的には被測定電圧信
号evに対応する平滑回路25から出力される電圧信号
emlは演算増幅器A3の一側入力端子に入力され、ま
た電圧信号eCに対応する平滑回路26から出力される
電圧信号em2は子側入力端子に入力されるようになっ
ている。
Specifically, the operational amplifier 3 to which the feedback capacitor C1 is connected
81 and an input resistor R1. Reference numeral 21 denotes a variable amplifier circuit which variably amplifies the integrated voltage signal es outputted from the integrating circuit 20 to a predetermined level and outputs it. operational amplifier A2 connected to
and an input resistor R2. The voltage signal ev to be measured and the voltage signal eC output from the variable amplifier circuit 21 are each connected to an ideal diode circuit, ie, a rectifier circuit 23.
24 and a smoothing circuit 25 consisting of an OR passive integrator.
.. 26 and is sent to the amplification control circuit 27. This amplification degree control circuit 27 calculates the difference between the rectified and smoothed voltage signal em1 to be measured and the voltage signal em2, and further performs integration to create an amplification degree control signal ed for the variable amplification circuit 21. . Specifically, it is composed of an operational amplifier A3 to which a return capacitor C2 is connected and an input resistor R3, and specifically, the voltage signal eml output from the smoothing circuit 25 corresponding to the voltage signal to be measured ev is calculated. The voltage signal em2, which is input to one input terminal of the amplifier A3 and output from the smoothing circuit 26 corresponding to the voltage signal eC, is input to the slave input terminal.

一方、I/V変換回路28は被測定電流信号iaをその
値に応じた電圧信号に変換するもので、変換後の電圧信
号は可変増幅回路21から出力される電圧信号ecとと
もに乗算回路29に送られるようになっている。この乗
算回路29は入力した各電圧信号を乗算して無効電力に
比例した電圧信号eOを出力するものである。この出力
された電圧信号eOは平滑回路30を介して低インピー
ダンス変換を行なう出力回路31に送られて外部に出力
される。
On the other hand, the I/V conversion circuit 28 converts the measured current signal ia into a voltage signal according to its value, and the converted voltage signal is sent to the multiplier circuit 29 together with the voltage signal ec output from the variable amplifier circuit 21. It is ready to be sent. This multiplier circuit 29 multiplies each input voltage signal and outputs a voltage signal eO proportional to the reactive power. This output voltage signal eO is sent via a smoothing circuit 30 to an output circuit 31 that performs low impedance conversion and output to the outside.

次に上記の如く構成されたトランスデユーサの動作につ
いて第2図に示す動作タイミング図を参照して説明する
Next, the operation of the transducer configured as described above will be explained with reference to the operation timing diagram shown in FIG.

同図に示すような被測定電圧信号evが印加されると、
積分回路20からは90°゛位相遅延された電圧信号e
Sが出力される。ここで被測定電圧信号evを es−Esin(1)t  とすると 積分回路20から出力される電圧信号eSは次式により
表わされる。つまり、 −(−1/R1CI)Jsinωt =(E/ωRI C1)cosωt −(−1/ωRICI) xs  i  n  (ω t  −π/2)    
=(2)である。この第(2)式から判明されるように
電圧信号eSはevに対して位相はπ/2 (90度)
遅延されてはいるが、振幅に角速度ωの影響を受けるこ
とが判かる。そこで、可変増幅回路21により振幅を制
御し角速度ωの影響を受けない信号を作成する。つまり
整流回路23により被測定電圧信号evを整流して整流
出力emlを得、さらに平滑回路25により平滑した電
圧信号emlを得る。
When the measured voltage signal ev as shown in the figure is applied,
The integrating circuit 20 outputs a voltage signal e whose phase is delayed by 90°.
S is output. Here, if the voltage signal ev to be measured is es-Esin(1)t, the voltage signal eS output from the integrating circuit 20 is expressed by the following equation. That is, -(-1/R1CI)Jsinωt = (E/ωRI C1)cosωt -(-1/ωRICI) xs in (ωt -π/2)
=(2). As can be seen from equation (2), the voltage signal eS has a phase of π/2 (90 degrees) with respect to ev.
Although it is delayed, it can be seen that the amplitude is affected by the angular velocity ω. Therefore, the amplitude is controlled by the variable amplifier circuit 21 to create a signal that is not affected by the angular velocity ω. That is, the rectifier circuit 23 rectifies the voltage signal ev to be measured to obtain a rectified output eml, and the smoothing circuit 25 further obtains a smoothed voltage signal eml.

一方、積分回路20から出力された電圧信号eSは可変
増幅回路21により増幅されて整流回路24に送られ、
この整流回路24により電圧信号ecの整流出力em2
を得、さらに平滑回路26により平滑され電圧信号em
2を得る。そして、各平滑回路25.26から出力され
る各電圧信号eml 、em2は共に増幅度制御回路2
7に送られ、もって増幅度制御回路27は各電圧信号e
m1 、em2の差を求めてこれを積分して増幅度制御
信号edを作成して可変増幅回路21の電圧制御可変抵
抗22へ出力する。ここで、増幅度制御信号edは初期
状態において上昇する。よって、初期状態においては電
圧制御可変抵抗22の抵抗値は小さくなって、可変増幅
回路21としての増幅度は低くなる。この結果、可変増
幅回路21から出力される電圧信号ecの振幅は小さく
なる。
On the other hand, the voltage signal eS output from the integrating circuit 20 is amplified by the variable amplifier circuit 21 and sent to the rectifier circuit 24.
This rectifier circuit 24 rectifies the voltage signal ec as output em2.
is further smoothed by the smoothing circuit 26 to obtain a voltage signal em
Get 2. The voltage signals eml and em2 output from each smoothing circuit 25 and em2 are both output from the amplification control circuit 2.
7, and the amplification control circuit 27 receives each voltage signal e.
The difference between m1 and em2 is determined and integrated to create an amplification control signal ed, which is output to the voltage controlled variable resistor 22 of the variable amplifier circuit 21. Here, the amplification degree control signal ed increases in the initial state. Therefore, in the initial state, the resistance value of the voltage-controlled variable resistor 22 is small, and the degree of amplification as the variable amplifier circuit 21 is low. As a result, the amplitude of the voltage signal ec output from the variable amplifier circuit 21 becomes small.

そして、増幅度制御回路27に入力する各電圧信号em
l 、em2のレベルが同一となると、この増幅度制御
回路27が出力される増幅度制御信号ed一定となる。
Then, each voltage signal em input to the amplification control circuit 27
When the levels of l and em2 become the same, the amplification control signal ed output from the amplification control circuit 27 becomes constant.

なお、この電圧信号edはed−−Es i n (ω
t−(π/2))・・・・・・(3) となる。また、第2図のに示すように時刻T1以後に角
速度ωが高くなると、増幅度制御信号edは、その角速
度ωの変化分だけ低くなる。この結果、電圧信号ecは
角速度ωの影響を受けないものとなる。かくして、電圧
信号ecとI/V変換回路28から出力される被測定電
流信号iaの電圧信号とが乗算回路29により乗算され
て、無効電力に比例した電圧信号eOが得られる。そし
て、この電圧信号eoは平滑回路30を介して出力回路
31から外部に出力される。
Note that this voltage signal ed is ed--Es i n (ω
t-(π/2))...(3) Further, as shown in FIG. 2, when the angular velocity ω increases after time T1, the amplification degree control signal ed decreases by the amount of change in the angular velocity ω. As a result, the voltage signal ec becomes unaffected by the angular velocity ω. In this way, the voltage signal ec and the voltage signal of the current signal to be measured ia outputted from the I/V conversion circuit 28 are multiplied by the multiplier circuit 29, and a voltage signal eO proportional to the reactive power is obtained. Then, this voltage signal eo is outputted to the outside from the output circuit 31 via the smoothing circuit 30.

このように上記一実施例においては、被測定電圧信号e
vを積分回路20により90度位相遅延して可変増幅回
路21に送り、また被測定電圧信号evの平滑回路と可
変増幅回路21から出力される電圧信号evの平滑回路
とから増幅度制御回路27により可変増幅回路21の増
幅度制御信号edを作成して可変増幅回路21に与え、
もって、可変増幅回路21から出力される電圧信号ec
と被測定電圧信号iaの電圧信号とを乗算して無効電力
に比例した電圧信号eoを得るので、単相であっても無
効電力に比例した電圧信号eoを正確に得ることができ
る。したがって、多相系に適用する場合は、各相別に上
記トランスデユーサを接続すれば、各相別に無効電力比
例した電圧信号を得ることができる。この場合、各相別
となるので他の相の影響を受けることはなく、よって、
各相間の電圧不平衡か生じても各相別に正確な無効電力
の電圧信号を得ることができる。
In this way, in the above embodiment, the voltage to be measured e
The integrator circuit 20 delays the phase of the voltage signal ev by 90 degrees and sends it to the variable amplifier circuit 21, and the amplification degree control circuit 27 to create an amplification degree control signal ed for the variable amplifier circuit 21 and give it to the variable amplifier circuit 21,
Therefore, the voltage signal ec output from the variable amplifier circuit 21
Since the voltage signal eo proportional to the reactive power is obtained by multiplying by the voltage signal of the measured voltage signal ia, the voltage signal eo proportional to the reactive power can be accurately obtained even in a single phase. Therefore, when applied to a polyphase system, by connecting the transducer for each phase, a voltage signal proportional to the reactive power can be obtained for each phase. In this case, since each phase is separate, it will not be affected by other phases, and therefore,
Even if voltage imbalance occurs between phases, accurate reactive power voltage signals can be obtained for each phase.

なお、本発明は上記一実施例に限定されるものではない
。例えば平滑回路25.26をピークホールド回路等の
振幅検知回路に換えてもよい。また、積分回路20に換
えて微分回路を接続して位相を90度進ませ、さらに可
変増幅回路21の出力端に反転回路を接続して出力を反
転させて演算」路29に送るようにしてもよい。
Note that the present invention is not limited to the above embodiment. For example, the smoothing circuits 25 and 26 may be replaced with amplitude detection circuits such as peak hold circuits. Also, a differentiating circuit is connected in place of the integrating circuit 20 to advance the phase by 90 degrees, and an inverting circuit is connected to the output terminal of the variable amplifier circuit 21 to invert the output and send it to the calculation circuit 29. Good too.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、被測定電圧信号を積分回路又は微分回
路により90度移相して可変増幅回路により可変増幅し
、また被測定電圧信号と可変増幅回路の出力信号とによ
り増幅度制御回路から可変増幅回路に増幅度制御信号を
作成して送り、もって可変増幅回路の出力信号と被測定
l!流信号とを乗算して無効電力比例した電圧信号を得
るので、単相系であっても使用できるとともに多相系で
も使用でき、かつ各相の電圧不平衡による影響を受けず
に正確に変換し得る無効電カドランスデューサを提供で
きる。
According to the present invention, the voltage signal to be measured is phase-shifted by 90 degrees by the integrating circuit or the differentiating circuit, and is variably amplified by the variable amplifier circuit, and the voltage signal to be measured and the output signal of the variable amplifier circuit are output from the amplification degree control circuit. An amplification control signal is created and sent to the variable amplifier circuit, and the output signal of the variable amplifier circuit and the measured l! Since the current signal is multiplied by the current signal to obtain a voltage signal proportional to the reactive power, it can be used in single-phase systems as well as multi-phase systems, and can be converted accurately without being affected by voltage imbalance of each phase. It is possible to provide a reactive quadrupole transducer that can be used.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明に係る無効電カドランスデューサの一実
施例を示す構成図、第2図は第1図に示すトランスデユ
ーサの動作タイミング図、第3図は従来の無効電カドラ
ンスデューサの構成図、第4図(a)(b)は無効電力
を求めるための模式%式% 第4図 (a) (b) 手続補正書 昭和 廣O−q・24日 特許庁長官  志 賀    学  殿1、事件の表示 特願昭59−274612号 2゜発明の名称 無効電力トランスデユーサ 3、補正をする者 事件との関係 特許出願人 (307)  株式会社 東芝 4、代理人 6、補正の対象 明細書、図面 7、補正の内容 (1)  明細書第3頁第14行ないし第15行の「電
圧信号ebを〜各増幅度に」を「電圧信号ebを得るた
めに、増幅器8を1倍、増幅器9を一1/2 倍の各増
幅度に」と訂正する。 (2)  同書第4頁第18行の「電圧信号と」を「電
圧信号を」と訂正する。 (3)同IIF第9頁第1行ないし第9行の「つまり整
流回路23〜電圧信号emlを得る。」を下記の文に訂
正する。 記 つまり整流回路23により被測定電圧信号6vを整流し
て整流出力en、を得、さらに平滑回路25により平滑
した電圧信号em。 を得る。 一方、積分回路20から出力された電圧信号esは可変
増幅回路21により増幅されて整流回路24に送られ、
この整流回路24により電圧信号ecの整流出力emu
を得、さらに平滑回路26により平滑され電圧信号en
dを得る。 (4)  同書第10頁第4行ないし第7行の「なお。 この電圧信号cdは〜となる。」を下記の文に訂正する
。 記 このときの電圧信号ecは ec−−Bsln(ω1−(π/2))・・・・・・(
3) となる。 (5)  図面第2図を別紙の通り訂正する。
FIG. 1 is a configuration diagram showing an embodiment of a reactive quadrupole transducer according to the present invention, FIG. 2 is an operation timing diagram of the transducer shown in FIG. 1, and FIG. 3 is a conventional reactive quadrupler transducer. Figure 4 (a) (b) is a schematic % formula for determining reactive power. Figure 4 (a) (b) Procedural amendment written by Showa Hiroshi O-q. 24th, Commissioner of the Patent Office, Manabu Shiga. 1. Indication of the case Patent Application No. 1982-274612 2. Name of the invention Reactive power transducer 3. Person making the amendment Relationship to the case Patent applicant (307) Toshiba Corporation 4. Agent 6. Amendment Subject specification, drawing 7, contents of amendment (1) Change “voltage signal eb to ~each amplification degree” on page 3, line 14 to line 15 of the specification to “in order to obtain voltage signal eb, amplifier 8 is 1x, and amplifier 9 to 11/2x amplification." (2) In the same book, page 4, line 18, "voltage signal" is corrected to "voltage signal". (3) In the same IIF, page 9, lines 1 to 9, ``In other words, the rectifier circuit 23 obtains the voltage signal eml.'' is corrected to the following sentence. That is, the voltage signal to be measured 6v is rectified by the rectifier circuit 23 to obtain a rectified output en, and the voltage signal em is further smoothed by the smoothing circuit 25. get. On the other hand, the voltage signal es output from the integrating circuit 20 is amplified by the variable amplifier circuit 21 and sent to the rectifier circuit 24.
This rectifier circuit 24 rectifies the voltage signal ec and outputs emu
is further smoothed by the smoothing circuit 26 to obtain a voltage signal en
get d. (4) In the same book, page 10, lines 4 to 7, ``Note: This voltage signal cd is...'' is corrected to the following sentence. The voltage signal ec at this time is ec--Bsln(ω1-(π/2))...
3) It becomes. (5) Figure 2 of the drawing is corrected as shown in the attached sheet.

Claims (1)

【特許請求の範囲】[Claims] 被測定電圧信号を入力して90度移相する積分回路また
は微分回路と、この積分回路または微分回路の出力を所
定レベルに可変増幅する可変増幅回路と、前記被測定電
圧信号の整流信号と前記可変増幅回路の出力信号の整流
信号との差分を積分して前記可変増幅回路の増幅度制御
信号を作成する増幅度制御回路と、前記可変増幅回路の
出力信号と被測定電流信号とを乗算して無効電力信号を
出力する無効電力出力回路とを具備したことを特徴とす
る無効電力トランスデューサ。
an integrating circuit or differentiating circuit that inputs a voltage signal to be measured and shifts the phase by 90 degrees; a variable amplifier circuit that variably amplifies the output of the integrating circuit or differentiating circuit to a predetermined level; an amplification control circuit that integrates the difference between the output signal of the variable amplification circuit and the rectified signal to create an amplification control signal of the variable amplification circuit; A reactive power transducer comprising: a reactive power output circuit that outputs a reactive power signal using a reactive power output circuit.
JP27461284A 1984-12-28 1984-12-28 Reactive power transducer Pending JPS61155866A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP27461284A JPS61155866A (en) 1984-12-28 1984-12-28 Reactive power transducer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP27461284A JPS61155866A (en) 1984-12-28 1984-12-28 Reactive power transducer

Publications (1)

Publication Number Publication Date
JPS61155866A true JPS61155866A (en) 1986-07-15

Family

ID=17544151

Family Applications (1)

Application Number Title Priority Date Filing Date
JP27461284A Pending JPS61155866A (en) 1984-12-28 1984-12-28 Reactive power transducer

Country Status (1)

Country Link
JP (1) JPS61155866A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007256023A (en) * 2006-03-22 2007-10-04 Institute Of National Colleges Of Technology Japan Method and circuit for measuring loss current by displacement current bypass method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007256023A (en) * 2006-03-22 2007-10-04 Institute Of National Colleges Of Technology Japan Method and circuit for measuring loss current by displacement current bypass method

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