JPS61155856A - Ultrasonic flaw inspector - Google Patents

Abstract

PURPOSE:To detect properly a defect generated in a turbine, pipe, etc., by providing a detecting circuit for a shape echo and a detecting circuit for a defective echo, and ANDing their outputs. CONSTITUTION:An ultrasonic wave is transmitted from a probe to an object to be inspected. A gate circuit 12A which detects the shape echo is provided at output sides of gate generators 11a-11c and level discriminators 13a-13c. Then, the probe obtains the shape echo obtained by probing the shape properly from a proper position. A gate circuit 12B which detects the defective echo is provided at output sides of gate generators 11f and 11g and level discriminators 13f and 13g to obtain the defective echo with a specific amplitude at a specific position. The AND output of the gate circuit 12A and the AND output of the gate circuit 12B are ANDed to discriminate between the shape echo and defective echo. Thus, the output so the shape echo and defective echo are ANDed, so the defective echo is detected properly and even the defective of a complex object body is detected accurately.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to an ultrasonic flaw detection device that detects defects inside a test object that cannot be directly observed from the outside.

(Technical Background of the Invention) Ultrasonic probe Oi devices have been known as devices for detecting internal defects in turbines, vibrators, etc. installed in plants. This method recognizes the internal shape of an object by emitting ultrasonic waves toward the inside of the object and detecting and analyzing the reflected waves (echoes). The prior art will be described below with reference to FIGS. 5 to 11 of the accompanying drawings. In addition, in the description of the drawings, the same elements are indicated by the same symbols.

FIG. 5 is a block diagram of a conventional device. Transmission pulses generated by the transmission pulser 1 are applied to the probe 2, where they are converted into ultrasonic signals and emitted into the interior of the object to be inspected. Ultrasonic waves reflected by an object 3 inside the object to be inspected are received by a probe 2, converted into an electrical signal, and amplified by a high frequency amplifier 4. This amplified received signal Y' is waveform-shaped by a detection circuit 5, amplified by a single-fold amplifier ii'1 6, and provided to a display device 7 such as a CRT display. This display 7 is supplied with a timing signal from the transmitting pulser 1 that has been swept and horizontally amplified by a sweep horizontal amplifier 8, and based on this, the received signal from the probe 2 is displayed on the screen.

On the other hand, gate generation @111~11o is gate signal 01~
G, and these are connected to AND gates 121 to 121, respectively.
12. give to Here, the gate generators 111 to 11o are configured so that the position on the time axis at which the gate is set can be selected and adjusted, and the logic 1 (
(hereinafter referred to as "1") is output. Further, the level discriminators 131 to 13o compare the output of the detection circuit 5 with a preset reference level, and when the reference level is exceeded, the discrimination signals 81 to so are set to "1". The signals 01 to On, which are the ANDed results of the gates 121 to 12o, are applied to an external circuit (not shown).If a buzzer is connected as the external circuit, an alarm can be output.

Next, the operation of the gate circuit 12 will be explained with reference to the waveform diagram shown in FIG. In addition, in Fig. 6, the vertical axis is the probe 2.
The horizontal axis represents the time from ultrasonic transmission to reception.

Now, on the screen of the display 7, two gate generators 11.
．． The gate range by 112 is 01. g2, level discriminator 131. 132 standard level, L
Assume that it is set to 2.

In this way, since the reflected ultrasound within the gate range 91 exceeds the reference level L1, the output S1 of the level discriminator 131 becomes "1", and therefore the output 01 of the ANO gate 121 becomes 01=G1 ・S1 = “i”. On the other hand, within the gate range g2, the reflected ultrasound does not exceed the reference level L2, so the output S2 of the level discriminator 13□ becomes °0'', and therefore the output o2 of the AND gate 122
is G2=a2・G2−“0”. In this way, the gate circuit 12 outputs "1" when a reflected ultrasonic wave higher than a preset level is obtained in a certain range.
However, if only the output below the level is obtained, it does not output "1". Next, an actual flaw detection test will be explained with reference to FIGS. 7 and 8. Figure 7 shows the object to be inspected 3.
FIG. 8 is a diagram illustrating the manner in which ultrasonic waves propagate inside the device, and FIG. 8 is a diagram illustrating the display on the screen of the display 7. As is clear from the figure, the reflected echoes P, -P are generated depending on the distance from the position of the probe 2 to the reflected portion of the object to be inspected 3, in other words, corresponding to each portion of the reflector ae. is obtained. Here, since the above-mentioned reflected ultrasonic waves appear due to the known shape (original internal shape) of the object to be inspected, these are hereinafter referred to as shape echoes.

Shape echoes P, ~P obtained as described above.

The internal shape of the object to be inspected 3 can be observed by comparing the level with a reference level using the level discriminators 131-131 and determining the position based on the gate signals 01 to Qn.

[Problems with background technology]

However, if there is a defect such as a protrusion inside the inspected object, the shape echo that should have been obtained may not be detected because it is blocked by this defect, or another reflected echo due to the defect (hereinafter referred to as "defect echo") may be detected. ) may be detected. FIGS. 9 to 11 are for explaining this situation.

As shown in FIG. 9, there is a protruding defect f1g in the object to be inspected 3.
When this occurs, ultrasonic waves that should normally reach the reflector e will be reflected by the defect q, and ultrasonic waves that should have reached the reflector d will be reflected by the defect f.

As a result, a shape echo P, as shown in FIG.

Pe disappears or significantly decreases, and defect echoes P, . . . Pg begin to appear in its place.

In a flaw detection test for an object to be inspected having such a defect shape, gate ranges 01 and g2 (see Fig. 11) are set on the horizontal axis according to the positions where defects f and Q are expected to occur, and level discrimination is performed. For the device, the reference level L, L
By setting f(], however, if there is a defect as shown in Fig. 11, the reflected echo from the defective part (defect echo) P,
, Pg as well as shape echoes P, PC based on the original shape.
is always displayed on the display 7, whereas if there is no defect, the defect echo Pr.

The shape echo Pd, P is displayed instead of P, so
It is not easy to conduct flaw detection tests.

Moreover, since the incident position of the ultrasonic wave changes when the position of the probe 2 changes, the beam path lengths of the shape echo P - Pe and the defect echoes P and Pg also change accordingly. As a result, the echo waveform displayed on the screen of the display 7 moves in parallel according to the movement of the probe 2, and the defective echo P appears in the gate range q 9g in FIG.
f.

In addition to P, the original shape echoes P ~ P can also be easily g
ae Coming in. Since these gate circuits 12 cannot distinguish whether the reflected echo in the gate range is a shape echo or a defect echo, flaw detection is particularly difficult for a test object with a complicated shape. This is because if the shape is complex, many shape echoes will be given, so the output of the gate circuit 12 will always be "1".

[Purpose of the invention]

The present invention has been made in order to overcome the drawbacks of the prior art as described above, and provides an ultrasonic flaw detection device that can appropriately detect defect echoes and obtain gate signals even for objects with complex shapes. The purpose is to

[Summary of the invention]

In order to achieve the above object, the present invention includes a gate circuit for detecting shape echoes and a means for logically multiplying the outputs of the gate circuits to determine an appropriate probe position and also detect defective echoes. By further ANDing this OR output and the above-mentioned AND output, it is possible to determine the presence or absence of a defective echo at an appropriate probe position. The present invention provides an ultrasonic flaw detection device that accurately detects flaws. - [Embodiments of the Invention] Hereinafter, some embodiments of the present invention will be described with reference to FIGS. 1 to 4 of the accompanying drawings.

FIG. 1 is a block diagram of one embodiment. As shown in the figure, a gate circuit 12A for detecting shape echoes on the output sides of gate generators 11a to 11c and level discriminators 13a to 13c.
and a gate generator 11. .

11, and a level discriminator 13. ．． A gate circuit 12B for detecting defective echoes is provided on the output side of 13g. The gate circuit 12A is composed of AND gates 12a to 12c, and their outputs are logically multiplied by the AND gate 14 so that A=O・O6・OC=G ” S ′ G ”
S b' G c " S c is given to the Aab ND gate 15. The gate circuit 12B is composed of AND gates 12.12g, and their outputs are logically summed by the OR gate 15 to obtain B=Of+Og=G.
It is applied to the AND gate 16 as f-8f+Gg·S.

Next, the functions of the gate circuit 12A and the AND gate 14 shown in FIG. 1 will be explained with reference to the waveform diagram in FIG. FIG. 2 shows the state when there is no defect in the object 3 to be inspected, and it is assumed that shape echoes that no longer occur due to the occurrence of defects are P 1 and P 2 . These circuit elements (gate circuit 12A, AND gate 14) are for detecting shape echoes as described above, and they always appear on the screen of the display 7 as shown in FIG. It is an index of shape echo P-PC (also known as P-PC). That is, with respect to the position of the shape echo P-PC that occurs when the probe 2 is at the proper position for inspection, a relatively narrow range of gates Q-QC, such as gate signals G, ~G, is applied. provided, discriminators 138 to 13
Set the level L-LC of C. By doing this, all the shape echoes P-PC are within the preset gate range within J-Go, and the bell is set.
Only when it appears above Lc, the AND gate 14 outputs A=Ga-8,.G,S.

・GC-8c is obtained (becomes 1).In other words, when the output A becomes "1", the shape echo serving as the index is obtained at the appropriate position and amplitude. This indicates that the position of these probes 2 and the state of contact with the object to be inspected 3 are appropriate.

In this way, the gate circuit 12A and the AND gate 14
By adding a logic circuit such as this, the position and contact state of the probe can be confirmed, and therefore the position of the flaw detection waveform on the screen in the horizontal axis direction can be defined.

Next, the 1a function of the gate circuit 12B and the OR gate 15 shown in FIG. 1 will be explained with reference to the waveform diagram in FIG. FIG. 3 shows a case in which the shape echoes P and Pe disappear and new defect echoes P and P are generated because a defect f9g appears in the object 3 to be inspected. The above circuit elements (gate circuit 12B, OR gate 1
5) is for detecting defective echoes, and indicates that defective echoes P, , P, have appeared on the screen of the display 7, as shown in FIG.

That is, a gate Of,g, in a predetermined range is set for the position where a defect is expected to occur, and the discriminator 13.13
Set the level to L, L, 1g. In this way, when a defect appears at any position, the OR gate 15 outputs B=G, ・Sf 0 Gg ・S
g is obtained (becomes "1"). In other words, when the output B becomes "1", it means that a defective echo is obtained at a predetermined position and amplitude, and the object to be inspected 3
This shows that defects f and/or q have appeared inside.

Here, the output A of the AND gate 14 and the output B of the OR gate 15 are ANDed by an AND gate 16. This theory I! ! ! The product output C=A −B is “1” because all the shape echoes P −P appear at the preset horizontal axis positions and levels on the screen, and the defective echoes P, ,
This is only when at least one of Pg appears at a predetermined position and level. Therefore, the inspector can judge the result of defect detection performed under appropriate conditions by simply observing the result of output C ("0" or "1"). If the result of the output A is also displayed by a buzzer, LED, etc., the proper position of the probe 2, especially in this embodiment, the gate circuit 12A can be monitored. AN
Since the proper position of the probe 2 can be monitored by the D gate 14, even when the position of the probe 2 changes with respect to the complex-shaped test object 3 and the shape echo moves, the shape echo is and defective echoes can be easily identified, thus overcoming the drawbacks of conventional devices.

FIG. 4 is a block diagram of main parts of another embodiment of the present invention. In this embodiment, the shape processing] - the gate signal G of
-G and discrimination signal S -8C are all a C
a It is input to AND gate 17. Even in this case, the output C is the same as the circuit shown in Figure 1 and 11.C=08 ・G, ・Go −8a-8, ・SC・(G,
・S, +Gg・s, > Therefore, the same effect as in the above embodiment can be obtained.

Note that the means for realizing the present invention is not limited to the above embodiments,
Any logic circuit may be used as long as it realizes the same logic. Moreover, the above logic can also be realized by software, firmware, etc.

On the other hand, in the description of the above embodiment, the gate for detecting shape echoes is 3111i1, and the number of gates for detecting defective echoes is two. However, the present invention is not limited to this, and any number of gates may be used.

〔Effect of the invention〕

As described above, the present invention includes a circuit including a gate for detecting shape echoes and a circuit including a gate for detecting defective echoes, and detects defective echoes at appropriate probe positions by ANDing the outputs of these circuits. Since the presence or absence of the defects is detected, it is possible to provide an ultrasonic flaw detection device that can properly detect defects even in objects with complex shapes and obtain gate signals.

[Brief explanation of the drawing]

FIG. 1 is a configuration diagram of a main part of one embodiment of the present invention, FIGS. 2 and 3 are waveform diagrams explaining the operation of the same embodiment, and FIG. 4 is a main part of another embodiment of the present invention. 5 is a configuration diagram of an example of a conventional device, FIG. 6 is a waveform diagram explaining the operation of the configuration example of FIG. 5, and FIG. 7 is a sectional view of an object to be inspected having a complicated shape. FIG. 8 is a waveform diagram showing the flaw detection waveform for the object to be inspected, FIG. 9 is a cross-sectional view showing the defect position when a defect occurs in the object to be inspected in FIG. FIG. 11 is a waveform diagram showing the flaw detection waveform for an object to be inspected. FIG. 11 is a waveform diagram illustrating a situation when an object to be inspected is inspected using the configuration example shown in FIG. 3...Object to be inspected, 12.12A, 12B...Gate circuit, S1~So, G~Gg...Gate signal, S
1~So, S, ~Sg...discrimination signal, Pa-Pe...
・Shape echo, p,, pg...defect echo. Applicant's agent Kiyoshi Inomata - Example - 19t 9g Figure 5 Figure 7 Figure 8 figure

Claims (1)

[Claims] 1. A probe that emits ultrasonic waves at predetermined timing into the interior of an object to be inspected whose internal shape is known and receives reflected ultrasonic waves, and an output signal of this probe. detection means for detecting a shape echo corresponding to the original internal shape of the object to be inspected and a defect echo corresponding to the defect shape based on the shape echo, and a shape echo discrimination for determining whether the level of the shape echo is appropriate or not. means for determining whether the level of the defect echo exceeds an allowable range; and a shape echo gate signal for inspecting whether or not the shape echo occurs at a predetermined position at the predetermined timing. means for outputting a defect echo gate signal according to the predetermined timing for inspecting whether or not the defect echo has occurred at a predicted defect position where a defect is predicted to occur in advance; and a shape echo discriminating means. a shape echo logical product means for logically multiplying an output and the shape echo gate signal; a defect echo logical product means for logically multiplying the output of the defect echo discriminating means and the defect echo gate signal; Based on the output of the logical product means, it is determined whether or not the probe is in the proper position. An ultrasonic flaw detection device comprising a discriminating means for discriminating whether or not a flaw exists. 2. A plurality of the predicted defect positions are set inside the object to be inspected, and the means for outputting the gate signal for defect echo, the defect echo discrimination means, and the AND means for defect echo correspond to the predicted defect positions, respectively. The ultrasonic waves according to claim 1, wherein a plurality of ultrasonic waves are provided, and the determining means determines whether or not there is a defect inside the inspected object based on the logical sum of the outputs of the defect echo logical product means. Flaw detection equipment.