JPS6115250A - Ｔｌｂ制御方式 - Google Patents

Ｔｌｂ制御方式

Info

Publication number
JPS6115250A
JPS6115250A JP59135907A JP13590784A JPS6115250A JP S6115250 A JPS6115250 A JP S6115250A JP 59135907 A JP59135907 A JP 59135907A JP 13590784 A JP13590784 A JP 13590784A JP S6115250 A JPS6115250 A JP S6115250A
Authority
JP
Japan
Prior art keywords
entry
page
tlb
bit
same
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59135907A
Other languages
English (en)
Japanese (ja)
Other versions
JPH024017B2 (enrdf_load_stackoverflow
Inventor
Kazutoshi Eguchi
江口　和俊
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP59135907A priority Critical patent/JPS6115250A/ja
Priority to US06/749,866 priority patent/US4731740A/en
Publication of JPS6115250A publication Critical patent/JPS6115250A/ja
Publication of JPH024017B2 publication Critical patent/JPH024017B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Memory System Of A Hierarchy Structure (AREA)
JP59135907A 1984-06-30 1984-06-30 Ｔｌｂ制御方式 Granted JPS6115250A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP59135907A JPS6115250A (ja) 1984-06-30 1984-06-30 Ｔｌｂ制御方式
US06/749,866 US4731740A (en) 1984-06-30 1985-06-28 Translation lookaside buffer control system in computer or virtual memory control scheme

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59135907A JPS6115250A (ja) 1984-06-30 1984-06-30 Ｔｌｂ制御方式

Publications (2)

Publication Number Publication Date
JPS6115250A true JPS6115250A (ja) 1986-01-23
JPH024017B2 JPH024017B2 (enrdf_load_stackoverflow) 1990-01-25

Family

ID=15162614

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59135907A Granted JPS6115250A (ja) 1984-06-30 1984-06-30 Ｔｌｂ制御方式

Country Status (1)

Country Link
JP (1) JPS6115250A (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63132355A (ja) * 1986-06-18 1988-06-04 フランス国 メモリ制御装置

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58139387A (ja) * 1982-02-12 1983-08-18 Hitachi Ltd アドレス変換方式

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58139387A (ja) * 1982-02-12 1983-08-18 Hitachi Ltd アドレス変換方式

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63132355A (ja) * 1986-06-18 1988-06-04 フランス国 メモリ制御装置

Also Published As

Publication number Publication date
JPH024017B2 (enrdf_load_stackoverflow) 1990-01-25

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