JPS61151418U - - Google Patents

Info

Publication number
JPS61151418U
JPS61151418U JP3335785U JP3335785U JPS61151418U JP S61151418 U JPS61151418 U JP S61151418U JP 3335785 U JP3335785 U JP 3335785U JP 3335785 U JP3335785 U JP 3335785U JP S61151418 U JPS61151418 U JP S61151418U
Authority
JP
Japan
Prior art keywords
intermediate frequency
emitter
uhf
reception
vhf
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3335785U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP3335785U priority Critical patent/JPS61151418U/ja
Publication of JPS61151418U publication Critical patent/JPS61151418U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案に係る中間周波増幅回路の一実
施例を示す回路図、第2図は本考案により実現さ
れるチユーナの電力利得の配分を示す図、第3図
は本考案の他の実施例を示す回路図、第4図は本
考案を適用したチユーナの一例を示す回路ブロツ
ク図、第5図は同上チユーナにおける電力利得の
系統図、第6図は従来の中間周波増幅回路の一例
を示す回路図、第7図は従来のチユーナによる電
力利得の配分を示す図である。 15……増幅用トランジスタ、16……負荷抵
抗、17……電源端子、18,19……ベースバ
イアス抵抗、20……帰還抵抗、23……利得切
替電圧入力端子、24……ダイオード、25……
抵抗。
Fig. 1 is a circuit diagram showing one embodiment of an intermediate frequency amplification circuit according to the present invention, Fig. 2 is a diagram showing distribution of power gain of a tuner realized by the present invention, and Fig. 3 is a circuit diagram showing an embodiment of an intermediate frequency amplification circuit according to the present invention. A circuit diagram showing an embodiment, FIG. 4 is a circuit block diagram showing an example of a tuner to which the present invention is applied, FIG. 5 is a power gain system diagram in the same tuner, and FIG. 6 is an example of a conventional intermediate frequency amplification circuit. FIG. 7 is a diagram showing distribution of power gain by a conventional tuner. 15... Amplification transistor, 16... Load resistor, 17... Power supply terminal, 18, 19... Base bias resistor, 20... Feedback resistor, 23... Gain switching voltage input terminal, 24... Diode, 25... …
resistance.

Claims (1)

【実用新案登録請求の範囲】 VHFあるいはUHFの中間周波信号がベース
に供給され、エミツタと基準電位点間に抵抗を有
し、かつコレクタは負荷抵抗を介して電圧源に接
続され、そのコレクタより出力を取出すようにし
た増幅用トランジスタと、 VHF受信時とUHF受信時とでそれぞれ異な
るレベルの電圧を前記トランジスタのエミツタに
印加し、その増幅率を切替える手段とを備えて成
る中間周波増幅回路。
[Claims for Utility Model Registration] A VHF or UHF intermediate frequency signal is supplied to the base, a resistor is provided between the emitter and the reference potential point, and the collector is connected to a voltage source via a load resistor. An intermediate frequency amplification circuit comprising an amplification transistor configured to take out an output, and means for applying voltages of different levels to the emitter of the transistor during VHF reception and UHF reception to switch the amplification factor.
JP3335785U 1985-03-11 1985-03-11 Pending JPS61151418U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3335785U JPS61151418U (en) 1985-03-11 1985-03-11

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3335785U JPS61151418U (en) 1985-03-11 1985-03-11

Publications (1)

Publication Number Publication Date
JPS61151418U true JPS61151418U (en) 1986-09-19

Family

ID=30535733

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3335785U Pending JPS61151418U (en) 1985-03-11 1985-03-11

Country Status (1)

Country Link
JP (1) JPS61151418U (en)

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