JPS61148494A - Touch response scanning circuit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a real scanning processing device useful in electronic musical instruments, and is used to control the volume and timbre of sound by the speed of key depression or key release. The present invention relates to a touch response scanning circuit.

[Prior art]

A digitally processed touch response circuit that detects the speed of key presses is known. For example, JP-A-49-842
Such a touch response scanning circuit is disclosed in Japanese Patent No. 16.

By the way, the keyboard mechanism for detecting the speed of key presses has two contacts corresponding to each key, measures the difference in on time between the two contacts, and obtains this data as key press speed data. The distance between the two contacts is usually 5 to 5 points.

According to actual measurement data, the maximum key pressing speed during performance is 1 hour
It may reach 00-.

If the distance between the two contacts is 5-, the difference in on time between the two contacts is 18
It becomes 0 μs. Therefore, the counter increment for speed detection must be 180μ days.It is very difficult to process the individual key press speed measurements of a large number of keys within this time, but the processing speed is not covered in this invention. Another major problem is countermeasures against chattering in mechanical contacts.

[Problem that the invention seeks to solve]

The chattering of the mechanical contacts is longer than the key pressing speed detection Wi, which is 180 μs, and the scanning malfunction due to this chattering must be taken into consideration.

[Means for solving problems]

In order to solve the above problem, in the present invention, the time to be measured is determined by using a contact that turns on at a shallow position of the key depression as the first contact, and a contact that turns off at a deep position of the key depression as a second contact. Time measurement that should ignore OFF chattering when the first contact is ON.

2) Measuring the speed of the second contact turning on from the wX1 contact turning on at the same time as above, 5) Measuring the time when the on-chattering should be ignored when the second contact turns off at the start of key release 4) At the same time as above, measuring the time when the second contact turns off and the first contact OFF speed time measurement 5) First contact on chatter after completion of key release Five types of time measurements that should be ignored are configured to switch and use general-purpose time measurement counters whose number is equal to the number of keys.

[Effect]

By configuring as described above, it is possible to measure the speed of key depression and key release with a time resolution shorter than the switch chattering time with a simple circuit configuration.

[゛Example]

Examples of the present invention will be explained below with reference to the drawings.
FIG. 1b and FIG.

1 is a keyboard circuit that makes it possible to detect the speed at key press and key release, and consists of @11 contact part that turns on at a shallow position when a key is pressed, and a second contact part that turns on at a deeper position. The section is divided into g rows and k columns, and one end of each switch is connected in units of rows and driven by a row scanning counter 2, which will be described later.

The other ends of the switches are connected in columns after the diodes are connected, and yt to Fk serve as one input of an AND gate 4, which will be described later. Similarly, the second contact section is divided into g rows and columns, and one end of each switch is connected in units of rows, and the row scanning counter 2
The other end of the switch is connected in a column unit after connecting a diode, and 81 to 8 serve as one input of the AND gate 5.

The output lines 13R1 to DRg of the row scanning counter 2 drive the 10th row line of the keyboard circuit.

The base clock of the counter is supplied from a control circuit 26, which will be described later. The output lines R1 to Rk of the column scanning counter 5 serve as extraction inputs of the AND gate group 4.5.

The 4th group is an AND gate group. For example, one end of the 4-column AND gate input is the keyboard Fk, and the other input is the 6-input scanning counter output j1.

The outputs of the four groups of AND gates are connected to the inputs of the OR gate 6, and the ON/OFF states of the individual key switches of the first contacts are obtained in a time-sharing manner at the output F of the OR gate 6. Similarly 5
In the group AND gate, -g of the column AND gate input to 5-! aFi keyboard Elk, other inputs are the column scanning counter output 1, the AND gate output of the 5th group is connected to the input of the OR gate 7, and the OR gate 7 output S shows the ON/OFF state of the individual key switches of the 2nd contact. can be obtained in a time-sharing manner.

The key register 8 is basically configured to obtain the pre-scan key switch state of the currently scanned output key. The shift register 9 is composed of two wires, 9-1 corresponding to the first contact group and 9-2 corresponding to the second contact group, and their respective outputs are 11R and S.
It is called R. The number of stages of each shift register matches the number of keys. The clock of the shift register is the same as the base clock of the column running counter 5, and is synchronized with it. Switcher 1
0 is when the control circuit 26 output RWRXTN is at L level, the Y output is on the A side, PR and F3B are held and l'JIFRI
When τ1 is at H level, the Y output is on the B side, and the control circuit 26
Output FI 5ET8 R8 Tobi? new level 77
It is stored in the register 9.

The AND gate group 11 is the output PR, S of the shift register 9.
R is decoded to obtain the processing mode output for each key and output to the control circuit. Both F E and #R are 1 at L level
1-1 is B level (key press start detection mode) FR=B
l? When R=L, 11-2 is B level (key press measurement mode) IFR=II When EiR=E, 11-5 is B level
Level (key release start detection mode) Bv level till-4 outputs B level (111m measurement mode) for both PR and SR.

The counter 12 has an M-bit counter configured in an N-channel time division manner. Each 7-foot register 13 consists of N stages, and M pieces are lined up. The adder 14 has m-bit input terminals and +
One-man power, m-pit output. When the output GOOL of the control circuit 26 is L, the switch 15 is in an increment mode in which the adder output becomes an input to the shift register, and when C0CL is B, L is input to the 77 register and the counter is cleared.

AND gate 56Fis Each shift register is H (maximum count state! 11) and inhibits ClN0 of the control circuit 26 (inputted to AND gate S7. With this configuration, in the maximum count state, increment stops and the counter sets the maximum value to self. Hold.

The release completion flag 18 is composed of an N-stage 77V register and a switch, and when the control circuit 260F'IL*xt is L, the self-holding pWRXTM is written at 8 o'clock, and the 911 tobicho is set at B. It is reset with L. The purpose of this flag is to have a mode in which open/wide key presses are not detected for a certain period of time after key release speed measurement is completed.

The registration register 19 is a register with a real name that captures the counter, and the number of columns equal to the number of bits of the row scan counter/2 and column scan color/5 is the register 2a-1 to 2O-G.
7 of the control circuit 26.
;, When WRXTM is L, the contents are self-retaining, when H, KROL
is the content of two scan counters (corresponding to the real name) in L.
is written, and if KROL is ■, all B's (which means empty) are written. Therefore, the scan counter is all 1
The counter must have no state.

Registration register 1? , counter 12, built-in shift of release completion flag) L/registers all have N stages and operate in synchronization with the common system clock φ.

The coincidence detection circuit 25 sends out an empty channel output to the control circuit 26 when the contents of the scanning counter and the contents of the registration register match, to the registered CE small output control circuit, and the empty detection circuit 24 sends an empty channel output to the control circuit 26 when the registration register output is all 8. .

The comparison circuit 25 compares the measured time outputted from the control circuit 26 with the count data, and sends out count data and count over output to the control circuit 26.

The control circuit 26 is a logic circuit whose circuit structure is decoded according to the operation flow, and the details of the circuit will be explained by referring to the operation flow.

In addition to the function of specifying a new state for each circuit by inputting the state of each circuit, it also outputs the on/off state of the key to the outside.

FIG. 2 shows an operation flow for explaining the operation of the circuit according to the first embodiment.

(2) is a case where no key press is detected in the key press start detection mode, and the process moves to the next key scan.

(3) is a case where a key press is detected but the counter is completely used for other key processing and is BUEIY, and the process moves to the next key scan without processing.

The act of determining 1jiOH=ll requires a clock time equal to the number of channels.8Similarly, the input/output of registration registers, counters, and off-chatter flags requires a clock time equal to the number of channels. shall not be described.

■Registers to an empty channel at the start of key press and moves to press-measurement mode.

(2) increments the counter of the registered channel when only the first contact is on in the key press measurement mode.

■ is key press measurement mode, both contacts are off and counter force T
In the event that OA (@ contact on chatter time) has not been reached, this event also simply increments the counter.

■ is the key press measurement mode, and when the double contact off counter exceeds TCA, it is determined that the performer has stopped pressing the key midway through, the registration is canceled, the counter is cleared, and the mode is changed to the key press start detection mode. Return to.

■ is the key press measurement mode, when the l@2 contact is on, the key press is completed, and after sending the KKY ON signal to the outside, the registration is canceled, the counter is cleared, and the mode is changed to the key release start detection mode. Shift, 惺) is in key start detection mode, @22 contact is on, key press is Re
el, no processing, (0 is when the second contact is off, the empty counter cannot be captured even when the key is released and no processing is performed, [phase] is registered to the empty channel when the key is released, and the mode is released. Move to key measurement mode.

(2) is the key release measurement mode, in the case of key release speed measurement, 0#i key release measurement is completed, and in the case of off chatter measurement.

0 means that the counter does not exceed TOB (chattering time when the second contact is off) when the key release speed is measured, so the counter is simply incremented. Therefore, the counter is simply incremented while the key is being released.

■The counter measures TCP when key release speed is measured! After that, since the @22 contact is on, it is determined that the performer starts to release the key but returns to the key press midway through, cancels the registration, clears the counter, and returns the mode to the key release start detection mode. ] exceeds TQB in the key release speed measurement, the key release is completed when both contacts are off, and Kl! Sends OFF to the outside, and then sets the off-chatter flag and clears the counter in order to move on to off-chatter measurement.

◎ means when the counter does not exceed Too (first contact off-chattering time) during off-chattering measurement, the counter is simply incremented.

In [phase], the counter exceeds the TOC during off-chatter measurement, so the registration is canceled, the counter is cleared, the off-chatter flag is reset, and the mode is shifted to key press start detection mode.

The operation of the circuit has been explained above, but since each key is processed in a time-sharing manner, it is difficult to understand the operation when focusing on a single key. FIG. 5 shows an outline of the operation flow focusing on a single key, and this will be explained.

Figure 5 shows a specific key pressed ~1l111! The processing flow is shown below.

■ is the start of key press, ■ is KF when the second contact turns on after the start of press 'a'
Sends XY ON, ■ indicates key release while the first contact is off after TCA (chattering time when first contact is on) has elapsed after the start of key press, ■ measures TOA after key press starts, [F] indicates press After the key starts, TCA is exceeded, the key press speed is measured, [F] is the key release start, ■ is the m key start iT (!B (chattering time when the second contact is off) elapsed, ■ is the first contact after TOB elapsed) Sends Kl!l!OFF when off, ■tiT(!After E elapses @
When 2 contacts are on, the key is pressed while the key is being released, @ is the measurement of the key release speed while the key is being released, and ■ is when the key release is completed and the key press is detected again after exceeding 6tT (!O (Chattering time when the 11 contacts are off)). Next, the actual on/off time chart of the key switch is shown in the second diagram, and the meaning of the operation flow described so far will be described.

1) is the first . This is an example including chattering at the second contact. When P=E, the speedometer starts on the sub side and outputs ON when B=E. The OFF speed is measured at the next 8=L, but since the day after TCB elapses is 3, it is determined that the key is being pressed.

2) is w when the key is released, 1. This is an example including chattering at the second contact. OFF speed measurement starts at 8=T,+, and Ei=L is confirmed when TOB has passed, and it is determined that the key is truly released, and speed measurement is continued.

When P=L, OFF data is output, but then the off-chatter time measurement mode is entered, and only after Tcc has elapsed does it return to the next key press detection mode.

5) is an example of a key being released in the middle of being pressed.

ON speed measurement is started at IF=11, but if F=L is detected after TOA has elapsed, it is determined that the key has been released in the middle of being pressed, and the process returns to key press detection.

4) Key release is TOB! shi early (completed φ example, S=
OFF speed measurement starts with L, but the counter is TO
The fastest key release data is TCB because it is not determined that the key release is complete until BK is reached, even if F=L. 1. This restriction is unavoidable when considering the chattering of the second contact. 5) This is a case where the key occurred early.

Since the second key press detection is performed after the off chatter time TC, O is completed after the OFF data is output, data can be obtained in which the second key press speed is actually detected L faster. This restriction is unavoidable when considering the first contact point.

6) is a case where the switch is turned off for a short time due to slight vibrations when the key is pressed. At the L level of the first contact, it is not determined that the key release has started, and when the second contact is at the L level, the key release OFF speed is detected and the second contact is made after TOB. A multi-response run that requires the speed measurement time when the key is turned on to be shorter than the chattering time of the contacts! An effective circuit configuration is obtained, and the circuit configuration is also simple.

[Brief explanation of drawings]

@1 Figure (a) and @1 Figure (b) are circuit diagrams of embodiments of this invention. Figure 2 shows the operational flow of this embodiment circuit. Figure 5 is an operational flowchart for one key of this embodiment circuit. FIG. 4 is an operation time chart of this embodiment circuit. 1...Keyboard circuit 2...Row scanning counter 5...Column scanning counter 4 to 7...Key output circuit 8...Key register 9...Sist register t(1...Switcher 11 ...AND gate group 12...Counter +5...Sist register 14...Adder 15...Switcher 16...AND gate 17...And gate 18...Release completion flag %9 ... Registration register 20 ... System register 21 ... Switcher 22 ... OR gate 23 ... Match detection circuit 24 ... Empty detection circuit 25 ... Comparison circuit 26 ... Control circuit

Claims (3)

[Claims] (1) In an electronic musical instrument that uses digital processing for keyboard scanning, a keyboard has a first contact that turns on when the key is pressed shallowly and a second contact that turns on when the key is pressed deeper, corresponding to each key. means for scanning the circuit and measuring the difference in on time between the two contacts when each key is pressed; means for measuring the chattering time when the first contact is on when the key is pressed; and the chattering when the second contact is off when the key is released. A touch response scanning circuit for an electronic musical instrument, comprising means for measuring time and means for measuring off-time chattering time of a first contact. (2) A touch response scanning circuit for an electronic musical instrument as set forth in claim 1, further comprising means for measuring an off time difference between two contacts in addition to the measuring means. (3) The touch of an electronic musical instrument according to claim 1, characterized in that the time measuring means has a much smaller number of counters than the number of keys, and is switched and used as the five types of purpose-specific measuring means. Response scanning circuit.