JPS61144999A - Video signal recording and reproducing system - Google Patents

Abstract

PURPOSE:To suppress the deterioration in the resolution of a horizontal direction and an oblique direction and an outline blur and to improve the picture quality of a reproducing picture by making a horizontal period signal into a 2H period, and as a luminance signal, multiplexing by the time division, the luminance which is not compressed by the time base and the luminance which is compressed to about 4/5 times by the time base. CONSTITUTION:In the recording system, the output signal of a compound circuit 18 is made analog by a D/A converting device, and a time division multiple signal TD is obtained. At the time division multiple signal TD, a horizontal synchronizing signal HS', whose period is 2H, is compressed to 4/5 times by the time base, one side chrominance difference components which is compressed to 1/5 times by the time base between the horizontal synchronizing signal HS' and the next horizontal synchronizing signal HS', a luminance signal YW which is not compressed, other side chrominance difference components which is not compressed to 1/5 times by the time base, and a luminance signal YN which is compressed to 4/5 times by the time base, are arranged in the order, and the period t1 from the start end of the period of a luminance signal YW to the start end of the period of the next luminance signal YN is almost equal to 1H. Thus, the time division of the luminance signal and the chrominance components can afford to be multiplexed, the low area band of the luminance signal can be avoided and the waveform rounding can be prevented.

Description

Detailed Description of the Invention [Field of Application of the Invention] The present invention relates to a recording and reproducing method for a video signal consisting of at least a luminance signal and two color difference signals, and in particular, a method for compressing the luminance signal and the color difference signal in the time axis. The present invention also relates to a method suitable for time-division multiplexing and recording and reproducing so as not to overlap each other on the time axis.

[Background of the invention]

As a method for recording and reproducing by time-division multiplexing luminance signals and color difference signals, for example,
58 Noj (March 1984) pp, 219-
225, the luminance signal is compressed in time by a factor of 4A in one horizontal period (hereinafter referred to as 1H), and the line-sequential color difference signal is also compressed in time by a factor of 115 in each 1H, and then, There is a known FM recording method in which time-division multiplexing is performed such that a time-axis compressed luminance signal and a time-axis compressed color difference signal are arranged alternately on the time axis.

To explain this video signal recording and reproducing method in more detail with reference to Figure 6, the luminance signal Y ((al) in the same figure is time-axis compressed by 415 times every 1H, and one color difference signal RY ((b) in the same figure) is )) are extracted every 1H and are each compressed by 115 times on the time axis, and the other color difference signals B- and Y ((C) in the same figure) are extracted every other 1H and compressed on the time axis by 115 times, respectively. As a result, the luminance signal has a no-signal period of 115H every 1H, so for each no-signal period, the time-axis compressed color difference signal ratio -Y and the time-axis compressed color difference signal B-Y are generated. Therefore, a time-division multiplexed signal of a luminance signal and a line-sequential color difference signal is obtained (see (d) in the figure), and this time-division multiplexed signal is FM-modulated and recorded.

One of the important problems with this video signal recording and reproducing method is that
During recording and reproduction, it is difficult to secure the frequency band of the luminance signal necessary to obtain sufficient horizontal resolution. That is, by compressing the time axis by 415 times during recording, the frequency band of the luminance signal becomes 574 times, but if this is recorded on, for example, a home VTR, this luminance signal will be equal to the luminance before time axis compression. The frequency band will be limited to the same frequency band as the signal. Therefore, at the time of playback, if this band-limited luminance signal is time-axis expanded by 5/4 times and restored to the original time length, the frequency band of the resulting luminance signal will be the same as before the time-axis compression during recording. is 415 times the frequency band of the luminance signal, and the horizontal resolution is reduced to 415 times. For example, a VTR that can secure a horizontal resolution of 240 lines when recording and reproducing luminance signals without time axis compression,
When the above time division multiplexed signal is recorded and reproduced, the resulting horizontal resolution is approximately 190 lines.

One method to solve this problem is to remove high-frequency components from the wideband luminance signal every 1H to obtain a narrowband luminance signal, compress the time axis of this narrowband luminance signal, and then create a no-signal signal obtained by compressing the narrowband luminance signal. A method has been proposed in which a time-axis compressed color difference signal is inserted into a period (Japanese Patent Publication No. 57-55353). This method secures horizontal resolution with high visual sensitivity at the expense of resolution in the diagonal direction.

However, in this method, the period of the horizontal synchronization signal is 1H, and in order to multiplex the color difference signals as described above, it is necessary to make the time axis compression ratio of the narrowband luminance signal sufficiently large. K has to limit the frequency band of this narrowband luminance signal to about 1/2 of that of the wideband luminance signal, and the resolution in the diagonal direction is significantly degraded.

Furthermore, although the above method relates to a video signal transmission method, when this method is applied to recording and reproducing video signals, a brightness signal obtained by time-compressing a wideband luminance signal and a narrowband signal that are not time-compressed. Emphasis/de-emphasis characteristics and clipping characteristics differ between the two, resulting in not only deterioration in diagonal directions but also contour blurring at edges.

[Purpose of the invention]

An object of the present invention is to provide a video signal recording and reproducing method that eliminates the drawbacks of the prior art described above, suppresses deterioration of resolution and blurring of contours at edges, and enables time-division multiplexing recording and reproducing of luminance signals and color signals. It is on offer.

[Summary of the invention]

In order to achieve this object, the present invention has a horizontal periodic signal of 2H period, and a luminance signal between one horizontal synchronization signal and the next horizontal synchronization signal, which has a luminance of about 4H without time axis compression.
It is characterized by being time-division multiplexed with luminance that has been time-axis compressed 15 times.

[Embodiments of the invention]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing a recording system of an embodiment of the video signal recording and reproducing method according to the present invention, in which 1 is a video signal generating device, and 2 is a switch circuit.

3.4 is an A/D converter (analog-digital converter),
5 is a synchronous separation circuit, 6 is a phase comparison circuit, 7 is 1/256
Frequency division! , 81tt 1/4 frequency divider, 9 Ha 115 minutes 1 til a 10 Ha VCO (voltage controlled token), 1
1 is a 174 frequency divider.

12 is a clock signal generation circuit, 13 is a control circuit, +4.15, 16.17 is a RAM (random access memory), and 1st is a synthesis circuit.

19 is a D/A converter (digital-analog converter), 2
0 is an LPF (low pass filter), 21 is a clamp circuit, 22 is an emphasis circuit, 23 is a clip circuit, 24
is an FM (frequency) modulator.

25 is a recording amplifier, 26 is a rotary transformer.

27 is a recording head, and 28 is a video tape.

Figure 2 is a waveform diagram showing the signals of each part of Figure 1H1.
．． Signals corresponding to the t'1 diagram are given the same symbols.

In FIGS. 1 and 2, two color difference signals R-Y and B-Y output from a video signal generating device 1 are supplied to a switch circuit 2, and are subjected to line-sequential difference signal LSK conversion. This line sequential color difference signal LS is digitized by the A/D converter 3,
A RAM 16.1711C for time axis compression is supplied. Furthermore, the luminance signal Y output from the video signal generator 1 is
After being digitized by the A/D converter 4, the RAM 14.1
5.

On the other hand, this luminance signal Y is also supplied to the sync separation circuit 5,
The synchronization signal is separated and supplied to the clock signal generation circuit 12 and the control circuit 12.

In the clock signal generation circuit 12, the phase comparison circuit 6
, 17256 frequency divider 7, 1/4 frequency divider 8, 115 frequency divider 9 and vCOlo constitute a PLL (phase locked circuit), and the horizontal synchronization signal from the synchronization separation circuit 5) (8
, the frequency from VCOlo is 512OfH (however, f
H is the frequency of the horizontal synchronizing signal) The signal of frequency fH obtained by dividing the output signal of ``115 frequency divider 9゜1/4 frequency divider 8 and 1/256 frequency divider 7 is output to the phase comparison circuit 6. The phase difference signal is compared with the VCO
The lo oscillation frequency is controlled.

The frequency is 25 from the 1/4 frequency divider 8 that constitutes this PLL.
6f clock signal (referred to as 256fH clock; the same applies hereinafter) is supplied from 175 frequency divider 9 as 1024fH clock, and furthermore, the output signal of V C010 is supplied to 1.
The /4 frequency divider 11 outputs 1280f [clocks, respectively, and these clock signals are supplied to the control circuit 13.

The control circuit 13 distributes these clock signals based on the synchronization signal from the synchronization separation circuit 5, and distributes these clock signals to the RAM1.
A clock signal for writing and reading 4.15 and 16.17 is formed. The clock signal CLK1 for the RAM 14 formed by the control circuit 15 includes a 1024fH clock for writing lasting 1H period and a 415fH clock for writing.
The 1280 fH clock for reading that lasts for H period is 1
H is arranged alternately, and 102 for this writing.
4 fH clock period and 128Of for next read
A blank period of 115H is provided between the period of the H clock. For this purpose, the RAM 14 writes and reads the luminance signal Y for 1H period every 1H, and the read luminance signal is time-compressed by 415 times (=1024fu/1280fH) as compared to the written luminance signal.
Moreover, it is delayed by (1+175)H.

The clock signal CLK2 for the RAM 15 formed by the control circuit 13 is used for writing.

For reading, both clocks are 128 of H, and each period is 415 H, and these writing clocks and reading clocks are a clock signal CLK.
It is shifted by 1H from each of 1. For this purpose, R.A.
MI 5 is the H period K during which the RAM 14 performs reading.
, horizontal synchronization signal) The luminance signal Y for the 415H period excluding JS is written, and the luminance signal Y for the next H period (i.e., horizontal synchronization signal) is written.
During the H period during which M14 performs writing, reading is performed with a delay of 115H from the start of this H period. For this reason, the output signal from the RAM 15 is a 1H luminance signal that is not time-base compressed.

In this case, the RAMs 14 and 15 start reading alternately every 1H, and 115H elapses from when one side finishes reading until the other starts reading. Therefore, when the output signals of R and AM14.15 are combined, there is a white period (no signal period) of K 115 H periods every 1H.

Further, since no horizontal synchronizing signal is written in the RAM 15, the output signal of the RAM 15 does not include the horizontal synchronizing signal. Therefore, the signal obtained by combining the output signals of RAM14.15 is time-axis compressed by 415 times,
Furthermore, a horizontal synchronization signal with a 2H period is included.

The clock signal CLK5 for the AM 16 formed in the control circuit 13 is 256fH for writing.
The clocks are 1280f□ clocks arranged alternately every 1H for reading.
The period of the 80fH clock is combined with the full white period of 1H that occurs when the output signals of the AM14.15 are combined. Therefore, the RAM 16 receives the a check signal CLK5.
As a result, the line sequential color signal L supplied from the A/D converter 3
For example, write the color difference signal B-Y every 1H out of 8, and multiply this by 115 times (■256fH/1280fa)
The time axis is compressed and read out.

The clock signal CLK4 for the RAM 17 formed by the control circuit 13 is exactly the same as the clock signal CLK3, but with respect to the read signal CLK3,
The write and write clocks are shifted by 1H. For this reason, the RAMI 7 to which this clock signal CLK4 is supplied writes the color difference signal hole -Y during the H period in which the FLAM 16 reads the color difference signal B-Y, and in the next H period, the RAMI 4, 15 A total of 11 blank periods occur every 1H when combining the output signals of
The color difference signal hole-Y whose time axis has been compressed five times is read out.

Note that rWriteJ in Figure 3 represents a write period, and rReadJ represents a read period.

The respective signals read from the R and AM 14 to 17 are supplied to a synthesis circuit 18 operated by a control signal AC from the control circuit 13 and synthesized in a time division manner, and the resulting synthesized signal is subjected to D/A conversion. A time division multiplexed signal TD is obtained by converting the signal into an analog signal.

In this time division multiplexed signal TD, as is clear from the above explanation, the horizontal synchronizing signal H8' has a period of 2H and is compressed on the time axis by 415 times, and this horizontal synchronizing signal H8' and the next horizontal synchronizing signal HS', one color difference signal (for example, color difference signal RY') compressed in time axis by 115 times.
, a luminance signal Yw that is not time-axis compressed, and the other color difference signal that has been time-axis compressed 115 times (for example, color difference signal B −
Y') are arranged in the order of the luminance signals YNQ that have been time-axis compressed by 415 times, and the period 1. and,
The period 1° from the beginning of the period of the luminance signal YN to the beginning of the next period of the luminance signal Yw is approximately equal to 1H.

Note that in the time division multiplexed signal TD, each color signal R-Y
A signal P representing the base level (zero level) of ', B-Y' is added. This signal P is applied, for example, in the synthesis circuit 18 or other suitable circuit at the timing indicated by 8 in FIG.
A digital value representing the final level generated just before the start of reading of M16°17, l(, AM14~17
is combined with the output signal of

The series from the LPF 20 to the video tape 28 is similar to the luminance signal recording system of a conventional video tape recorder.

That is, the time division multiplexed signal TD from the D/A converter 19
The LPF 20 removes clock components and aliasing components, and the clamp circuit 21 clamps the synchronizing signal so that the DC level is constant. Next, the time division multiplexed signal TD from the clamp circuit 21 is processed by the emphasis circuit 22, and after the overshoot caused by the emphasis is limited by the clip circuit 23, the FM modulator 24
Modulated. The FM-modulated time division multiplexed signal TD is further amplified by a recording amplifier 25, and then supplied to a recording head 27 via a rotary transformer 26, where it is recorded on a video tape 28.

By the way, during the vertical blanking period, RAM+4
．． When the write and read operations of No. 15 are performed as described above, the signal waveform during this vertical blanking period changes. On the other hand, during playback, the servo of the video tape recorder detects the vertical synchronization signal of the reproduced video signal, but if the waveform of the vertical synchronization signal is deformed, this cannot be detected. First, normal servo of the video tape recorder is not performed.This point will be explained in more detail using Figure 3.

Figure 3 (a) shows the waveform during the vertical blanking period of the CCIR method, as explained earlier.

During this vertical blanking period, RAM14 is 1024 fH.
Writing is performed using the clock, and reading is performed using the 1280 fH clock (Figure 3 (b)).
When writing with 024 fH and reading with 1280 fH clock (as shown in Figure 3 (cl) and Figure 3 (dHc), the duty ratio and level of the vertical synchronizing signal are inconsistent.
This differs from the original vertical synchronization signal shown in Figure (α).

Therefore, in the above embodiment, the control circuit 15 detects an equivalent pulse of V2 period from the synchronization signal supplied from the synchronization separation circuit 5 to form a vertical synchronization period pulse (Fig. 3(e)). Period, RAM 14.15
The writing clock and the reading clock supplied to
These AM14.15 time axis compression effects are stopped. As a result, the waveform of the vertical synchronization signal in the time division multiplexed signal TD obtained from the D/A converter 19 is
As shown in FIG. 3, the waveform is completely the same as the original waveform shown in FIG.

Therefore, during playback, the vertical synchronization signal can be detected from the time division multiplexed signal TD, and normal servo of the video tape recorder can be performed.

Figure 4 is a block diagram showing a reproduction system for the recording system in Figure 1, and 29 is a reproduction head.

30 is a rotary transformer, 31.32 is a reproduction amplifier,
33 is a switch circuit, 34 is a phase equalization measurement, 35 is an IJ
36 is an FM demodulator.

5yhiLpF, s8 is a tie-emphasis circuit.

39 is a synchronous separation circuit, and 40 is a control circuit.

41 is a phase comparison circuit, 42 is a 11512 frequency divider, 43 is a 1/4 frequency divider, 44 is a 175 frequency divider, 45 is a 174 frequency divider, 46 is a VCo, 47 is a clock signal generation circuit, 48
is a clamp circuit, 49 is an A/D converter, 50, 51.5
2.55 is 1 (AM, 54°55.56 is D/A converter, 57, 58.59 is LPF, 6o is matrix circuit,
61.62° and 65.64 are output terminals.

Figure 5 is a waveform diagram showing the signals of each part of Figure 4.
Signals corresponding to the figures are given the same symbols.

In Figures 4 and 5, intermittent reproduction signals from two reproduction heads 29 that alternately scan the magnetic tape 28 are transmitted to a reproduction amplifier 3 via rotary transformers 30, respectively.
After being amplified by 1.52, it becomes a continuous signal in the switch circuit 33. This continuous signal is an FM modulated time division multiplexed signal. This is the phase equalization amount of 34. After being processed by the limiter circuit 35, it is demodulated by the FM demodulator 36, unnecessary components are removed by the LPF 57, and de-emphasized by the de-emphasis circuit 38, resulting in a time-division multiplexed signal with the same waveform as that at the time of recording (Figure 2). TD is obtained. After this time division multiplexed signal TD is clamped by the clamp circuit 48, the A/D 7#
: The data is digitized by the converter 49 and supplied to the RAMs 50 to 53.

On the other hand, the time division multiplexed signal TD from the de-emphasis circuit 38 is supplied to the synchronization separation circuit 39 to separate the synchronization signal, and the control circuit 40 and clock signal generation circuit 49
supplied to

The clock signal generation circuit 47 has an equivalent configuration and operates in the same way as the clock signal generation circuit 12 shown in FIG. Since the period of the horizontal synchronizing signal supplied to 41 is 2H, a 11512 frequency divider 42 is used in place of the 1/256 frequency divider 7 shown in FIG. 256 from the 174 frequency divider 43 of the clock signal generation circuit 47
The fH clock is +024 from the 115 divider 44.
The fH clock is also 12 from the 174 frequency divider 45.
80 fH clocks are obtained and these clocks are supplied to the control circuit 40.

Here, in order for the clock signal generation circuit 47 to always operate normally, the phase continuity of the horizontal synchronization signal supplied to the phase comparison circuit 41 must be maintained. As shown, 1 hour side load signal T
The horizontal synchronizing signal H8'' included in D is set to a 2H period, and the vertical blanking period is also set to 2H period.
As shown in FIG. 1, there is an equalization pulse of 2H period which is consistent with the CCIR method and includes an equalization pulse of exactly 2 periods and whose phase is continuous with the horizontal synchronizing signal. As a result, the clock signal generator 47 generates a 2H periodic signal H.
The 256fH clock, 1024fH clock, and 1280fH clock are synchronized with the horizontal synchronization signal of the husband A2H cycle.

The control circuit 40 uses the horizontal synchronization signal among the synchronization signals supplied from the synchronization separation circuit 39 as the time main selection, and
fH clock, 1024f, clock and 12aof
H clock is distributed to generate clock signals CLK1', C
Forms LK2°, CLK5', and CLK4°. Clock signal CLK1' is sent to RAL50, clock signal CL,
2° to FLAM51, clock signal CLK5° to R
AM52, and the clock signal CLK4° is also sent to RAM5.
3 and cause them to perform write and read operations.

The clock signal CLKI° consists of a 128OfH clock for writing and a 1024fH clock for reading, and this clock signal CLK1° causes the RAM 50 to control the time axis pressure of the time division multiplexed signal TD from the A/D converter 49. Write W1 faded luminance signal YN, 1H delay from writing start, 574 times (-128OfH/10
24fH) and reads out 1. Therefore, from this RAM 50, intermittent luminance signals are obtained every 1H on the original time axis.

Further, the clock signal CLK 1° is set between the 128ofH clock period for writing and the 1024fH clock period for reading out the time-axis compressed luminance signal YN written in this period after time-axis expansion. , a 1024fH clock for reading is arranged (
In the figure, this clock is shown as b and other clocks (
The horizontal synchronizing signal HS' of the signals written from the RAM 50 during the 1280fH clock period is 5/4 due to this 1024fl (clock). The time axis is expanded and read out. Therefore, RAM5
(At a distance of 1 m, when writing of the time-axis compressed luminance signal YN is completed, the horizontal synchronization signal H8' is changed to 5/4
The time axis is expanded by a factor of 5 and read out, and then the entire written luminance signal YN is expanded by a factor of 5/4 in the time axis and read out. From this, in Figure 1, every other horizontal synchronization signal lost due to writing and reading of FLAL15 by clock signal CLK2 is restored, and R
The signal read from AM50 includes a horizontal synchronization signal H8 of 1H period.

The clock signal CLK2° is the same 1280fH clock for writing and reading, and this clock signal CLK2° causes the RAM 51 to output the time division multiplexed signal TD.
Writing of the luminance signal Yw that is not time-axis compressed,
Perform reading. In this case, the RAM 51 does not extend the time axis, but delays the single K and luminance signals Yw by 1H.
The timing of ho is aligned with the luminance signal to be read.

The signals read from the RAM 50.51 are synthesized to form a continuous luminance signal, which is converted into an analog signal by the D/A converter 54. After that, the clock component and aliasing component are removed by the LPF 57, and horizontal synchronization of 1H period is performed. A continuous luminance signal Y containing the signal is supplied to the matritas circuit 60.

Sarani, control circuit 47 is control circuit 12
(Fig. 1), the clock signal CLK1° becomes the 1280 fH clock, which is the same as the write clock, during the period in which the equivalent pulse is included in the vertical blanking period.
The vertical blanking period of the luminance signal Y has a waveform suitable for the CCIR method.

The clock signal CLKs° consists of a 128°fH clock for writing and a 256°fH clock for reading, and in response to the a clock signal CLK3', R, AM52 outputs one color difference signal R- of the time division multiplexed signal TD. Write Y' and then immediately multiply it by 5 (fog 12 B 0
fH/256fi) The first reading is performed by extending the time axis by K, and then the second reading is performed 1H later than the start time of the first reading. In other words, 几AM
52 expands the time axis of the time-axis compressed color difference signal RY' twice each time it is written and reads it out, thereby forming a digital signal of the color difference signal RY that is continuous on the original time axis.

Clock signal CLK4° is also similar to clock signal CLK5', but the clock timing for writing and reading is different from this, and this clock signal CL
K4' causes the RAM5'3 to receive the time division multiplexed signal TD.
Regarding the other color difference signal B-Y', RAM5
The operation is similar to 2. As a result, the RAM 55 obtains the original continuous color difference signal B-Y digital signal on the time axis.

The digital signals from the RAMs 52 and 53 are converted by D/A converters 55 and 56 into analog color difference signals Y and B-Y (at this time, no signals are supplied to the D/A converters 55 and 56). During the no-signal period S°, the D/A converter is 55.56
Let the output level of □ be the color difference zero level, and the color difference signals RY,
The level of B-Y is based on the digital value of the reference P included in the time-division multiplexed signal TDK and the digitized color decoding code Y', B.
-Y' digital value), LPF5
After the clock component and aliasing component are removed in steps 8 and 59,
(ma) is supplied to the IJ bus circuit 60.

The matrix circuit 60 processes the supplied luminance signal Y and color difference signals R-Y and B-Y, outputs an output terminal dIK luminance signal Y, and outputs a red signal and a red signal to output terminals 62.65 and 64, respectively.
A green signal G and a blue signal B are output.

As mentioned above, in the reproduction system, the control circuit 40
25 based on the horizontal synchronization signal from the synchronization separation circuit 39.
6 fH clock, 1024f ■ clock, 1280
distributes the clock signals CLK1', CL
K2', CLK5'.

CLK4° can be formatted as CLK4°, which, as explained in FIG. The interval t1 between the start time of the time-axis compressed luminance signal YN and the start time of the time-axis uncompressed luminance signal Yw.
are both 1H, and the horizontal synchronization signal H8K with a 2H period
Luminance signals Yw, YN and color difference signals R-Y', B-Y
This is because the temporal position of ' is fixed.

Furthermore, since the synchronization signal from the synchronization separation circuit 39 includes an equalization pulse based on the CCIR method in the vertical blanking period, a 2H period horizontal synchronization signal can be obtained in this period, and the vertical plan Each clock signal C in the young period
The timings of the write clock and the read a clock of LK1° to CLK4° will not be out of order.

Furthermore, since the horizontal synchronization signals every 1H that are lost in the recording system are restored by reading the horizontal synchronization signal HS' twice in the RAM 50, the 2H period horizontal synchronization signal HS' is used as the 1H period horizontal synchronization signal. No new means (for example, an AFC circuit) for restoring the signal H8 is required.

An embodiment of the present invention has been described above. According to this, in a time division multiplexed signal, a wideband luminance signal that is not time-base compressed and a luminance signal obtained by time-base compressing this wideband luminance signal are line-sequentially Because of this, it is possible to ensure horizontal resolution with high visual sensitivity. In this case, the resolution in the diagonal direction, where visual sensitivity is low, deteriorates slightly, but because the time axis compression ratio of the luminance signal is set to about 475, the deterioration in the resolution in the diagonal direction is very small, and there is no visual problem at all. do not have.

In addition, since the time-axis compressed luminance signal contains higher-frequency components than the time-axis compressed luminance signal, V
Emphasis/de-emphasis characteristics and clipping characteristics in TRK are different between the two, and in general, during playback, the time-axis compressed luminance signal portion has duller rise and fall characteristics than the non-time-axis compressed luminance signal portion. , contour blurring visually occurs at the edge portion, but in this case as well, in the above embodiment, since the time axis compression ratio of the luminance signal is set to about 415, the contour blurring at this edge portion is visually noticeable. This can be suppressed to a level that does not pose a problem.

Furthermore, since the horizontal synchronization signal is also time-axis compressed with the same time-axis compression rate as the luminance signal and has a 2H period,
The blank period in the luminance signal has increased, and it has become easier to time-division multiplex the chrominance signal, for example, line-sequentially and by compressing the time axis by about 1A.

Furthermore, as explained in FIG. 2, the interval 1. between the start point of the period of the luminance signal Yw without time axis compression and the start point of the period of the luminance signal YN whose time axis is compressed 415 times. By setting the interval t between the start point of the period of the luminance signal YN and the start point of the period of the luminance signal Yw to be KIH, as described above, the period required for the horizontal synchronization signal to be 2H is obtained. Time division multiplexing becomes easy.

It goes without saying that the present invention is not determined by the lock frequency or the type of recording/reproducing device as described above.

〔Effect of the invention〕

As explained above, according to the present invention, it is possible to time-division multiplex the luminance signal and the color signal with sufficient margin, and
It is possible to avoid low frequency band stoppage of the luminance signal, prevent waveform rounding, suppress resolution deterioration in horizontal and diagonal directions, and suppress outline blurring, thereby improving the image quality of reproduced images. You can get excellent effects such as:

[Brief explanation of the drawing]

1 to 5 show an embodiment of a video signal recording and reproducing apparatus according to the present invention.1. Figure t'1 is a block diagram showing the recording system, Figure 22 is a waveform diagram showing the signals of each part in Figure 1-1, and Figure 1'F5 is the operation of the time axis compression means in Figure 1 during the vertical blanking period. Figure 4 is a block diagram showing the reproduction system. Figure 2 is a waveform diagram showing the signals of each part of Figure 4. Figure 1 is a timing chart showing an example of a conventional video signal recording and reproducing device. be. Y... Luminance signal, LS... Line sequential color difference signal, ) (8
'...Horizontal synchronization signal with a 2H period compressed on the time axis. Yw -- Luminance signal without time axis compression, YN... Luminance signal with time axis compression, R, -Y', B-Y'.
...Time axis compressed color difference signal. ＋NCO+ω! Y and f O )−J J ” J ” ←Q
(Ri Q

Claims (1)

[Claims] In a recording and reproducing method for a video signal consisting of at least a luminance signal and first and second color difference signals, the horizontal synchronization signal is
The time axis is compressed by a factor of /5 to give a period of 2H (however, 1H is one horizontal period), and between this horizontal synchronization signal and the next horizontal synchronization signal, the time axis is compressed by about 1/5 times. The first color difference signal, the luminance signal that is not time-axis compressed, the second color difference signal that is time-axis compressed to about 1/5, and the luminance signal that is time-axis compressed to about 4/5, are arranged in this order, The luminance signal and the luminance signal are arranged such that the time interval between the start time of the luminance signal that is not time-axis compressed and the start time of the next luminance signal that is time-axis compressed by about 4/5 times is approximately 1H. 1. A video signal recording and reproducing method characterized in that recording and reproducing are performed by time-division multiplexing a second color difference signal.