JPH0573115B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a recording and reproducing system for a video signal consisting of at least a luminance signal and two color difference signals.
In particular, the luminance signal and color difference signal are compressed on the time axis,
The present invention relates to a method suitable for time-division multiplexing recording and reproducing so as not to overlap each other on the time axis.

[Background of the invention]

As a method for recording and reproducing by time-division multiplexing a luminance signal and a color difference signal, for example, there is a method described in Journal of the Television Society, Vol. 38 No. 3 (March 1984) pp. 219-225, the time axis of the luminance signal is compressed by 4/5 times in one horizontal period (hereinafter referred to as 1H), and
The line-sequential color difference signal is also time-axis compressed by 1/5 times every 1H.
Thereafter, a method is known in which FM recording is performed by time division multiplexing such that time-axis compressed luminance signals and time-axis compressed color difference signals are arranged alternately on the time axis.

Such a video signal recording and reproducing method is shown in FIG.
To explain in more detail, the luminance signal Y (a in the same figure)
is time axis compressed by 4/5 times every 1H, and one color difference signal RY (b in the same figure) is extracted every 1H and compressed by 1/5 times.
The time axis is compressed by a factor of 5, and the other color difference signals B-Y (c in the figure) are extracted every other 1H and are compressed by a factor of 1/5 in the time axis. As a result, the luminance signal has 1H
Since there is a no-signal period of 1/5H every time, the time-axis compressed color difference signal R-Y is generated for each no-signal period.
and the time-axis compressed color difference signal B-Y are inserted alternately. Therefore, a time-division multiplexed signal of the luminance signal and the line-sequential color difference signal is obtained (d in the same figure),
This time division multiplexed signal is FM modulated and recorded.

One of the important problems with such video signal recording and reproducing systems is that it is difficult to secure the frequency band of the luminance signal necessary to obtain sufficient horizontal resolution during recording and reproducing. That is, when recording,
By compressing the time axis by 4/5 times, the frequency band of the luminance signal becomes 5/4 times, but if this is recorded on a home VTR, for example, this luminance signal will be at the same level as the luminance signal before time axis compression. Bandwidth is limited to the frequency band of . Therefore, during playback, if this band-limited luminance signal is time-axis expanded by 5/4 times and restored to its original time length, the frequency band of the resulting luminance signal will be the same as before the time-axis compression during recording. is 4/5 times the frequency band of the luminance signal, and the horizontal resolution is reduced to 4/5 times. For example, when recording and reproducing a luminance signal without time axis compression, the horizontal resolution
If the above time-division multiplexed signal is recorded and played back on a VTR that can secure 240 lines, the horizontal resolution obtained will be approximately 190 lines.

One method to solve this problem is to remove high-frequency components from the wideband luminance signal every 1H to obtain a narrowband luminance signal, compress the time axis of this narrowband luminance signal, and use the resulting A method has been proposed in which a time-axis compressed color difference signal is inserted into a signal period (Japanese Patent Publication No. 55353/1983). This method secures horizontal resolution with high visual sensitivity at the expense of resolution in the diagonal direction.

However, this method does not change the period of the horizontal synchronization signal.
1H, and in order to multiplex the color difference signals as described above, it is necessary to make the time axis compression ratio of the narrowband luminance signal sufficiently large. It has no choice but to be limited to about 1/2 of the wideband luminance signal,
Deterioration of resolution in diagonal directions becomes noticeable. Furthermore, although the above method is related to a video signal transmission method, when this method is applied to recording and reproducing video signals,
Emphasis/de-emphasis characteristics and clipping characteristics are different between a wideband luminance signal that is not time-axis compressed and a luminance signal that is obtained by time-axis compression of a narrowband signal, resulting in not only deterioration in diagonal directions but also edge blurring. arise.

[Purpose of the invention]

The purpose of the present invention is to eliminate the drawbacks of the above-mentioned prior art,
An object of the present invention is to provide a video signal recording and reproducing method that enables time-division multiplex recording and reproducing of luminance signals and color signals while suppressing resolution deterioration and contour blurring at edge portions.

[Summary of the invention]

In order to achieve this object, the present invention has a horizontal periodic signal of 2H period, and a luminance signal between one horizontal synchronization signal and the next horizontal synchronization signal, which is approximately 4/5 times the luminance without time axis compression. and time-axis compressed luminance are time-division multiplexed.

[Embodiments of the invention]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing a recording system of an embodiment of the video signal recording and reproducing method according to the present invention.
1 is a video signal generator, 2 is a switch circuit, 3,
4 is an A/D converter (analog-digital converter),
5 is a synchronous separation circuit, 6 is a phase comparison circuit, 7 is 1/25
6 frequency divider, 8 is 1/4 frequency divider, 9 is 1/5 frequency divider, 10
is a VCO (voltage controlled oscillator), 11 is a 1/4 frequency divider,
12 is a clock signal generation circuit, 13 is a control circuit, 14, 15, 16, 17 are RAMs (random access memories), 18 is a synthesis circuit, 19 is a D/A converter (digital-to-analog converter), 2
0 is an LPF (low pass filter), 21 is a clamp circuit, 22 is an emphasis circuit, 23 is a clip circuit, 24 is an FM (frequency) modulator, 25 is a recording amplifier, 26 is a rotary transformer, 27 is a recording head, 28 is a videotape.

FIG. 2 is a waveform diagram showing signals at various parts in FIG. 1, and signals corresponding to those in FIG. 1 are given the same symbols.

In FIGS. 1 and 2, two color difference signals RY and B-Y output from a video signal generator 1 are supplied to a switch circuit 2 and converted into a line-sequential difference signal LS. This line-sequential color difference signal LS is digitized by the A/D converter 3, and is stored in a RAM for time axis compression.
16 and 17. Furthermore, the luminance signal Y output from the video signal generator 1 is digitized by the A/D converter 4 and then supplied to the RAMs 14 and 15.

On the other hand, this luminance signal Y is also supplied to the synchronization separation circuit 5, and the synchronization signal is separated and supplied to the clock signal generation circuit 12 and the control circuit 12.

In the clock signal generation circuit 12, a PLL (phase locked circuit) is configured by a phase comparison circuit 6, a 1/256 frequency divider 7, a 1/4 frequency divider 8, a 1/5 frequency divider 9, and a VCO 10. , the horizontal synchronization signal HS from the synchronization separation circuit 5 and the output signal from the VCO 10 with a frequency of 5120 _H (however, _H is the frequency of the horizontal synchronization signal) are 1/
The phase comparison circuit 6 compares the phases of the signals with the frequency _H obtained by frequency division by the 5 frequency divider 9, the 1/4 frequency divider 8, and the 1/256 frequency divider 7, and obtains a phase difference signal between them. The oscillation frequency of the VCO 10 is controlled by.
The frequency is output from the 1/4 frequency divider 8 that makes up this PLL.
A _256H clock signal (hereinafter referred to as _256H clock) is supplied, a _1024H clock is supplied from the 1/5 frequency divider 9, and a 1280H clock signal is supplied from the 1/4 frequency divider 11, which is supplied with the output signal of the VCO 10. _H clocks are output, and these clock signals are supplied to the control circuit 13.

The control circuit 13 distributes these clock signals based on the synchronization signal from the synchronization separation circuit 5, and forms clock signals for writing and reading RAMs 14, 15, 16, and 17.
The clock signal CLK1 for the RAM 14 formed by the control circuit 13 is composed of a _1024H clock for writing that lasts for 1H period and a 1280H clock for reading that lasts for 4/5H period, which are arranged alternately every 1H. A blank period of 1/5H is provided between the 1024H clock period and the next _1280H clock period for reading. For this,
The RAM 14 writes and reads the luminance signal Y for 1H period every 1H, and the read luminance signal is time-compressed by 4/5 times (= _1024H / _1280H ) as compared to the written luminance signal. Moreover,
It is delayed by (1+1/5)H.

RAM 15 formed by control circuit 13
The clock signal CLK2 for writing and reading is both a _1280H clock and the period of each is 4/5H, and the writing clock and reading clock are the same clock signal.
They are shifted by 1H from each of CLK1. For this reason, the RAM 15 uses 4/5H, excluding the horizontal synchronization signal HS, during the H period when the RAM 14 performs reading.
The luminance signal Y of the period is written, and the next H period (that is, the H period in which the RAM 14 writes) is performed.
period), reading is performed with a delay of 1/5H from the start point of this H period. For this, RAM
The output signal from 15 is a luminance signal that is not time-base compressed every 1H.

In this case, the RAMs 14 and 15 start reading alternately every 1H, and moreover, from the time one finishes reading until the other starts reading, the time is 1/1.
Only 5 have passed. Therefore, RAM14,15
When the output signals of are combined, there is a blank period (no signal period) of 1/5H period every 1H. Also, RAM15
Since the horizontal synchronization signal is not written to the RAM
The output signal No. 15 does not include a horizontal synchronization signal. Therefore, the signal obtained by combining the output signals of the RAMs 14 and 15 is compressed in time by a factor of 4/5 and includes a horizontal synchronization signal with a 2H period.

RAM 16 formed by control circuit 13
The clock signal CLK3 is a _256H clock for writing and a _1280H clock for reading.
The clocks are arranged alternately every 1H, and the period of this _1280H clock for reading is
1H generated when combining 4 and 15 output signals
Match the blank period. Therefore, RAM16
is the line sequential color signal LS supplied from the A/D converter 3 by this clock signal CLK3.
For example, a color difference signal B-Y is written every 1H, and the time axis is compressed to 1/5 (= _256H / _1280H ) and read out.

RAM 17 formed by control circuit 13
The clock signal CLK4 for
It is exactly the same as CLK3, except that the write and write clocks are shifted by 1H with respect to clock signal CLK3. For this reason, the RAM 17 to which this clock signal CLK4 is supplied is
During the H period in which the RAM 16 reads the color difference signal B-Y, it writes the color difference signal R-Y, and in the next H period, the blank period occurs every 1H when the output signals of the RAMs 14 and 15 are combined. /Five
The color difference signal RY whose time axis has been compressed twice is read out.

Note that "Write" in FIG. 3 represents a write period, and "Read" represents a read period.

The respective signals read from the RAMs 14 to 17 are supplied to a synthesis circuit 18 operated by a control signal A _c from the control circuit 13 and synthesized in a time-division manner, and the resulting synthesized signal is sent to the D/A A converter converts it into an analog signal to obtain a time division multiplexed signal TD.

In this time division multiplexed signal TD, as is clear from the above explanation, the horizontal synchronization signal HS′ has a period.
The time axis is compressed by 4/5 times in 2H, and there is a 1/5 time difference between this horizontal synchronizing signal HS' and the next horizontal synchronizing signal HS'.
One color difference signal (for example, color difference signal RY') which has been time-axis compressed by 5 times, the luminance signal Y _W which is not time-axis compressed, and the other color difference signal which has been time-axis compressed by 1/5 times (for example, color difference signal The signals B-Y') are arranged in the order of the luminance signals Y _N compressed in the time axis by 4/5 times, and from the beginning of the period of the luminance signal Y _W to the beginning of the period of the next luminance signal Y _N. Both the period t ₁ and the period t ₂ from the beginning of the period of the luminance signal Y _N to the beginning of the period of the next luminance signal Y _W are approximately equal to 1H.

In the time division multiplexed signal TD, a signal P representing the reference level (zero level) of each color signal R-Y', B-Y' is added immediately before each color signal R-Y', B-Y'. This signal P is applied, for example, in the synthesis circuit 18 or other suitable circuit at the timing indicated by S in FIG.
It is a digital value representing a reference level generated immediately before the start of reading of the data, and is combined with the output signals of the RAMs 14 to 17.

The sequence from the LPF 20 to the video tape 28 is similar to the luminance signal recording system of a conventional video tape recorder. That is, the time division multiplexed signal TD from the D/A converter 19 has clock components and aliasing components removed by the LPF 20, and is clamped by the clamp circuit 21 so that the DC level of the synchronizing signal is constant. Next, the time division multiplexed signal TD from the clamp circuit 21 is processed by the emphasis circuit 22, and after the overshoot caused by the emphasis is limited by the clip circuit 23, it is FM modulated by the FM modulator 24. The FM modulated time division multiplexed signal TD is further amplified by a recording amplifier 25, and then supplied to a recording head 27 via a rotary transformer 26, where it is recorded on a video tape 28.

By the way, during the vertical blanking period,
When the write and read operations of the RAMs 14 and 15 are performed as described above, the signal waveform during this vertical blanking period changes. On the other hand, during playback, the servo of the video tape recorder detects the vertical synchronization signal of the reproduced video signal, but if the waveform of the vertical synchronization signal is deformed, it may be difficult to detect this. Therefore, normal servo of the video tape recorder will not be performed. This point will be explained in more detail using FIG. 3.

FIG. 3a shows the waveform during the vertical blanking period of the CCIR method. As explained earlier, during this vertical blanking period, the RAM 14 writes with a 1024 _H clock and reads with a 1280 _H clock (see FIG. 3). b) Similarly, when the RAM 15 is written with _1024H clock and read with _1280H clock (Figure 3c), the duty ratio and level of the vertical synchronization signal are as shown in Figure 3a, as shown in Figure 3d. It will be different from the original vertical synchronization signal shown in .

Therefore, in the above embodiment, the control circuit 1
3, an equivalent pulse of H/2 period is detected from the synchronization signal supplied from the synchronization separation circuit 5 to form a vertical synchronization period pulse (Fig. 3e), which is supplied to the RAMs 14 and 15 during this pulse period. The clock for writing and the clock for reading are made the same (FIG. 3f, g), and the time axis compression effect of these RAMs 14 and 15 is stopped. As a result, D/A
The waveform of the vertical synchronizing signal in the time division multiplexed signal TD obtained from the converter 19, as shown in FIG. 3h, is exactly the same as the original waveform shown in FIG. 3a. The same applies to the waveforms of periods including equalization pulses outside the vertical synchronization signal period.

For this reason, during playback, time division multiplexed signals
The vertical synchronization signal can be detected from the TD and the normal servo of the video tape recorder can be executed.

FIG. 4 is a block diagram showing a reproduction system for the recording system of FIG. 1, in which 29 is a reproduction head, 30
is a rotary transformer, 31 and 32 are regenerative amplifiers, 33 is a switch circuit, 34 is a phase equalizer, 3
5 is a limiter circuit, 36 is an FM demodulator, and 37 is a limiter circuit.
LPF, 38 is a reinforcement circuit, 39 is a synchronous separation circuit, 40 is a control circuit, 41 is a phase comparison circuit, 42 is a 1/512 frequency divider, 43 is a 1/4 frequency divider, 44 is a 1/5 frequency divider , 45 is a 1/4 frequency divider, 46 is
VCO, 47 is a clock signal generation circuit, 48 is a clamp circuit, 49 is an A/D converter, 50, 51,
52, 53 are RAM, 54, 55, 56 are D/A
The converter includes LPFs 57, 58, and 59, a matrix circuit 60, and output terminals 61, 62, 63, and 64.

FIG. 5 is a waveform diagram showing signals at various parts in FIG. 4, and signals corresponding to those in FIG. 4 are given the same reference numerals.

In FIGS. 4 and 5, the magnetic tape 28
The intermittent reproduction signals from the two reproduction heads 29 which alternately scan the
After being amplified by reproduction amplifiers 31 and 32,
The switch circuit 33 generates a continuous signal. This continuous signal is an FM modulated time division multiplexed signal. This is processed by a phase equalizer 34 and a limiter circuit 35, then demodulated by an FM demodulator 36, unnecessary components are removed by an LPF 37, and de-emphasized by a de-emphasis circuit 38, resulting in the same waveform as when recording (Fig. 2). A time division multiplexed signal TD is obtained. This time division multiplexed signal TD is clamped by a clamp circuit 48 and then digitized by an A/D converter 49.
It is supplied to RAM50-53.

On the other hand, the time division multiplexed signal TD from the de-emphasis circuit 38 is supplied to a synchronization separation circuit 39, where the synchronization signal is separated and supplied to the control circuit 40 and the clock signal generation circuit 49.

The clock signal generation circuit 47 has a configuration equivalent to the clock signal generation circuit 12 shown in FIG.
Since they operate in the same way, their explanation will be omitted.
Since the period of the horizontal synchronizing signal supplied to 1 is 2H, 1/5 is used instead of 1/256 frequency divider 7 in Fig. 1.
A 12 frequency divider 42 is used. A _256H clock is output from the 1/4 frequency divider 43 of the clock signal generation circuit 47.
The 1024 _H clock is output from the 1/5 frequency divider 44, and
1280 _H clocks are obtained from the 1/4 frequency divider 45, and these clocks are supplied to the control circuit 40.

Here, in order for the clock signal generation circuit 47 to always operate normally, the phase continuity of the horizontal synchronization signal supplied to the phase comparison circuit 41 must be maintained. Regarding this, as explained earlier, the horizontal synchronizing signal HS' included in the time division multiplexed signal TD is set to a 2H period, and the vertical blanking period is also set as shown in Fig. 3h. ,
Compatible with the CCIR method and accurately H/
The horizontal synchronization signal contains equalization pulses of 2 periods and has a continuous phase of 2H period equalization pulses.
As a result, the clock signal generator 47 always operates stably in synchronization with the 2H periodic signal HS', and the _256H clock, _1024H clock, and _1280H clock are
Synchronized with 2H period horizontal synchronization signal.

The control circuit 40 uses the horizontal synchronization signal among the synchronization signals supplied from the synchronization separation circuit 39 as a time reference, and uses the 256 _H clock, 1024 _H clock, and
Distributes the _1280H clock and generates the clock signal CLK
1', CLK2', CLK3', and CLK4' are formed.
The clock signal CLK1' is sent to RAL50, the clock signal CLK2' is sent to RAL51, and the clock signal CLK
3' is the RAM 52, and the clock signal CLK
4' are respectively supplied to the RAM 53 to cause them to perform write and read operations.

The clock signal CLK1' consists of a _1280H clock for writing and a _1024H clock for reading.
0 is the time division multiplexed signal TD from the A/D converter 49
Of these, time-axis compressed luminance signal Y _N is written, delayed by 1H from the start of writing, and multiplied by 5/4 (=
_1280H / _1024H ) and read out. Therefore, from this RAM50, on the original time axis
Intermittent luminance signals are obtained every 1H.

Furthermore, the clock signal CLK1' is between the 1280 _H clock period for writing and the 1024 _H clock period for reading out the time-axis compressed luminance signal _YN written in this period by time-axis expansion. A _1024H clock for reading is arranged in the 1024H clock (in Fig. 5, this clock is shown as b and is shown separately from the other clocks (indicated as a).
This 1024 _H clock allows RAM50 to 1280 _H
Among the signals written during the clock period, the horizontal synchronizing signal HS' is time-axis expanded by 5/4 times and read out. Therefore, in the RAM 50, when writing of the time-axis compressed luminance signal _YN is completed,
First, the horizontal synchronizing signal HS' is time-axis expanded by 5/4 times and read out, and then the entire written luminance signal _YN is time-axis expanded by 5/4 times and read out. As a result, in FIG. 1, every other horizontal synchronization signal that was lost due to writing and reading of the RAL 15 by the clock signal CLK2 is restored, and the signals read from the RAM 50 include the following:
Contains a 1H period horizontal synchronization signal HS.

The clock signal CLK2' is the same _1280H clock for both writing and reading, and this clock signal CLK2' causes the RAM 51 to output the luminance signal, which is not time-base compressed, of the time division multiplexed signal TD.
Write and read _YW . in this case,
The RAM 51 does not extend the time axis, but merely delays the luminance signal _YW by 1H to match the timing with the luminance signal read out from the RAM 50.

The signals read out from the RAMs 50 and 51 are combined to form a continuous luminance signal, which is converted into an analog signal by the D/A converter 54. After that, the LPF 57 removes clock components and aliasing components, and horizontally synchronizes the signal with a 1H period. A continuous luminance signal Y containing the signal is supplied to the matritas circuit 60.

Furthermore, since the control circuit 47 performs the same operation as the control circuit 12 (FIG. 1), the clock signal CLK1' is the clock for reading and the clock for writing during the period in which the equivalent pulse is included in the vertical blanking period. The _vertical blanking period of the luminance signal Y has a waveform suitable for the CCIR system.

Clock signal CLK3' consists of a _1280H clock for writing and a _256H clock for reading.
This clock signal CLK3' causes the RAM 52 to output one color difference signal R- of the time division multiplexed signal TD.
Write Y′ and then immediately multiply it by 5 (=
The time axis is expanded to 1280 _H /256 _H ), and the first reading is performed, and then the second reading is performed 1H later than the start time of the first reading.
That is, the RAM 52 expands the time axis twice and reads out the time axis compressed color difference signal RY' every time it is written, thereby forming a digital signal of the original continuous color difference signal RY on the time axis.

Clock signal CLK4' is also clock signal CLK.
3', but the clock timing for writing and reading is different from this, and this clock signal CLK4' causes the RAM 53 to output the other color difference signal B- of the time division multiplexed signal TD.
Regarding Y', the operation is similar to that of the RAM 52. As a result, the RAM 53 obtains the original continuous color difference signal B-Y digital signal on the time axis.

The digital signals from the RAMs 52 and 53 are converted into analog color difference signals R by D/A converters 55 and 56, respectively.
-Y, B-Y (at this time, there is a no-signal period in which no signal is supplied to the D/A converters 55, 56).
At S', the output levels of the D/A converters 55 and 56 are set to zero color difference level, and the levels of the color difference signals R-Y and B-Y are digitized with the digital value of the reference P included in the time division multiplexed signal TD. The color signal RY', B
−Y′ corresponding to the difference from the digital value), LPF
After the clock components and aliasing components are removed in steps 58 and 59, the signal is supplied to the matrix circuit 60.

The matrix circuit 60 processes the supplied luminance signal Y and color difference signals R-Y, B-Y, and outputs the output terminal 61.
outputs the luminance signal Y to the output terminals 62, 63, 6.
4, a red signal R, a green signal G, and a blue signal B are output, respectively.

As described above, in the reproduction system, the control circuit 40 controls the 256 _H clock, 1024 _H clock,
Distributes the 1280 _H clock and outputs the clock signal CLK.
1', CLK2', CLK3', CLK4' can be formatted as 1', CLK2', CLK3', and CLK4', but as explained in _FIG. The interval t ₁ between the start point of the period of the time-domain compressed luminance signal Y _N and the start point of the period of the time-domain compressed luminance signal Y _N and the start point of the period of the non-time-domain compressed luminance signal Y _W This is because the interval t ₂ of both is 1H, and the temporal positions of the luminance signals Y _W , Y _N and the color difference signals R-Y', B-Y' with respect to the horizontal synchronizing signal HS of 2H period are determined. It is something.

In addition, since the synchronization signal from the synchronization separation circuit 39 includes an equalization pulse that is compatible with the CCIR method in the vertical blanking period, a 2H period horizontal synchronization signal can be obtained in this period, and the vertical blanking The timing of the writing clock and reading clock of each of the clock signals CLK1' to CLK4' does not go out of order during this period.

Furthermore, the horizontal synchronization signal lost in the recording system every 1H is replaced by the horizontal synchronization signal in the RAM 50.
Since it is restored by reading HS′ twice,
A new means (for example,
AFC circuit) is not required.

An embodiment of the present invention has been described above. According to this, in a time division multiplexed signal, a wideband luminance signal that is not time-base compressed and a luminance signal obtained by time-base compressing this wideband luminance signal are line-sequentially Because of this, it is possible to ensure horizontal resolution with high visual sensitivity. In this case, the resolution in the diagonal direction, where visual sensitivity is low, deteriorates slightly, but because the time axis compression ratio is set to about 4/5 for the luminance signal, the deterioration in resolution in the diagonal direction is very small, and it is visually completely No problem.

In addition, since a time-axis compressed luminance signal contains higher-frequency components than a time-axis-compressed luminance signal, the emphasis/de-emphasis characteristics and clipping characteristics in a VTR are different between the two, and generally during playback, The time-axis compressed luminance signal portion has dull rising and falling characteristics compared to the non-time-axis compressed luminance signal portion, resulting in visually blurred edges, but in this case as well, in the above embodiment, By setting the time axis compression ratio of the luminance signal to about 4/5, the blurring of the contour at the edge can be suppressed to a level that does not cause a visual problem.

Furthermore, since the horizontal synchronization signal is time-axis compressed at the same time-axis compression rate as the luminance signal and has a 2H period, the blank period in the luminance signal increases.
It has become easy to time-division multiplex color signals, for example, line-sequentially and by compressing the time axis to about 1/5.

Furthermore, as explained in FIG. 2, the interval t ₁ between the start point of the period of the luminance signal Y _W without time axis compression and the start point of the period of the luminance signal Y _N whose time axis is compressed by 4/5 times. , with the interval t ₂ between the starting point of the period of this luminance signal Y _N and the starting point of the period of the luminance signal Y _W 1H
As a result, as described above, the time division multiplexing process required to make the horizontal synchronization signal have a 2H period is facilitated.

It goes without saying that the present invention is not determined by the above-mentioned clock frequency or type of recording/reproducing device.

〔Effect of the invention〕

As described above, according to the present invention, it is possible to time-division multiplex a luminance signal and a chrominance signal with sufficient margin, and also to avoid lowering the frequency band of the luminance signal and prevent waveform distortion. It is possible to obtain excellent effects such as suppressing deterioration of resolution in the horizontal direction and diagonal direction and blurring of contours, and improving the quality of reproduced images.

[Brief explanation of the drawing]

1 to 5 show an embodiment of the video signal recording and reproducing method according to the present invention, in which FIG. 1 is a block diagram showing the recording system, and FIG. 2 shows the signals of each part in FIG. 3 is a timing chart showing the operation of the time axis compression means in FIG. 1 during the vertical blanking period, FIG. 4 is a block diagram showing the reproduction system, and FIG. 5 is a signal diagram of each part in FIG. 4. FIG. 6 is a timing chart showing an example of a conventional video signal recording/reproducing device. Y...Luminance signal, LS...Line sequential color difference signal,
HS′...Horizontal synchronization signal with 2H period compressed in time axis, Y _W ...Brightness signal without time axis compression, Y _N ...
...Time axis compressed luminance signal, R-Y', B-
Y'...Time axis compressed color difference signal.

Claims (1)

[Claims] 1 In the recording and reproducing method of a video signal consisting of at least a luminance signal and first and second color difference signals, the horizontal synchronization signal is compressed in time by approximately 4/5 times to 2H (however,
1H is one horizontal period), and between the horizontal synchronization signal and the next horizontal synchronization signal, the first color difference signal whose time axis is compressed to about 1/5 times, and the luminance signal whose time axis is not compressed. , the second color difference signal whose time axis has been compressed by about 1/5 times, and the luminance signal whose time axis has been compressed by about 4/5 times, and the start point of the luminance signal whose time axis is not compressed. The luminance signal and the first and second color difference signals are time-division multiplexed so that the time interval between the start point of the luminance signal and the start point of the next luminance signal compressed in the time axis by about 4/5 times is approximately 1H. A video signal recording and reproducing method characterized by recording and reproducing video signals.