JPS61140187A - Semiconductor current detector - Google Patents

Semiconductor current detector

Info

Publication number
JPS61140187A
JPS61140187A JP59260785A JP26078584A JPS61140187A JP S61140187 A JPS61140187 A JP S61140187A JP 59260785 A JP59260785 A JP 59260785A JP 26078584 A JP26078584 A JP 26078584A JP S61140187 A JPS61140187 A JP S61140187A
Authority
JP
Japan
Prior art keywords
region
collector
layer
current
base
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59260785A
Other languages
Japanese (ja)
Other versions
JPH0478194B2 (en
Inventor
Hideo Muro
室 英夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nissan Motor Co Ltd
Original Assignee
Nissan Motor Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nissan Motor Co Ltd filed Critical Nissan Motor Co Ltd
Priority to JP59260785A priority Critical patent/JPS61140187A/en
Publication of JPS61140187A publication Critical patent/JPS61140187A/en
Publication of JPH0478194B2 publication Critical patent/JPH0478194B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N52/00Hall-effect devices
    • H10N52/101Semiconductor Hall-effect devices

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  • Measuring Magnetic Variables (AREA)
  • Measuring Instrument Details And Bridges, And Automatic Balancing Devices (AREA)
  • Hall/Mr Elements (AREA)

Abstract

PURPOSE:To obtain large current detection sensitivities with small collector current by restricting the collector current path to the neighborhood of the surface of an element having a strong magnetic field by a method wherein a buried layer of reverse conductivity type to that of the collector region is formed in the region immediately under a part which performs magnetic detection. CONSTITUTION:An n<+> buried layer 23 line immediately under a base region 15 are prevents holes from flowing out of the base into the Si substrate 11. A P-type buried layer 22 lines immediately under Hall electrode n<+> regions 17, 17' for magnetic detec tion. Thereby, when a high voltage is impressed on the collector terminal, a base- collector junction is reversely biased, and a depletion layer 25 keeps on spreading to the part between the region 17. Because of the installation of the p-type Si substrate 11, the buried layer 22 and an n-type epitaxial layer 14 are reversely biased, and a depletion layer 24 spreads upward. At this time, the electrons flowing into the epitaxial layer 14 out of the base flow only over the layer 14 in the neighborhood of the part of magnetic detection. This part is strong in magnetic field generated by flowing current. This strengthens the interaction between collector current and magnetic field and improves the sensitivity because of effective utilization of the collector current.

Description

【発明の詳細な説明】 〔発明の利用分野〕 本発明は半導体集積回路中の電流路に流れる電流値を検
出する装置に関し、例えば電流制御型の負荷駆動用集積
回路における負荷電流を検出する装置に関するものであ
る。
[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to a device for detecting the value of current flowing in a current path in a semiconductor integrated circuit, for example, a device for detecting a load current in a current-controlled load driving integrated circuit. It is related to.

〔従来技術〕[Prior art]

半導体集積回路を用いた磁気センサとしては、例えば1
日経エレクトロニクス1981年4月13日号のrNE
レポート 温度特性と直線性が良く、高感度のバイポー
ラ型Si磁気センサを開発」に記載さ九ているものがあ
る。
As a magnetic sensor using a semiconductor integrated circuit, for example, 1
rNE of Nikkei Electronics April 13, 1981 issue
There are nine things described in the report "Development of a highly sensitive bipolar Si magnetic sensor with good temperature characteristics and linearity."

本発明者は、上記のごとき半導体磁気センサを用いて、
半導体集積回路表面に設けられた電流路を流れる電流に
よって生じる磁界の強さを検出することにより、上記電
流路に流れる電流値を検出する半導体電流検出装置を既
に発明している。′第2図は上記の半導体電流検出装置
の一例図で′あり、(A)は平面図、(B)は(A)の
A−A’断面図、(C)は(A)のB−B’断面図であ
る。
The present inventor used the semiconductor magnetic sensor as described above to
A semiconductor current detection device has already been invented which detects the value of the current flowing through the current path by detecting the strength of the magnetic field generated by the current flowing through the current path provided on the surface of a semiconductor integrated circuit. ``Figure 2 is an example of the above semiconductor current detection device,'' where (A) is a plan view, (B) is a cross-sectional view taken along line AA' in (A), and (C) is a cross-sectional view taken along line B-- in (A). It is a B' sectional view.

第2図において、11は低比抵抗でp型のSi基板、1
2は空乏層を表面付近に拡げないためのチャンネル・ス
トッパ領域であり、リンのイオン注入層である。
In FIG. 2, 11 is a low resistivity p-type Si substrate;
2 is a channel stopper region for preventing the depletion layer from expanding near the surface, and is a phosphorus ion implantation layer.

また、13はp+の素子分離領域、14はSL基板11
上に形成されたn−エピタキシャル層、15はベース拡
散領域、16はエミッタ用n+領域、17.17′はホ
ール電極用n+領域、18はコレクタ用n“領域であり
、これらはバイポーラ・トランジスタを形成している。
Further, 13 is a p+ element isolation region, and 14 is an SL substrate 11.
The n- epitaxial layer formed above, 15 is the base diffusion region, 16 is the n+ region for the emitter, 17.17' is the n+ region for the hole electrode, and 18 is the n'' region for the collector. is forming.

また、19はM配線層、204tSiO,l[,21,
21′、21′は電流路であり、例えばSiO□llI
20上にAgめっきによって形成されている。
In addition, 19 is an M wiring layer, 204tSiO,l[,21,
21' and 21' are current paths, for example, SiO□llI
20 by Ag plating.

上記の構成において、バイポーラ・トランジスタのコレ
クターベース接合に充分大きな逆バイアスをかけ、空乏
層がホール電極用n+領域17と17′とに達するよう
にすると、表面に垂直な磁界に対して17と17′ と
の間にはホール電圧Vh=fVan+axWB を生じ
る。
In the above configuration, if a sufficiently large reverse bias is applied to the collector-base junction of the bipolar transistor so that the depletion layer reaches n+ regions 17 and 17' for the hole electrode, 17 and 17 ′, a Hall voltage Vh=fVan+axWB is generated.

ここで、fは形状効果を表わす係数、V(IIIIII
Xは空乏層中の電子の飽和ドリフト速度、Wは17と1
7′トの間の距離、Bは実効的な磁束密度である。
Here, f is a coefficient representing the shape effect, V(IIIIII
X is the saturation drift velocity of electrons in the depletion layer, W is 17 and 1
7', B is the effective magnetic flux density.

上記の式から判るように、一対のホール電極用n+領域
17と17′ との間隔を大きくすることによって、コ
レクタ電流を増加することなしに感度を向上させること
が出来る。
As can be seen from the above equation, by increasing the distance between the pair of n+ regions 17 and 17' for hole electrodes, the sensitivity can be improved without increasing the collector current.

そして、Sin、膜20上に形成した電流路21.21
’ 、 21’に電流を流すとその電流に比例した磁界
22が生ずるので、上記の磁界によるホール電圧Vhを
検出することによって電流路に流れる電流の値を検出す
ることが出来る。
Then, current paths 21 and 21 formed on the Sin film 20
When a current is passed through ', 21', a magnetic field 22 proportional to the current is generated, so by detecting the Hall voltage Vh due to the above magnetic field, the value of the current flowing in the current path can be detected.

なお、電流路21.21’ 、 21’は、ホール電極
用n+領域17.17′ を囲むように形成されており
、例えば、Ag又はAuのめっきによって30〜50t
1mの厚さに形成される。
Note that the current paths 21.21' and 21' are formed so as to surround the n+ region 17.17' for hole electrodes, and are formed by plating 30 to 50 t, for example, with Ag or Au.
It is formed to a thickness of 1 m.

そして、上記の電流路に流す電流として1例えば、電流
制御型の負荷駆動用集積回路における負荷電流を用いれ
ば、電圧降下等を生じることなしに負荷電流を正確に検
出することが可能となる。
If, for example, a load current in a current control type load driving integrated circuit is used as the current flowing through the current path, it becomes possible to accurately detect the load current without causing a voltage drop or the like.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上記のごとき半導体電流検出装置においては、ベースか
らコレクタへ流れる電流が表面から深さ方向に向かって
広い範囲に亘って分布して流れる構造となっているが、
磁界の強さは表面が一番強く、深くなるに従って弱くな
るから実質的には表面付近を流れる電流のみがホール電
圧に寄与し、その他の電流は無駄に流れていて余分な電
力を消費していることになるという問題点があった。
The semiconductor current detection device described above has a structure in which the current flowing from the base to the collector is distributed over a wide range from the surface toward the depth.
The strength of the magnetic field is strongest at the surface and weakens as it gets deeper, so essentially only the current flowing near the surface contributes to the Hall voltage, and other currents flow in vain, consuming excess power. There was a problem that there was a problem.

本発明は、上記の問題を解決することを目的とするもの
である。
The present invention aims to solve the above problems.

〔問題を解決するための手段〕[Means to solve the problem]

上記の目的を達成するため本発明においては、磁気検出
を行なう部分(前記のホール電極用n+領域17.17
′)の直下の領域に、コレクタ領域と反対導電型の埋込
層を形成することにより、コレクタ電流の通路を磁界の
強い素子表面付近に限定し、磁界とコレクタ電流との相
互作用を強くすることによって少ないコレクタ電流で大
きな電流検出感度を得るように構成している。
In order to achieve the above object, in the present invention, a portion where magnetic detection is performed (the above-mentioned n+ region for hole electrode 17, 17
′) By forming a buried layer of the opposite conductivity type to the collector region, the path of the collector current is limited to the vicinity of the element surface where the magnetic field is strong, and the interaction between the magnetic field and the collector current is strengthened. As a result, it is configured to obtain high current detection sensitivity with a small collector current.

〔発明の実施例〕[Embodiments of the invention]

第1図は本発明の一実施例図であり、(A)は断面図、
(B)は(A)の部分拡大図である。
FIG. 1 is a diagram showing an embodiment of the present invention, and (A) is a sectional view;
(B) is a partially enlarged view of (A).

第1図において、22はp型埋込層、23はn+埋込層
、24.25は空乏層である。
In FIG. 1, 22 is a p-type buried layer, 23 is an n+ buried layer, and 24.25 is a depletion layer.

また、(B)は(A)の破線26で囲んだ部分を拡大し
たものである。
Moreover, (B) is an enlarged view of the part surrounded by the broken line 26 in (A).

その他、第2図と同符号は同一物を示す。In addition, the same symbols as in FIG. 2 indicate the same parts.

また、第2図のM配線層19、S i O、膜20、電
流路21.21’ 、21’等は表示を省略している。
Further, the M wiring layer 19, S i O, film 20, current paths 21, 21', 21', etc. in FIG. 2 are omitted from illustration.

第1図(B)に示すごとく、ベース領域15の直下には
n+埋込層23があり、ベースからの電子がSi基板1
1に流れ込むのを防いでいる。
As shown in FIG. 1(B), there is an n+ buried layer 23 directly under the base region 15, and electrons from the base are transferred to the Si substrate 1.
This prevents it from flowing into 1.

また磁気検出用のホール電極用n“領域17.17′の
直下にはp型埋込層22がある。
Further, there is a p-type buried layer 22 directly below the n'' region 17, 17' for a hole electrode for magnetic detection.

そのため、コレクタ端子に高電圧を加えるとベース−コ
レクタ接合が逆バイアスされ、空乏層25がn+領域1
7.17′の間の部分へ拡がって行く。
Therefore, when a high voltage is applied to the collector terminal, the base-collector junction is reverse biased, and the depletion layer 25 becomes n+ region 1.
It spreads to the part between 7.17'.

また、p型のSi基板11が設置されているので、p型
埋込層22とn型のエピタキシャル層14との間も逆バ
イアスされ、空乏層24が上側に拡がる。
Further, since the p-type Si substrate 11 is provided, a reverse bias is also applied between the p-type buried layer 22 and the n-type epitaxial layer 14, and the depletion layer 24 expands upward.

このときベースからエピタキシャル層14に流れ込んだ
電子は、磁気検出部分の付近ではエピタキシャル層14
の上部のみを流れる。
At this time, the electrons flowing from the base into the epitaxial layer 14 are transferred to the epitaxial layer 14 near the magnetic detection part.
Flows only at the top of the

この部分は、素子表面に設けられた電流路(図示せず)
を流れる電流によって生じる磁界の強い部分であり、こ
のためコレクタ電流と磁界の相互作用が強くなり、コレ
クタ電流を有効に利用することが出来るので感度が向上
する。
This part is a current path (not shown) provided on the element surface.
This is the part of the magnetic field where the magnetic field is strong due to the current flowing through the magnetic field, and therefore the interaction between the collector current and the magnetic field is strong, and the collector current can be used effectively, improving sensitivity.

次に第3図は、上記の素子の製造工程を示す一実施例図
である。
Next, FIG. 3 is an embodiment diagram showing the manufacturing process of the above element.

第3図において、まず(A)では、最初に比抵抗10Ω
・口のp型(111)面のSi基板11を熱酸化し、全
面に1−程度のSio2膜(図示せず)を形成する。
In Figure 3, first in (A), the specific resistance is 10Ω.
- The p-type (111) side Si substrate 11 of the opening is thermally oxidized to form an approximately 1-Sio2 film (not shown) on the entire surface.

次に、Sin、膜を部分的にエツチングし、sbを拡散
してシート抵抗30Ω程度のn+埋込層23を形成する
Next, the Sin film is partially etched and sb is diffused to form an n+ buried layer 23 having a sheet resistance of about 30Ω.

次に、再びSio2膜をホトリップラフィによってエツ
チングし、BBr、のデポジッションによりp型埋込層
22のためのボロン拡散を行なう。
Next, the Sio2 film is etched again by photolithography, and boron is diffused for the p-type buried layer 22 by depositing BBr.

このときのボロンのドープ量は、1〜2X10”/d程
度とする。
The amount of boron doped at this time is approximately 1 to 2×10″/d.

その後、上記のSio、膜を全面除去する。After that, the above Sio film is completely removed.

次に、(B)において、比抵抗が10Ω・口、厚さが1
5Ωmのn型エピタキシャル層14を成長させる。
Next, in (B), the specific resistance is 10 Ω, the thickness is 1
An n-type epitaxial layer 14 of 5 Ωm is grown.

次に、(C)において、熱酸化によって5in2膜(図
示せず)を5000人程度形成し、窓開けした後、BB
r、をデボジッションし、]、200”Cで100時間
程拡散することにより、P+の素子分離領域13を形成
する。
Next, in (C), approximately 5,000 5in2 films (not shown) are formed by thermal oxidation, and after opening the window, BB
r, and is diffused at 200''C for about 100 hours to form a P+ element isolation region 13.

なお、このとき前記のp型埋込層22も6〜7−程度外
方拡散する。
At this time, the p-type buried layer 22 is also outwardly diffused by about 6 to 7 times.

次に、(D)において、ボロンの表面濃度が2〜5 X
 10” / cd、拡散深さが3am程度になるよう
に通常のベース拡散を行ない、p型のベース拡散領域1
5を形成する。
Next, in (D), the surface concentration of boron is 2 to 5
A p-type base diffusion region 1 is formed by performing normal base diffusion so that the diffusion depth is approximately 3 am.
form 5.

次に、(E)において、図示しない5in2膜の窓開け
をしてpocn3をデボジッションし、n+のエミッタ
拡散を行なう。
Next, in (E), a window (not shown) of the 5in2 film is opened, pocn3 is deposited, and n+ emitter diffusion is performed.

エミッタ用n+領域16の表面濃度は、5X10”/d
程度、拡散深さは2゜5IIIa程度とする。
The surface concentration of the n+ region 16 for emitter is 5×10”/d
The diffusion depth is approximately 2°5IIIa.

このとき、同時にホール電極用n+領域17.17′、
コレクタ用n+領域18を形成する。
At this time, at the same time, n+ regions 17 and 17' for hole electrodes,
A collector n+ region 18 is formed.

その後、磁気検出部分上のSin、膜を部分的にエツチ
ングし、熱酸化によって500人程形成薄い酸化膜を形
成し、30kaVで5X1011/cd程度リンをイオ
ン注入し、チャンネル・ストッパ領域12を形成する。
After that, the Sin film on the magnetic detection part is partially etched, a thin oxide film of about 500 layers is formed by thermal oxidation, and phosphorus ions of about 5X1011/cd are ion-implanted at 30 kaV to form the channel stopper region 12. do.

ここで、N2雰囲気中において900℃で1時間程度の
アニールを行なう。
Here, annealing is performed at 900° C. for about 1 hour in a N2 atmosphere.

その後、図示はしていないがコンタクトホールのSio
、をエツチングし、舷を蒸着してパターニングし、その
上にPSGをデボジッションする。
After that, although not shown, the contact hole Sio
, evaporate and pattern the gunwale, and deposit PSG on it.

さらに、磁界発生用の電流路を形成するため、下地金属
としてNiまたはAgを蒸着し、レジストでマスクをし
て厚さ30〜50.のAgめっきを行なう。
Furthermore, in order to form a current path for generating a magnetic field, Ni or Ag is deposited as a base metal and masked with a resist to a thickness of 30 to 50 mm. Perform Ag plating.

〔発明の効果〕〔Effect of the invention〕

上記のごとく本発明においては、ベース領域とコレクタ
領域との間に対向する一対のホール電極用n+領域を設
け、かつそのホール電極用n+領域の直下のエピタキシ
ャル層下部にp型埋込層を設けた構成としているので、
コレクタ電流が実質的に流れる部分を磁界の強いエピタ
キシャル層上部に限定することが出来、磁界とコレクタ
電流との相互作用を強くすることが出来るので、少ない
コレクタ電流で大きな電流検出感度を得ることが出来る
という効果が得られる。
As described above, in the present invention, a pair of n+ regions for hole electrodes are provided between the base region and the collector region, and a p-type buried layer is provided at the bottom of the epitaxial layer directly under the n+ regions for hole electrodes. Since the configuration is
Since the part where the collector current substantially flows can be limited to the upper part of the epitaxial layer where the magnetic field is strong, and the interaction between the magnetic field and the collector current can be strengthened, it is possible to obtain high current detection sensitivity with a small collector current. You can get the effect that you can.

また、本発明においては、コレクタ電流の実質的な流路
をエピタキシャル層上部に限定することが出来るので、
エピタキシャル層断面内の電流密度のバラツキが小さく
なり、コレクタ電流の変化による感度の変動を小さくす
ることが出来るという効果もある。
Furthermore, in the present invention, since the substantial flow path of the collector current can be limited to the upper part of the epitaxial layer,
There is also the effect that variations in current density within the cross section of the epitaxial layer are reduced, and fluctuations in sensitivity due to changes in collector current can be reduced.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例図、第2図は本発明者が以前
に開発した半導体電流検出装置の一例図、第3図は本発
明の製造工程を示す図である。 符号の説明 11・・・Si基板 12・・・チャンネル・ストッパ領域 13・・・素子分離領域 14・・・ローエピタキシャル層 15・・・ベース拡散領域 16・・エミッタ用n+領域 17.17′・・・ホール電極用n1領域18・・・コ
レクタ用n+領域 19・・・M配線層 20・・・SiO□膜 21、21’ 、 21′・・・電流路22・・・p型
埋込層 23・・・n+埋込層 24、25・・・空乏層 26・・・拡大部分
FIG. 1 is a diagram showing an embodiment of the present invention, FIG. 2 is a diagram showing an example of a semiconductor current detection device previously developed by the present inventor, and FIG. 3 is a diagram showing a manufacturing process of the present invention. Explanation of symbols 11...Si substrate 12...Channel stopper region 13...Element isolation region 14...Low epitaxial layer 15...Base diffusion region 16...N+ region for emitter 17.17'. ...N1 region 18 for hole electrode...N+ region 19 for collector...M wiring layer 20...SiO□ film 21, 21', 21'...Current path 22...P-type buried layer 23...n+ buried layer 24, 25...depletion layer 26...enlarged part

Claims (1)

【特許請求の範囲】[Claims]  半導体基板上に設けられた該半導体基板と反対導電型
のエピタキシャル層と、該エピタキシャル層に形成され
たバイポーラ・トランジスタのベース領域、コレクタ領
域及び該両領域の間に形成された対向する一対の上記コ
レクタ領域と同一導電型の拡散領域と、上記半導体基板
と上記エピタキシャル層との境界部分の上記拡散領域の
下方に設けられた上記コレクタ領域と反対導電型の埋込
層と、上記半導体基板表面上に上記拡散領域を取巻くよ
うに形成された電流路とを備えた半導体電流検出装置。
an epitaxial layer provided on a semiconductor substrate and having a conductivity type opposite to that of the semiconductor substrate; a base region and a collector region of a bipolar transistor formed in the epitaxial layer; and a pair of opposing regions formed between the two regions. a diffusion region of the same conductivity type as the collector region; a buried layer of the opposite conductivity type to the collector region provided below the diffusion region at the boundary between the semiconductor substrate and the epitaxial layer; and a current path formed so as to surround the diffusion region.
JP59260785A 1984-12-12 1984-12-12 Semiconductor current detector Granted JPS61140187A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59260785A JPS61140187A (en) 1984-12-12 1984-12-12 Semiconductor current detector

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59260785A JPS61140187A (en) 1984-12-12 1984-12-12 Semiconductor current detector

Publications (2)

Publication Number Publication Date
JPS61140187A true JPS61140187A (en) 1986-06-27
JPH0478194B2 JPH0478194B2 (en) 1992-12-10

Family

ID=17352696

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59260785A Granted JPS61140187A (en) 1984-12-12 1984-12-12 Semiconductor current detector

Country Status (1)

Country Link
JP (1) JPS61140187A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002359411A (en) * 2001-05-31 2002-12-13 Sanken Electric Co Ltd Semiconductor device and manufacturing method therefor

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5190586A (en) * 1975-02-07 1976-08-09
JPS5696886A (en) * 1979-11-29 1981-08-05 Sony Corp Magnetism sensitive element

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5190586A (en) * 1975-02-07 1976-08-09
JPS5696886A (en) * 1979-11-29 1981-08-05 Sony Corp Magnetism sensitive element

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002359411A (en) * 2001-05-31 2002-12-13 Sanken Electric Co Ltd Semiconductor device and manufacturing method therefor

Also Published As

Publication number Publication date
JPH0478194B2 (en) 1992-12-10

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